WREG32_SOC15_RLC 2465 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, sh_mem_config); WREG32_SOC15_RLC 2466 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases); WREG32_SOC15_RLC 2523 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp); WREG32_SOC15_RLC 2524 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, 0); WREG32_SOC15_RLC 2530 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp); WREG32_SOC15_RLC 2535 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, tmp); WREG32_SOC15_RLC 3076 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_ME_CNTL, tmp); WREG32_SOC15_RLC 3274 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL, 0); WREG32_SOC15_RLC 3276 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL, WREG32_SOC15_RLC 3337 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); WREG32_SOC15_RLC 3339 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); WREG32_SOC15_RLC 3561 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR, WREG32_SOC15_RLC 3563 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, WREG32_SOC15_RLC 3567 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_CONTROL, WREG32_SOC15_RLC 3571 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, WREG32_SOC15_RLC 3576 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); WREG32_SOC15_RLC 3582 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, WREG32_SOC15_RLC 3584 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR, WREG32_SOC15_RLC 3586 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, WREG32_SOC15_RLC 3588 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, WREG32_SOC15_RLC 3593 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR, WREG32_SOC15_RLC 3595 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR_HI, WREG32_SOC15_RLC 3599 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_MQD_CONTROL, WREG32_SOC15_RLC 3603 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE, WREG32_SOC15_RLC 3605 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE_HI, WREG32_SOC15_RLC 3609 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_CONTROL, WREG32_SOC15_RLC 3613 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR, WREG32_SOC15_RLC 3615 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, WREG32_SOC15_RLC 3619 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, WREG32_SOC15_RLC 3621 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, WREG32_SOC15_RLC 3632 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, WREG32_SOC15_RLC 3636 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, WREG32_SOC15_RLC 3638 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, WREG32_SOC15_RLC 3642 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid); WREG32_SOC15_RLC 3644 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE, WREG32_SOC15_RLC 3648 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, WREG32_SOC15_RLC 3665 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); WREG32_SOC15_RLC 3677 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0); WREG32_SOC15_RLC 3680 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, WREG32_SOC15_RLC 3684 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IQ_TIMER, 0); WREG32_SOC15_RLC 3685 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IB_CONTROL, 0); WREG32_SOC15_RLC 3686 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE, 0); WREG32_SOC15_RLC 3687 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000); WREG32_SOC15_RLC 3688 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0); WREG32_SOC15_RLC 3689 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR, 0); WREG32_SOC15_RLC 3690 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, 0); WREG32_SOC15_RLC 3691 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, 0); WREG32_SOC15_RLC 5233 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PIPE_PRIORITY, pipe_priority); WREG32_SOC15_RLC 5234 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15_RLC(GC, 0, mmCP_HQD_QUEUE_PRIORITY, queue_priority); WREG32_SOC15_RLC 74 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BASE, 0); WREG32_SOC15_RLC 75 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); WREG32_SOC15_RLC 76 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); WREG32_SOC15_RLC 79 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, WREG32_SOC15_RLC 89 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, WREG32_SOC15_RLC 93 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, WREG32_SOC15_RLC 132 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15_RLC 149 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL, tmp); WREG32_SOC15_RLC 154 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL2, tmp); WREG32_SOC15_RLC 166 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL3, tmp); WREG32_SOC15_RLC 171 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL4, tmp); WREG32_SOC15_RLC 271 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_BASE, WREG32_SOC15_RLC 273 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_TOP, WREG32_SOC15_RLC 307 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);