WREG32_SOC15 60 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h ({ WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_MASK, mask); \ WREG32_SOC15 61 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_CTL, \ WREG32_SOC15 71 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_DATA, value); \ WREG32_SOC15 72 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_MASK, mask); \ WREG32_SOC15 73 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(ip, inst, mmUVD_DPG_LMA_CTL, \ WREG32_SOC15 105 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(VCN, 0, mmUVD_DPG_LMA_CTL, \ WREG32_SOC15 115 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(VCN, 0, mmUVD_DPG_LMA_DATA, value); \ WREG32_SOC15 116 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h WREG32_SOC15(VCN, 0, mmUVD_DPG_LMA_CTL, \ WREG32_SOC15 45 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data); WREG32_SOC15 62 drivers/gpu/drm/amd/amdgpu/athub_v1_0.c WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data); WREG32_SOC15 48 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data); WREG32_SOC15 66 drivers/gpu/drm/amd/amdgpu/athub_v2_0.c WREG32_SOC15(ATHUB, 0, mmATHUB_MISC_CNTL, data); WREG32_SOC15 44 drivers/gpu/drm/amd/amdgpu/df_v1_7.c WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp); WREG32_SOC15 46 drivers/gpu/drm/amd/amdgpu/df_v1_7.c WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, WREG32_SOC15 82 drivers/gpu/drm/amd/amdgpu/df_v1_7.c WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp); WREG32_SOC15 87 drivers/gpu/drm/amd/amdgpu/df_v1_7.c WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp); WREG32_SOC15 231 drivers/gpu/drm/amd/amdgpu/df_v3_6.c WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, tmp); WREG32_SOC15 233 drivers/gpu/drm/amd/amdgpu/df_v3_6.c WREG32_SOC15(DF, 0, mmFabricConfigAccessControl, WREG32_SOC15 273 drivers/gpu/drm/amd/amdgpu/df_v3_6.c WREG32_SOC15(DF, 0, WREG32_SOC15 280 drivers/gpu/drm/amd/amdgpu/df_v3_6.c WREG32_SOC15(DF, 0, WREG32_SOC15 1112 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmSQ_IND_INDEX, WREG32_SOC15 1122 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmSQ_IND_INDEX, WREG32_SOC15 1519 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); WREG32_SOC15 1616 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); WREG32_SOC15 1617 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmSH_MEM_BASES, sh_mem_bases); WREG32_SOC15 1706 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmUTCL1_UTCL0_INVREQ_DISABLE, tmp); WREG32_SOC15 1712 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGCRD_SA_TARGETS_DISABLE, tmp); WREG32_SOC15 1753 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); WREG32_SOC15 1759 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp); WREG32_SOC15 1785 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp); WREG32_SOC15 1811 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_HI, WREG32_SOC15 1813 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CSIB_ADDR_LO, WREG32_SOC15 1815 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size); WREG32_SOC15 1841 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CNTL, tmp); WREG32_SOC15 1871 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, rlc_pg_cntl); WREG32_SOC15 1912 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, WREG32_SOC15 1916 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, WREG32_SOC15 1919 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); WREG32_SOC15 1947 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0); WREG32_SOC15 1950 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0); WREG32_SOC15 2223 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_ADDR_HI, upper_32_bits(gpu_addr)); WREG32_SOC15 2224 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_ADDR_LO, lower_32_bits(gpu_addr)); WREG32_SOC15 2225 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_HYP_BOOTLOAD_SIZE, rlc_g_size); WREG32_SOC15 2253 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp); WREG32_SOC15 2272 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_LO, WREG32_SOC15 2274 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_HI, WREG32_SOC15 2290 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); WREG32_SOC15 2309 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_LO, WREG32_SOC15 2311 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_HI, WREG32_SOC15 2327 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp); WREG32_SOC15 2346 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_LO, WREG32_SOC15 2348 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_HI, WREG32_SOC15 2364 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); WREG32_SOC15 2383 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, WREG32_SOC15 2385 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, WREG32_SOC15 2446 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_CNTL, tmp); WREG32_SOC15 2497 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_OP_CNTL, tmp); WREG32_SOC15 2521 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_CNTL, tmp); WREG32_SOC15 2522 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_LO, WREG32_SOC15 2524 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_HI, WREG32_SOC15 2567 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); WREG32_SOC15 2591 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_LO, WREG32_SOC15 2593 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_HI, WREG32_SOC15 2636 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_IC_OP_CNTL, tmp); WREG32_SOC15 2660 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_LO, WREG32_SOC15 2662 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_HI, WREG32_SOC15 2707 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT, WREG32_SOC15 2709 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_DEVICE_ID, 1); WREG32_SOC15 2784 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, tmp); WREG32_SOC15 2802 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); WREG32_SOC15 2805 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp); WREG32_SOC15 2807 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER, WREG32_SOC15 2820 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); WREG32_SOC15 2823 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_VMID, 0); WREG32_SOC15 2837 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp); WREG32_SOC15 2841 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 2842 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); WREG32_SOC15 2846 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); WREG32_SOC15 2847 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & WREG32_SOC15 2851 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, WREG32_SOC15 2853 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, WREG32_SOC15 2857 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp); WREG32_SOC15 2860 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr); WREG32_SOC15 2861 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr)); WREG32_SOC15 2863 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_ACTIVE, 1); WREG32_SOC15 2875 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp); WREG32_SOC15 2878 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 2879 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_WPTR_HI, upper_32_bits(ring->wptr)); WREG32_SOC15 2882 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); WREG32_SOC15 2883 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & WREG32_SOC15 2886 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, WREG32_SOC15 2888 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, WREG32_SOC15 2892 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_CNTL, tmp); WREG32_SOC15 2895 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_BASE, rb_addr); WREG32_SOC15 2896 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_BASE_HI, upper_32_bits(rb_addr)); WREG32_SOC15 2897 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1); WREG32_SOC15 2922 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_CNTL, 0); WREG32_SOC15 2924 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_CNTL, WREG32_SOC15 2957 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); WREG32_SOC15 2980 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp); WREG32_SOC15 2982 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr & WREG32_SOC15 2984 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, WREG32_SOC15 2988 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, 0); WREG32_SOC15 2991 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA, WREG32_SOC15 2994 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version); WREG32_SOC15 3013 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); WREG32_SOC15 3015 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp); WREG32_SOC15 3112 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_WPTR, mqd->cp_gfx_hqd_wptr); WREG32_SOC15 3113 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_WPTR_HI, mqd->cp_gfx_hqd_wptr_hi); WREG32_SOC15 3116 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr); WREG32_SOC15 3117 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi); WREG32_SOC15 3120 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_MQD_CONTROL, mqd->cp_gfx_mqd_control); WREG32_SOC15 3123 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_VMID, mqd->cp_gfx_hqd_vmid); WREG32_SOC15 3125 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_QUEUE_PRIORITY, WREG32_SOC15 3127 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_QUANTUM, mqd->cp_gfx_hqd_quantum); WREG32_SOC15 3130 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_BASE, mqd->cp_gfx_hqd_base); WREG32_SOC15 3131 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_BASE_HI, mqd->cp_gfx_hqd_base_hi); WREG32_SOC15 3134 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_RPTR_ADDR, mqd->cp_gfx_hqd_rptr_addr); WREG32_SOC15 3135 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_RPTR_ADDR_HI, mqd->cp_gfx_hqd_rptr_addr_hi); WREG32_SOC15 3138 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_CNTL, mqd->cp_gfx_hqd_cntl); WREG32_SOC15 3141 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, mqd->cp_rb_wptr_poll_addr_lo); WREG32_SOC15 3142 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, mqd->cp_rb_wptr_poll_addr_hi); WREG32_SOC15 3145 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, mqd->cp_rb_doorbell_control); WREG32_SOC15 3148 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_GFX_HQD_ACTIVE, mqd->cp_gfx_hqd_active); WREG32_SOC15 3401 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR, WREG32_SOC15 3403 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, WREG32_SOC15 3407 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL, WREG32_SOC15 3411 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, WREG32_SOC15 3416 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); WREG32_SOC15 3422 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, WREG32_SOC15 3424 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR, WREG32_SOC15 3426 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO, WREG32_SOC15 3428 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI, WREG32_SOC15 3433 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR, WREG32_SOC15 3435 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, WREG32_SOC15 3439 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MQD_CONTROL, WREG32_SOC15 3443 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE, WREG32_SOC15 3445 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI, WREG32_SOC15 3449 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL, WREG32_SOC15 3453 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR, WREG32_SOC15 3455 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, WREG32_SOC15 3459 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, WREG32_SOC15 3461 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, WREG32_SOC15 3466 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER, WREG32_SOC15 3468 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER, WREG32_SOC15 3472 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, WREG32_SOC15 3476 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_LO, WREG32_SOC15 3478 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI, WREG32_SOC15 3482 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid); WREG32_SOC15 3484 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE, WREG32_SOC15 3488 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, WREG32_SOC15 3694 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, 0); WREG32_SOC15 3696 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, pattern); WREG32_SOC15 3699 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE_UMD, data); WREG32_SOC15 3702 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmVGT_ESGS_RING_SIZE, data); WREG32_SOC15 3713 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_INDEX, 0); WREG32_SOC15 3720 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3721 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3728 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3729 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3736 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3737 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3744 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3745 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3752 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3753 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3760 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3761 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3768 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA_UPPER, 0); WREG32_SOC15 3769 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_CAM_DATA, data); WREG32_SOC15 3961 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); WREG32_SOC15 3967 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); WREG32_SOC15 3983 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1); WREG32_SOC15 4068 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data); WREG32_SOC15 4083 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data); WREG32_SOC15 4103 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4112 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data); WREG32_SOC15 4119 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data); WREG32_SOC15 4130 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4136 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data); WREG32_SOC15 4143 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data); WREG32_SOC15 4161 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4170 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); WREG32_SOC15 4177 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data); WREG32_SOC15 4186 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); WREG32_SOC15 4205 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4215 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data); WREG32_SOC15 4222 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data); WREG32_SOC15 4229 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data); WREG32_SOC15 4388 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 4389 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); WREG32_SOC15 5134 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp); WREG32_SOC15 5144 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmCPC_INT_CNTL, tmp); WREG32_SOC15 5398 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG, data); WREG32_SOC15 1514 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_PG_ALWAYS_ON_CU_MASK, cu_bitmap); WREG32_SOC15 1524 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_ALWAYS_ACTIVE_CU_MASK, cu_bitmap); WREG32_SOC15 1537 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F); WREG32_SOC15 1538 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x0333A5A7); WREG32_SOC15 1539 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_3, 0x00000077); WREG32_SOC15 1540 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_4, (0x30 | 0x40 << 8 | 0x02FA << 16)); WREG32_SOC15 1543 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000); WREG32_SOC15 1546 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_MAX, 0x00000500); WREG32_SOC15 1551 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff); WREG32_SOC15 1557 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data); WREG32_SOC15 1563 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7, data); WREG32_SOC15 1575 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); WREG32_SOC15 1586 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_1, 0x0000007F); WREG32_SOC15 1587 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_2, 0x033388F8); WREG32_SOC15 1588 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_3, 0x00000077); WREG32_SOC15 1589 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_THR_CONFIG_4, (0x10 | 0x27 << 8 | 0x02FA << 16)); WREG32_SOC15 1592 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_INIT, 0x00000000); WREG32_SOC15 1595 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_CNTR_MAX, 0x00000800); WREG32_SOC15 1600 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_INIT_CU_MASK, 0xffffffff); WREG32_SOC15 1606 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_PARAMS, data); WREG32_SOC15 1612 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_7, data); WREG32_SOC15 1624 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_LB_CNTL, data); WREG32_SOC15 1778 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmSQ_IND_INDEX, WREG32_SOC15 1790 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmSQ_IND_INDEX, WREG32_SOC15 2091 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_BUF_RESOURCE_1, data); WREG32_SOC15 2097 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_BUF_RESOURCE_2, data); WREG32_SOC15 2102 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_INDEX_BUF_BASE, data); WREG32_SOC15 2106 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_INDEX_BUF_BASE_HI, data); WREG32_SOC15 2110 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_POS_BUF_BASE, data); WREG32_SOC15 2114 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_POS_BUF_BASE_HI, data); WREG32_SOC15 2118 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_CNTL_SB_BUF_BASE, data); WREG32_SOC15 2122 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmWD_CNTL_SB_BUF_BASE_HI, data); WREG32_SOC15 2594 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0, tmp); WREG32_SOC15 2698 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); WREG32_SOC15 2702 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); WREG32_SOC15 2703 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); WREG32_SOC15 2707 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, j); WREG32_SOC15 2985 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_TIMER_INT_3, 0x9C4); WREG32_SOC15 2989 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_GENERAL_12, 0x100); WREG32_SOC15 3010 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, WREG32_SOC15 3013 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++)); WREG32_SOC15 3014 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version); WREG32_SOC15 3031 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0); WREG32_SOC15 3109 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, 0); WREG32_SOC15 3111 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++)); WREG32_SOC15 3112 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version); WREG32_SOC15 3119 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, 0); WREG32_SOC15 3121 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++)); WREG32_SOC15 3122 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version); WREG32_SOC15 3129 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, 0); WREG32_SOC15 3131 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++)); WREG32_SOC15 3132 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version); WREG32_SOC15 3145 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1); WREG32_SOC15 3146 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_DEVICE_ID, 1); WREG32_SOC15 3207 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); WREG32_SOC15 3210 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_VMID, 0); WREG32_SOC15 3220 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp); WREG32_SOC15 3224 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 3225 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); WREG32_SOC15 3229 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); WREG32_SOC15 3230 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK); WREG32_SOC15 3233 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); WREG32_SOC15 3234 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); WREG32_SOC15 3237 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_CNTL, tmp); WREG32_SOC15 3240 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_BASE, rb_addr); WREG32_SOC15 3241 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_BASE_HI, upper_32_bits(rb_addr)); WREG32_SOC15 3252 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); WREG32_SOC15 3256 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_LOWER, tmp); WREG32_SOC15 3258 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_RANGE_UPPER, WREG32_SOC15 3306 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp); WREG32_SOC15 3308 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, WREG32_SOC15 3310 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_HI, WREG32_SOC15 3314 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, WREG32_SOC15 3317 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_DATA, WREG32_SOC15 3320 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, WREG32_SOC15 3626 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER, WREG32_SOC15 3628 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER, WREG32_SOC15 4066 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); WREG32_SOC15 4072 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp); WREG32_SOC15 4088 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1); WREG32_SOC15 4232 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGDS_VMID0_BASE, 0x00000000); WREG32_SOC15 4233 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); WREG32_SOC15 4258 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, 0x00000000); WREG32_SOC15 4388 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xe0000000); WREG32_SOC15 4559 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data); WREG32_SOC15 4574 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_SAFE_MODE, data); WREG32_SOC15 4639 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4648 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data); WREG32_SOC15 4655 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data); WREG32_SOC15 4671 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4677 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_MEM_SLP_CNTL, data); WREG32_SOC15 4684 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL, data); WREG32_SOC15 4709 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4720 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); WREG32_SOC15 4727 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data); WREG32_SOC15 4736 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); WREG32_SOC15 4759 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); WREG32_SOC15 4774 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data); WREG32_SOC15 4781 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_CNTL, data); WREG32_SOC15 4788 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, data); WREG32_SOC15 4977 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 4978 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmCP_RB0_WPTR_HI, upper_32_bits(ring->wptr)); WREG32_SOC15 5476 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmSQ_CMD, value); WREG32_SOC15 6432 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_SOC15(GC, 0, mmGC_USER_SHADER_ARRAY_CONFIG, data); WREG32_SOC15 58 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, WREG32_SOC15 60 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, WREG32_SOC15 63 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, WREG32_SOC15 65 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, WREG32_SOC15 99 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, WREG32_SOC15 101 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, WREG32_SOC15 105 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, WREG32_SOC15 107 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, WREG32_SOC15 181 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL, tmp); WREG32_SOC15 186 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32, WREG32_SOC15 188 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32, WREG32_SOC15 191 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32, WREG32_SOC15 193 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32, WREG32_SOC15 196 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0); WREG32_SOC15 197 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0); WREG32_SOC15 311 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, 0); WREG32_SOC15 355 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp); WREG32_SOC15 54 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, WREG32_SOC15 57 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, WREG32_SOC15 65 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, WREG32_SOC15 67 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, WREG32_SOC15 70 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, WREG32_SOC15 72 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, WREG32_SOC15 81 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); WREG32_SOC15 82 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, 0); WREG32_SOC15 83 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, 0x00FFFFFF); WREG32_SOC15 86 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, WREG32_SOC15 88 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, WREG32_SOC15 94 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, WREG32_SOC15 96 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, WREG32_SOC15 100 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, WREG32_SOC15 102 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, WREG32_SOC15 127 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15 146 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp); WREG32_SOC15 151 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp); WREG32_SOC15 163 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp); WREG32_SOC15 168 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp); WREG32_SOC15 178 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp); WREG32_SOC15 183 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32, WREG32_SOC15 185 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32, WREG32_SOC15 188 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32, WREG32_SOC15 190 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32, WREG32_SOC15 193 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0); WREG32_SOC15 194 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0); WREG32_SOC15 259 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE, WREG32_SOC15 261 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP, WREG32_SOC15 293 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15 297 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0); WREG32_SOC15 340 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp); WREG32_SOC15 848 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c WREG32_SOC15(HDP, 0, mmHDP_MISC_CNTL, tmp); WREG32_SOC15 851 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp); WREG32_SOC15 1444 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp); WREG32_SOC15 1446 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); WREG32_SOC15 1447 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40)); WREG32_SOC15 194 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); WREG32_SOC15 197 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START, WREG32_SOC15 204 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data); WREG32_SOC15 208 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); WREG32_SOC15 216 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); WREG32_SOC15 241 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_CNTL, 0); WREG32_SOC15 248 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START, WREG32_SOC15 252 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_LO, WREG32_SOC15 254 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_HI, WREG32_SOC15 258 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_MIBOUND_LO, 0x1FFFFF); WREG32_SOC15 261 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_MDBASE_LO, WREG32_SOC15 263 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_MDBASE_HI, WREG32_SOC15 267 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_MDBOUND_LO, 0x3FFFF); WREG32_SOC15 273 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL, data); WREG32_SOC15 278 drivers/gpu/drm/amd/amdgpu/mes_v10_1.c WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL, data); WREG32_SOC15 78 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, WREG32_SOC15 80 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, WREG32_SOC15 83 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, WREG32_SOC15 85 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, WREG32_SOC15 95 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0); WREG32_SOC15 96 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); WREG32_SOC15 97 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); WREG32_SOC15 100 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, WREG32_SOC15 110 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, WREG32_SOC15 114 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, WREG32_SOC15 123 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, WREG32_SOC15 125 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, WREG32_SOC15 129 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, WREG32_SOC15 131 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, WREG32_SOC15 137 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL2, tmp); WREG32_SOC15 158 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15 178 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp); WREG32_SOC15 183 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp); WREG32_SOC15 194 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp); WREG32_SOC15 199 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL4, tmp); WREG32_SOC15 209 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_CNTL, tmp); WREG32_SOC15 217 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32, WREG32_SOC15 219 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32, WREG32_SOC15 222 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, WREG32_SOC15 224 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, WREG32_SOC15 227 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, WREG32_SOC15 229 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, WREG32_SOC15 316 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_BASE, WREG32_SOC15 318 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_FB_LOCATION_TOP, WREG32_SOC15 352 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15 358 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp); WREG32_SOC15 359 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, 0); WREG32_SOC15 408 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp); WREG32_SOC15 486 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmATC_L2_MISC_CG, data); WREG32_SOC15 490 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); WREG32_SOC15 492 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV, data1); WREG32_SOC15 496 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmDAGB1_CNTL_MISC2, data2); WREG32_SOC15 512 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c WREG32_SOC15(MMHUB, 0, mmATC_L2_MISC_CG, data); WREG32_SOC15 38 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, WREG32_SOC15 41 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, WREG32_SOC15 49 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, WREG32_SOC15 51 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, WREG32_SOC15 54 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, WREG32_SOC15 56 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, WREG32_SOC15 66 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0); WREG32_SOC15 67 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, 0); WREG32_SOC15 68 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, 0x00FFFFFF); WREG32_SOC15 71 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, WREG32_SOC15 73 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, WREG32_SOC15 79 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, WREG32_SOC15 81 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, WREG32_SOC15 85 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, WREG32_SOC15 87 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, WREG32_SOC15 93 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL2, tmp); WREG32_SOC15 113 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15 132 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp); WREG32_SOC15 137 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL2, tmp); WREG32_SOC15 149 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, tmp); WREG32_SOC15 154 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL4, tmp); WREG32_SOC15 164 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, tmp); WREG32_SOC15 169 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, WREG32_SOC15 172 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, WREG32_SOC15 176 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, WREG32_SOC15 178 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, WREG32_SOC15 181 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, WREG32_SOC15 183 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, WREG32_SOC15 249 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_FB_LOCATION_BASE, WREG32_SOC15 251 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_FB_LOCATION_TOP, WREG32_SOC15 283 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp); WREG32_SOC15 288 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp); WREG32_SOC15 289 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL3, 0); WREG32_SOC15 331 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL, tmp); WREG32_SOC15 390 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_MISC_CG, data); WREG32_SOC15 393 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); WREG32_SOC15 409 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c WREG32_SOC15(MMHUB, 0, mmMM_ATC_L2_MISC_CG, data); WREG32_SOC15 51 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); WREG32_SOC15 68 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); WREG32_SOC15 70 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0); WREG32_SOC15 71 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0); WREG32_SOC15 123 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE, ih->gpu_addr >> 8); WREG32_SOC15 124 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI, (ih->gpu_addr >> 40) & 0xff); WREG32_SOC15 136 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); WREG32_SOC15 140 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); WREG32_SOC15 143 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_ADDR_LO, WREG32_SOC15 145 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_ADDR_HI, WREG32_SOC15 149 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0); WREG32_SOC15 150 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0); WREG32_SOC15 163 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR, ih_doorbell_rtpr); WREG32_SOC15 171 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL, tmp); WREG32_SOC15 175 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL, tmp); WREG32_SOC15 302 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr); WREG32_SOC15 418 drivers/gpu/drm/amd/amdgpu/navi10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data); WREG32_SOC15 48 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, WREG32_SOC15 52 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); WREG32_SOC15 134 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW, WREG32_SOC15 136 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH, WREG32_SOC15 140 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL, WREG32_SOC15 162 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); WREG32_SOC15 170 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); WREG32_SOC15 184 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); WREG32_SOC15 46 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, WREG32_SOC15 50 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); WREG32_SOC15 104 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW, WREG32_SOC15 106 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH, WREG32_SOC15 110 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, tmp); WREG32_SOC15 126 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); WREG32_SOC15 134 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); WREG32_SOC15 142 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); WREG32_SOC15 38 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL, WREG32_SOC15 40 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL, WREG32_SOC15 57 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, WREG32_SOC15 60 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); WREG32_SOC15 137 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); WREG32_SOC15 144 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset); WREG32_SOC15 153 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset); WREG32_SOC15 154 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmSYSHUB_DATA, data); WREG32_SOC15 237 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); WREG32_SOC15 245 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); WREG32_SOC15 55 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL, WREG32_SOC15 57 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL, WREG32_SOC15 74 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, WREG32_SOC15 77 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); WREG32_SOC15 167 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW, WREG32_SOC15 169 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH, WREG32_SOC15 173 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp); WREG32_SOC15 187 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); WREG32_SOC15 238 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); WREG32_SOC15 246 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); WREG32_SOC15 769 drivers/gpu/drm/amd/amdgpu/nv.c WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl); WREG32_SOC15 789 drivers/gpu/drm/amd/amdgpu/nv.c WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); WREG32_SOC15 816 drivers/gpu/drm/amd/amdgpu/nv.c WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); WREG32_SOC15 819 drivers/gpu/drm/amd/amdgpu/nv.c WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl1); WREG32_SOC15 850 drivers/gpu/drm/amd/amdgpu/nv.c WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl); WREG32_SOC15 131 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); WREG32_SOC15 134 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); WREG32_SOC15 137 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); WREG32_SOC15 141 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); WREG32_SOC15 162 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); WREG32_SOC15 234 drivers/gpu/drm/amd/amdgpu/psp_v10_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, psp_write_ptr_reg); WREG32_SOC15 237 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 240 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 279 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 282 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 320 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 323 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 345 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); WREG32_SOC15 346 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); WREG32_SOC15 347 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); WREG32_SOC15 357 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); WREG32_SOC15 358 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); WREG32_SOC15 359 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); WREG32_SOC15 409 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, WREG32_SOC15 412 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, WREG32_SOC15 446 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); WREG32_SOC15 449 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); WREG32_SOC15 452 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, WREG32_SOC15 465 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); WREG32_SOC15 468 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); WREG32_SOC15 471 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); WREG32_SOC15 475 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); WREG32_SOC15 555 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_write_ptr_reg); WREG32_SOC15 556 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD); WREG32_SOC15 558 drivers/gpu/drm/amd/amdgpu/psp_v11_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, psp_write_ptr_reg); WREG32_SOC15 116 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 119 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 157 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 160 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 182 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); WREG32_SOC15 183 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); WREG32_SOC15 184 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); WREG32_SOC15 194 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); WREG32_SOC15 195 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); WREG32_SOC15 196 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); WREG32_SOC15 249 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); WREG32_SOC15 252 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); WREG32_SOC15 255 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, WREG32_SOC15 268 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); WREG32_SOC15 271 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); WREG32_SOC15 274 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); WREG32_SOC15 278 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); WREG32_SOC15 299 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, WREG32_SOC15 302 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, WREG32_SOC15 385 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_write_ptr_reg); WREG32_SOC15 386 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_CONSUME_CMD); WREG32_SOC15 388 drivers/gpu/drm/amd/amdgpu/psp_v12_0.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, psp_write_ptr_reg); WREG32_SOC15 156 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 159 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 219 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, WREG32_SOC15 222 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, WREG32_SOC15 274 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); WREG32_SOC15 275 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); WREG32_SOC15 276 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); WREG32_SOC15 286 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); WREG32_SOC15 287 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); WREG32_SOC15 288 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); WREG32_SOC15 314 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); WREG32_SOC15 317 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); WREG32_SOC15 322 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, psp_ring_reg); WREG32_SOC15 335 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); WREG32_SOC15 338 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); WREG32_SOC15 341 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); WREG32_SOC15 345 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); WREG32_SOC15 369 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, psp_ring_reg); WREG32_SOC15 381 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); WREG32_SOC15 461 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_write_ptr_reg); WREG32_SOC15 463 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, WREG32_SOC15 466 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, psp_write_ptr_reg); WREG32_SOC15 58 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmSMUIO_PWRMGT, reg); WREG32_SOC15 66 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, enable ? 1 : 0); WREG32_SOC15 92 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_CON, reg); WREG32_SOC15 112 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_FS_SPKLEN, 2); WREG32_SOC15 113 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SS_SCL_HCNT, 120); WREG32_SOC15 114 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SS_SCL_LCNT, 130); WREG32_SOC15 115 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_SDA_HOLD, 20); WREG32_SOC15 124 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TAR, (address & 0xFF)); WREG32_SOC15 274 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD, reg); WREG32_SOC15 362 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_DATA_CMD, reg); WREG32_SOC15 406 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, reg); WREG32_SOC15 410 drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c WREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_ENABLE, reg); WREG32_SOC15 232 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg)); WREG32_SOC15 243 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmGC_CAC_IND_INDEX, (reg)); WREG32_SOC15 244 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmGC_CAC_IND_DATA, (v)); WREG32_SOC15 254 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg)); WREG32_SOC15 265 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmSE_CAC_IND_INDEX, (reg)); WREG32_SOC15 266 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_SOC15(GC, 0, mmSE_CAC_IND_DATA, (v)); WREG32_SOC15 68 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c WREG32_SOC15(RSMU, 0, mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU, WREG32_SOC15 140 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 162 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR, WREG32_SOC15 165 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2, WREG32_SOC15 660 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 664 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 668 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0); WREG32_SOC15 671 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 673 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 676 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, WREG32_SOC15 680 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size); WREG32_SOC15 682 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, WREG32_SOC15 684 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, WREG32_SOC15 686 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET1, (1 << 21)); WREG32_SOC15 687 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_UVD_HEAP_SIZE); WREG32_SOC15 689 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW, WREG32_SOC15 691 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, WREG32_SOC15 693 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET2, (2 << 21)); WREG32_SOC15 694 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE2, WREG32_SOC15 697 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_UDEC_ADDR_CONFIG, WREG32_SOC15 699 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_UDEC_DB_ADDR_CONFIG, WREG32_SOC15 701 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_UDEC_DBW_ADDR_CONFIG, WREG32_SOC15 704 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_GP_SCRATCH4, adev->uvd.max_handles); WREG32_SOC15 720 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_CTX_ADDR_LO, lower_32_bits(addr)); WREG32_SOC15 721 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_CTX_ADDR_HI, upper_32_bits(addr)); WREG32_SOC15 727 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_VMID, data); WREG32_SOC15 730 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_CTX_SIZE, size); WREG32_SOC15 733 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP, 0); WREG32_SOC15 744 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_HOST, 0x10000001); WREG32_SOC15 971 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET, WREG32_SOC15 983 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_LMI_CTRL, WREG32_SOC15 996 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl); WREG32_SOC15 997 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MP_SWAP_CNTL, mp_swap_cntl); WREG32_SOC15 999 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXA0, 0x40c2040); WREG32_SOC15 1000 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXA1, 0x0); WREG32_SOC15 1001 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXB0, 0x40c2040); WREG32_SOC15 1002 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXB1, 0x0); WREG32_SOC15 1003 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MPC_SET_ALU, 0); WREG32_SOC15 1004 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUX, 0x88); WREG32_SOC15 1007 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET, WREG32_SOC15 1012 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_VCPU_CNTL, WREG32_SOC15 1020 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_SOFT_RESET, 0); WREG32_SOC15 1068 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RBC_RB_CNTL, tmp); WREG32_SOC15 1071 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RBC_RB_WPTR_CNTL, 0); WREG32_SOC15 1074 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR_ADDR, WREG32_SOC15 1078 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, WREG32_SOC15 1080 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 1084 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR, 0); WREG32_SOC15 1087 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1094 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1095 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1096 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO, ring->gpu_addr); WREG32_SOC15 1097 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1098 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 1101 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1102 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1103 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_BASE_LO2, ring->gpu_addr); WREG32_SOC15 1104 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1105 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, k, mmUVD_RB_SIZE2, ring->ring_size / 4); WREG32_SOC15 1125 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_RBC_RB_CNTL, 0x11010101); WREG32_SOC15 1134 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_SOFT_RESET, WREG32_SOC15 1139 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CNTL, 0x0); WREG32_SOC15 1231 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_CONTEXT_ID, 0xCAFEDEAD); WREG32_SOC15 1631 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_CGC_CTRL, data); WREG32_SOC15 1632 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE, 0); WREG32_SOC15 1633 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1); WREG32_SOC15 1634 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_CTRL, data2); WREG32_SOC15 1674 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_CGC_GATE, data); WREG32_SOC15 1675 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_SUVD_CGC_GATE, data1); WREG32_SOC15 1734 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c WREG32_SOC15(UVD, ring->me, mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK); WREG32_SOC15 301 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 303 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 305 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); WREG32_SOC15 308 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 310 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 313 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, WREG32_SOC15 317 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); WREG32_SOC15 320 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, WREG32_SOC15 322 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, WREG32_SOC15 324 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0); WREG32_SOC15 325 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE); WREG32_SOC15 328 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW, WREG32_SOC15 330 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, WREG32_SOC15 332 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET2, 0); WREG32_SOC15 333 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); WREG32_SOC15 335 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_UDEC_ADDR_CONFIG, WREG32_SOC15 337 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_UDEC_DB_ADDR_CONFIG, WREG32_SOC15 339 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_UDEC_DBW_ADDR_CONFIG, WREG32_SOC15 341 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_UDEC_DBW_UV_ADDR_CONFIG, WREG32_SOC15 343 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MIF_CURR_ADDR_CONFIG, WREG32_SOC15 345 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MIF_CURR_UV_ADDR_CONFIG, WREG32_SOC15 347 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MIF_RECON1_ADDR_CONFIG, WREG32_SOC15 349 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MIF_RECON1_UV_ADDR_CONFIG, WREG32_SOC15 351 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MIF_REF_ADDR_CONFIG, WREG32_SOC15 353 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MIF_REF_UV_ADDR_CONFIG, WREG32_SOC15 355 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JPEG_ADDR_CONFIG, WREG32_SOC15 357 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JPEG_UV_ADDR_CONFIG, WREG32_SOC15 455 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data); WREG32_SOC15 459 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data); WREG32_SOC15 470 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 493 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data); WREG32_SOC15 516 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 544 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data); WREG32_SOC15 557 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data); WREG32_SOC15 580 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data); WREG32_SOC15 584 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data); WREG32_SOC15 594 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 617 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 630 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data); WREG32_SOC15 705 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data); WREG32_SOC15 719 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data); WREG32_SOC15 730 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); WREG32_SOC15 743 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); WREG32_SOC15 758 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data); WREG32_SOC15 795 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp); WREG32_SOC15 806 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp | WREG32_SOC15 816 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl); WREG32_SOC15 821 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_CNTL, tmp); WREG32_SOC15 823 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXA0, WREG32_SOC15 829 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXB0, WREG32_SOC15 835 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUX, WREG32_SOC15 842 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_REG_XX_MASK, 0x10); WREG32_SOC15 843 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_XX_IB_REG_CHECK, WREG32_SOC15 847 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); WREG32_SOC15 860 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_SOFT_RESET, tmp); WREG32_SOC15 901 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp); WREG32_SOC15 910 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); WREG32_SOC15 913 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR_CNTL, 0); WREG32_SOC15 916 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR, WREG32_SOC15 920 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, WREG32_SOC15 922 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 926 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0); WREG32_SOC15 928 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0); WREG32_SOC15 931 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 938 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 939 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 940 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); WREG32_SOC15 941 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 942 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 945 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 946 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 947 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr); WREG32_SOC15 948 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 949 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4); WREG32_SOC15 952 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0); WREG32_SOC15 953 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_NO_FETCH_MASK | WREG32_SOC15 955 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, lower_32_bits(ring->gpu_addr)); WREG32_SOC15 956 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 957 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, 0); WREG32_SOC15 958 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, 0); WREG32_SOC15 959 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, UVD_JRBC_RB_CNTL__RB_RPTR_WR_EN_MASK); WREG32_SOC15 986 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp); WREG32_SOC15 1083 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); WREG32_SOC15 1086 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR_CNTL, 0); WREG32_SOC15 1089 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR, WREG32_SOC15 1093 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, WREG32_SOC15 1095 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 1099 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0); WREG32_SOC15 1101 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0); WREG32_SOC15 1104 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1173 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_STATUS, 0); WREG32_SOC15 1254 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); WREG32_SOC15 1261 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); WREG32_SOC15 1262 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1263 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 1264 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1265 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1268 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr); WREG32_SOC15 1269 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1270 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4); WREG32_SOC15 1271 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1272 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1275 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1284 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); WREG32_SOC15 1310 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, reg_data2); WREG32_SOC15 1314 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); WREG32_SOC15 1321 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0); WREG32_SOC15 1322 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, WREG32_SOC15 1325 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, WREG32_SOC15 1327 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 1329 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, ring->wptr); WREG32_SOC15 1330 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, ring->wptr); WREG32_SOC15 1331 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, WREG32_SOC15 1335 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1344 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); WREG32_SOC15 1428 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, WREG32_SOC15 1431 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1636 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, WREG32_SOC15 1639 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, WREG32_SOC15 1760 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 370 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 372 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 374 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); WREG32_SOC15 377 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 379 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 382 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, WREG32_SOC15 386 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); WREG32_SOC15 389 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, WREG32_SOC15 391 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, WREG32_SOC15 393 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0); WREG32_SOC15 394 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE); WREG32_SOC15 397 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW, WREG32_SOC15 399 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, WREG32_SOC15 401 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET2, 0); WREG32_SOC15 402 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); WREG32_SOC15 404 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); WREG32_SOC15 405 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); WREG32_SOC15 521 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 544 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data); WREG32_SOC15 567 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 595 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data); WREG32_SOC15 608 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data); WREG32_SOC15 694 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, tmp); WREG32_SOC15 702 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, tmp); WREG32_SOC15 713 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0); WREG32_SOC15 714 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L)); WREG32_SOC15 715 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, WREG32_SOC15 717 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 719 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_RPTR, 0); WREG32_SOC15 720 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, 0); WREG32_SOC15 721 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, 0x00000002L); WREG32_SOC15 722 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 750 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, tmp); WREG32_SOC15 759 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, tmp); WREG32_SOC15 802 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 825 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data); WREG32_SOC15 838 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data); WREG32_SOC15 858 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data); WREG32_SOC15 872 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data); WREG32_SOC15 885 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); WREG32_SOC15 898 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data); WREG32_SOC15 912 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data); WREG32_SOC15 939 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_POWER_STATUS, tmp); WREG32_SOC15 1027 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); WREG32_SOC15 1030 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR_CNTL, 0); WREG32_SOC15 1033 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR, WREG32_SOC15 1037 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, WREG32_SOC15 1039 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 1043 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0); WREG32_SOC15 1045 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, 0); WREG32_SOC15 1048 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1075 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_STATUS, tmp); WREG32_SOC15 1090 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp | WREG32_SOC15 1100 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_MPC_CNTL, tmp); WREG32_SOC15 1103 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXA0, WREG32_SOC15 1110 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXB0, WREG32_SOC15 1117 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUX, WREG32_SOC15 1135 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_SOFT_RESET, tmp); WREG32_SOC15 1143 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl); WREG32_SOC15 1183 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_VMID, 0); WREG32_SOC15 1192 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_CNTL, tmp); WREG32_SOC15 1195 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, WREG32_SOC15 1197 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 1201 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0); WREG32_SOC15 1204 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1208 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1209 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1210 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); WREG32_SOC15 1211 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1212 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 1215 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1216 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1217 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr); WREG32_SOC15 1218 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1219 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4); WREG32_SOC15 1291 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_LMI_CTRL2, tmp); WREG32_SOC15 1319 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(VCN, 0, mmUVD_STATUS, 0); WREG32_SOC15 1353 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); WREG32_SOC15 1362 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO, ring->gpu_addr); WREG32_SOC15 1363 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1364 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 1365 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1366 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1369 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_LO2, ring->gpu_addr); WREG32_SOC15 1370 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 1371 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_SIZE2, ring->ring_size / 4); WREG32_SOC15 1372 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1373 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1375 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, WREG32_SOC15 1385 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_DPG_PAUSE, reg_data); WREG32_SOC15 1472 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_SCRATCH2, WREG32_SOC15 1479 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1706 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1713 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1839 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 387 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 389 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 391 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0); WREG32_SOC15 394 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, WREG32_SOC15 396 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, WREG32_SOC15 399 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, WREG32_SOC15 402 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size); WREG32_SOC15 405 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, WREG32_SOC15 407 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, WREG32_SOC15 409 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET1, 0); WREG32_SOC15 410 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_VCN_STACK_SIZE); WREG32_SOC15 413 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW, WREG32_SOC15 415 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH, WREG32_SOC15 417 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET2, 0); WREG32_SOC15 418 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE); WREG32_SOC15 446 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data); WREG32_SOC15 470 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_CGC_GATE, data); WREG32_SOC15 495 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data); WREG32_SOC15 523 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_GATE, data); WREG32_SOC15 536 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_CTRL, data); WREG32_SOC15 563 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data); WREG32_SOC15 585 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_CGC_CTRL, data); WREG32_SOC15 598 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_SUVD_CGC_CTRL, data); WREG32_SOC15 628 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmJPEG_CGC_CTRL, tmp); WREG32_SOC15 635 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmJPEG_CGC_GATE, tmp); WREG32_SOC15 642 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmJPEG_CGC_CTRL, tmp); WREG32_SOC15 645 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmJPEG_DEC_GFX8_ADDR_CONFIG, WREG32_SOC15 647 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmJPEG_DEC_GFX10_ADDR_CONFIG, WREG32_SOC15 659 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_JRBC_RB_VMID, 0); WREG32_SOC15 660 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L)); WREG32_SOC15 661 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, WREG32_SOC15 663 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 665 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_JRBC_RB_RPTR, 0); WREG32_SOC15 666 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_JRBC_RB_WPTR, 0); WREG32_SOC15 667 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_JRBC_RB_CNTL, 0x00000002L); WREG32_SOC15 668 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_JRBC_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 700 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmJPEG_CGC_GATE, tmp); WREG32_SOC15 726 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_STATUS, tmp); WREG32_SOC15 746 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_CTRL, tmp | 0x8| WREG32_SOC15 756 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_MPC_CNTL, tmp); WREG32_SOC15 759 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_MPC_SET_MUXA0, WREG32_SOC15 766 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_MPC_SET_MUXB0, WREG32_SOC15 773 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_MPC_SET_MUX, WREG32_SOC15 785 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_GFX8_ADDR_CONFIG, WREG32_SOC15 787 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_GFX8_ADDR_CONFIG, WREG32_SOC15 843 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_RBC_RB_VMID, 0); WREG32_SOC15 853 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RBC_RB_CNTL, tmp); WREG32_SOC15 856 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, WREG32_SOC15 858 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH, WREG32_SOC15 862 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RBC_RB_RPTR, 0); WREG32_SOC15 865 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RBC_RB_WPTR, WREG32_SOC15 868 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 869 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 870 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_BASE_LO, ring->gpu_addr); WREG32_SOC15 871 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 872 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_SIZE, ring->ring_size / 4); WREG32_SOC15 875 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 876 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 877 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_BASE_LO2, ring->gpu_addr); WREG32_SOC15 878 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); WREG32_SOC15 879 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, i, mmUVD_RB_SIZE2, ring->ring_size / 4); WREG32_SOC15 914 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_LMI_CTRL2, tmp); WREG32_SOC15 937 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(VCN, i, mmUVD_STATUS, 0); WREG32_SOC15 996 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1087 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 1094 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); WREG32_SOC15 1175 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c WREG32_SOC15(UVD, ring->me, mmUVD_JRBC_RB_WPTR, lower_32_bits(ring->wptr)); WREG32_SOC15 59 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); WREG32_SOC15 74 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); WREG32_SOC15 90 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); WREG32_SOC15 115 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); WREG32_SOC15 119 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0); WREG32_SOC15 120 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0); WREG32_SOC15 135 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); WREG32_SOC15 138 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, 0); WREG32_SOC15 139 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING1, 0); WREG32_SOC15 155 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); WREG32_SOC15 159 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING2, 0); WREG32_SOC15 160 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING2, 0); WREG32_SOC15 233 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE, ih->gpu_addr >> 8); WREG32_SOC15 234 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI, (ih->gpu_addr >> 40) & 0xff); WREG32_SOC15 253 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); WREG32_SOC15 259 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); WREG32_SOC15 262 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_ADDR_LO, WREG32_SOC15 264 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_ADDR_HI, WREG32_SOC15 268 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR, 0); WREG32_SOC15 269 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, 0); WREG32_SOC15 271 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR, WREG32_SOC15 276 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_RING1, ih->gpu_addr >> 8); WREG32_SOC15 277 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI_RING1, WREG32_SOC15 293 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); WREG32_SOC15 297 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING1, 0); WREG32_SOC15 298 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, 0); WREG32_SOC15 300 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR_RING1, WREG32_SOC15 306 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_RING2, ih->gpu_addr >> 8); WREG32_SOC15 307 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_BASE_HI_RING2, WREG32_SOC15 320 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); WREG32_SOC15 324 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_WPTR_RING2, 0); WREG32_SOC15 325 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING2, 0); WREG32_SOC15 327 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR_RING2, WREG32_SOC15 334 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL, tmp); WREG32_SOC15 338 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL, tmp); WREG32_SOC15 520 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr); WREG32_SOC15 522 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING1, ih->rptr); WREG32_SOC15 524 drivers/gpu/drm/amd/amdgpu/vega10_ih.c WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR_RING2, ih->rptr); WREG32_SOC15 945 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); WREG32_SOC15 960 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); WREG32_SOC15 996 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); WREG32_SOC15 1005 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); WREG32_SOC15 1057 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); WREG32_SOC15 1068 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); WREG32_SOC15 1107 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); WREG32_SOC15 1116 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); WREG32_SOC15 1166 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, 0xE0000000); WREG32_SOC15 142 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 145 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 162 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 166 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 278 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0, WREG32_SOC15 326 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_TACH_CTRL, WREG32_SOC15 392 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); WREG32_SOC15 407 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_TACH_CTRL, WREG32_SOC15 413 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 447 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val); WREG32_SOC15 474 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0); WREG32_SOC15 196 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); WREG32_SOC15 215 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val); WREG32_SOC15 228 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0); WREG32_SOC15 91 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c WREG32_SOC15(THM, 0, mmTHM_BACO_CNTL, data); WREG32_SOC15 94 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 97 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 160 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0, WREG32_SOC15 203 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmCG_TACH_CTRL, WREG32_SOC15 266 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); WREG32_SOC15 285 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val); WREG32_SOC15 298 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0); WREG32_SOC15 60 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); WREG32_SOC15 102 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 133 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 135 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, param); WREG32_SOC15 1158 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); WREG32_SOC15 1172 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val); WREG32_SOC15 1412 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 1415 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL2, WREG32_SOC15 1444 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(THM, 0, mmCG_FDO_CTRL0, WREG32_SOC15 1496 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_SOC15(THM, 0, mmCG_TACH_CTRL, WREG32_SOC15 49 drivers/gpu/drm/amd/powerplay/smu_v12_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); WREG32_SOC15 91 drivers/gpu/drm/amd/powerplay/smu_v12_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 121 drivers/gpu/drm/amd/powerplay/smu_v12_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 123 drivers/gpu/drm/amd/powerplay/smu_v12_0.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, param); WREG32_SOC15 67 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); WREG32_SOC15 85 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 103 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 105 drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); WREG32_SOC15 86 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); WREG32_SOC15 104 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 130 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 132 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); WREG32_SOC15 92 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); WREG32_SOC15 110 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 136 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); WREG32_SOC15 138 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter);