WREG32_SDMA       614 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(ring->me, mmSDMA0_GFX_RB_WPTR,
WREG32_SDMA       616 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(ring->me, mmSDMA0_GFX_RB_WPTR_HI,
WREG32_SDMA       665 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(ring->me, mmSDMA0_PAGE_RB_WPTR,
WREG32_SDMA       667 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(ring->me, mmSDMA0_PAGE_RB_WPTR_HI,
WREG32_SDMA       822 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL, rb_cntl);
WREG32_SDMA       825 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl);
WREG32_SDMA       869 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL, rb_cntl);
WREG32_SDMA       873 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl);
WREG32_SDMA       921 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 			WREG32_SDMA(i, mmSDMA0_PHASE0_QUANTUM, phase_quantum);
WREG32_SDMA       922 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 			WREG32_SDMA(i, mmSDMA0_PHASE1_QUANTUM, phase_quantum);
WREG32_SDMA       923 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 			WREG32_SDMA(i, mmSDMA0_PHASE2_QUANTUM, phase_quantum);
WREG32_SDMA       925 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_CNTL, f32_cntl);
WREG32_SDMA       953 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_F32_CNTL, f32_cntl);
WREG32_SDMA       996 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL, rb_cntl);
WREG32_SDMA       999 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR, 0);
WREG32_SDMA      1000 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_HI, 0);
WREG32_SDMA      1001 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR, 0);
WREG32_SDMA      1002 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_HI, 0);
WREG32_SDMA      1005 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_ADDR_HI,
WREG32_SDMA      1007 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_RPTR_ADDR_LO,
WREG32_SDMA      1013 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE, ring->gpu_addr >> 8);
WREG32_SDMA      1014 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_BASE_HI, ring->gpu_addr >> 40);
WREG32_SDMA      1019 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_MINOR_PTR_UPDATE, 1);
WREG32_SDMA      1029 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
WREG32_SDMA      1030 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);
WREG32_SDMA      1035 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_MINOR_PTR_UPDATE, 0);
WREG32_SDMA      1039 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO,
WREG32_SDMA      1041 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI,
WREG32_SDMA      1047 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, wptr_poll_cntl);
WREG32_SDMA      1051 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_RB_CNTL, rb_cntl);
WREG32_SDMA      1059 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl);
WREG32_SDMA      1086 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL, rb_cntl);
WREG32_SDMA      1089 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR, 0);
WREG32_SDMA      1090 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR_HI, 0);
WREG32_SDMA      1091 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR, 0);
WREG32_SDMA      1092 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_HI, 0);
WREG32_SDMA      1095 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR_ADDR_HI,
WREG32_SDMA      1097 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_RPTR_ADDR_LO,
WREG32_SDMA      1103 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_BASE, ring->gpu_addr >> 8);
WREG32_SDMA      1104 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_BASE_HI, ring->gpu_addr >> 40);
WREG32_SDMA      1109 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_MINOR_PTR_UPDATE, 1);
WREG32_SDMA      1119 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_DOORBELL, doorbell);
WREG32_SDMA      1120 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_DOORBELL_OFFSET, doorbell_offset);
WREG32_SDMA      1126 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_MINOR_PTR_UPDATE, 0);
WREG32_SDMA      1130 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_ADDR_LO,
WREG32_SDMA      1132 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_ADDR_HI,
WREG32_SDMA      1138 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, wptr_poll_cntl);
WREG32_SDMA      1142 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_RB_CNTL, rb_cntl);
WREG32_SDMA      1150 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl);
WREG32_SDMA      1264 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_UCODE_ADDR, 0);
WREG32_SDMA      1267 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 			WREG32_SDMA(i, mmSDMA0_UCODE_DATA,
WREG32_SDMA      1270 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_UCODE_ADDR,
WREG32_SDMA      1311 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL, 0);
WREG32_SDMA      1319 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		WREG32_SDMA(i, mmSDMA0_CNTL, temp);
WREG32_SDMA      1325 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 			WREG32_SDMA(i, mmSDMA0_F32_CNTL, temp);
WREG32_SDMA      1995 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(type, mmSDMA0_CNTL, sdma_cntl);
WREG32_SDMA      2104 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 	WREG32_SDMA(type, mmSDMA0_EDC_CONFIG, sdma_edc_config);
WREG32_SDMA      2128 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 				WREG32_SDMA(i, mmSDMA0_CLK_CTRL, data);
WREG32_SDMA      2142 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 				WREG32_SDMA(i, mmSDMA0_CLK_CTRL, data);
WREG32_SDMA      2161 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 				WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data);
WREG32_SDMA      2169 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 				WREG32_SDMA(0, mmSDMA0_POWER_CNTL, data);