WREG32_PLL_P      234 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	WREG32_PLL_P(RADEON_PPLL_REF_DIV,
WREG32_PLL_P      261 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	WREG32_PLL_P(RADEON_P2PLL_REF_DIV,
WREG32_PLL_P      864 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_PIXCLKS_CNTL,
WREG32_PLL_P      868 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_P2PLL_CNTL,
WREG32_PLL_P      876 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_P2PLL_REF_DIV,
WREG32_PLL_P      880 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_P2PLL_DIV_0,
WREG32_PLL_P      884 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_P2PLL_DIV_0,
WREG32_PLL_P      893 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_P2PLL_CNTL,
WREG32_PLL_P      912 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_PIXCLKS_CNTL,
WREG32_PLL_P      945 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,
WREG32_PLL_P      948 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_PPLL_CNTL,
WREG32_PLL_P      971 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 				WREG32_PLL_P(RADEON_PPLL_REF_DIV,
WREG32_PLL_P      976 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 				WREG32_PLL_P(RADEON_PPLL_REF_DIV,
WREG32_PLL_P      981 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			WREG32_PLL_P(RADEON_PPLL_REF_DIV,
WREG32_PLL_P      985 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_PPLL_DIV_3,
WREG32_PLL_P      989 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_PPLL_DIV_3,
WREG32_PLL_P      998 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_PPLL_CNTL,
WREG32_PLL_P     1017 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,
WREG32_PLL_P      118 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 		WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
WREG32_PLL_P      763 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVCLK_SRC_SEL_TVPLL);
WREG32_PLL_P      765 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVPLL_RESET, ~RADEON_TVPLL_RESET);
WREG32_PLL_P      769 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_RESET);
WREG32_PLL_P      774 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~0xf);
WREG32_PLL_P      775 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVCLK_SRC_SEL_TVPLL, ~RADEON_TVCLK_SRC_SEL_TVPLL);
WREG32_PLL_P      777 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, (1 << RADEON_TVPDC_SHIFT), ~RADEON_TVPDC_MASK);
WREG32_PLL_P      778 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_SLEEP);