WREG32_PLL       1103 drivers/gpu/drm/amd/amdgpu/amdgpu.h 		WREG32_PLL(reg, tmp_);				\
WREG32_PLL        426 drivers/gpu/drm/radeon/r100.c 	WREG32_PLL(SCLK_CNTL, sclk_cntl);
WREG32_PLL        427 drivers/gpu/drm/radeon/r100.c 	WREG32_PLL(SCLK_CNTL2, sclk_cntl2);
WREG32_PLL        428 drivers/gpu/drm/radeon/r100.c 	WREG32_PLL(SCLK_MORE_CNTL, sclk_more_cntl);
WREG32_PLL       2692 drivers/gpu/drm/radeon/r100.c 	WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp);
WREG32_PLL       3887 drivers/gpu/drm/radeon/r100.c 	WREG32_PLL(R_00000D_SCLK_CNTL, tmp);
WREG32_PLL       1375 drivers/gpu/drm/radeon/r300.c 	WREG32_PLL(R_00000D_SCLK_CNTL, tmp);
WREG32_PLL        208 drivers/gpu/drm/radeon/r420.c 	WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
WREG32_PLL         87 drivers/gpu/drm/radeon/r520.c 	WREG32_PLL(0x000D, tmp);
WREG32_PLL       2556 drivers/gpu/drm/radeon/radeon.h 		WREG32_PLL(reg, tmp_);				\
WREG32_PLL        401 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);
WREG32_PLL        405 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        411 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);
WREG32_PLL        417 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);
WREG32_PLL        424 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_M_SPLL_REF_FB_DIV, tmp);
WREG32_PLL        433 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);
WREG32_PLL        437 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);
WREG32_PLL        443 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SPLL_CNTL, tmp);
WREG32_PLL        464 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        470 drivers/gpu/drm/radeon/radeon_clocks.c 	WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);
WREG32_PLL        495 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        518 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        523 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
WREG32_PLL        528 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL        544 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL        553 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(R300_SCLK_CNTL2, tmp);
WREG32_PLL        571 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        576 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
WREG32_PLL        581 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL        597 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL        602 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_MCLK_MISC, tmp);
WREG32_PLL        634 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_MCLK_CNTL, tmp);
WREG32_PLL        639 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        646 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(R300_SCLK_CNTL2, tmp);
WREG32_PLL        657 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_CLK_PWRMGT_CNTL, tmp);
WREG32_PLL        662 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);
WREG32_PLL        686 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        702 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
WREG32_PLL        714 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp);
WREG32_PLL        728 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL        735 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL        749 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        761 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        765 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
WREG32_PLL        771 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL        788 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL        794 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(R300_SCLK_CNTL2, tmp);
WREG32_PLL        805 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        809 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
WREG32_PLL        816 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_MCLK_CNTL, tmp);
WREG32_PLL        822 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL        839 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL        866 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_SCLK_CNTL, tmp);
WREG32_PLL        876 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(R300_SCLK_CNTL2, tmp);
WREG32_PLL        884 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_MCLK_CNTL, tmp);
WREG32_PLL        893 drivers/gpu/drm/radeon/radeon_clocks.c 				WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
WREG32_PLL        906 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL        912 drivers/gpu/drm/radeon/radeon_clocks.c 			WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL       2993 drivers/gpu/drm/radeon/radeon_combios.c 					WREG32_PLL(reg, val);
WREG32_PLL       3110 drivers/gpu/drm/radeon/radeon_combios.c 				WREG32_PLL(addr, val);
WREG32_PLL       3123 drivers/gpu/drm/radeon/radeon_combios.c 				WREG32_PLL(addr, tmp);
WREG32_PLL       3162 drivers/gpu/drm/radeon/radeon_combios.c 						WREG32_PLL(RADEON_MCLK_CNTL,
WREG32_PLL       3166 drivers/gpu/drm/radeon/radeon_combios.c 						WREG32_PLL
WREG32_PLL        891 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL(RADEON_HTOTAL2_CNTL, htotal_cntl);
WREG32_PLL        916 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
WREG32_PLL        996 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 		WREG32_PLL(RADEON_HTOTAL_CNTL, htotal_cntl);
WREG32_PLL       1022 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 			WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
WREG32_PLL        130 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 		WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
WREG32_PLL        668 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
WREG32_PLL        711 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	WREG32_PLL(RADEON_VCLK_ECP_CNTL, vclk_ecp_cntl);
WREG32_PLL       1602 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
WREG32_PLL       1676 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
WREG32_PLL        287 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL(RADEON_PLL_TEST_CNTL, save_pll_test & ~RADEON_PLL_MASK_READ_B);
WREG32_PLL        296 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL(RADEON_PLL_TEST_CNTL, save_pll_test);
WREG32_PLL        764 drivers/gpu/drm/radeon/radeon_legacy_tv.c 	WREG32_PLL(RADEON_TV_PLL_CNTL, tv_pll_cntl);
WREG32_PLL        268 drivers/gpu/drm/radeon/rs600.c 	WREG32_PLL(DYN_PWRMGT_SCLK_LENGTH, dyn_pwrmgt_sclk_length);
WREG32_PLL        280 drivers/gpu/drm/radeon/rs600.c 	WREG32_PLL(DYN_SCLK_VOL_CNTL, dyn_sclk_vol_cntl);
WREG32_PLL        287 drivers/gpu/drm/radeon/rs600.c 	WREG32_PLL(HDP_DYN_CNTL, hdp_dyn_cntl);
WREG32_PLL        295 drivers/gpu/drm/radeon/rs600.c 	WREG32_PLL(MC_HOST_DYN_CNTL, mc_host_dyn_cntl);
WREG32_PLL        302 drivers/gpu/drm/radeon/rs600.c 	WREG32_PLL(DYN_BACKBIAS_CNTL, dyn_backbias_cntl);
WREG32_PLL        171 drivers/gpu/drm/radeon/rv515.c 	WREG32_PLL(0x000D, tmp);
WREG32_PLL        509 drivers/gpu/drm/radeon/rv515.c 	WREG32_PLL(R_00000F_CP_DYN_CNTL,
WREG32_PLL        511 drivers/gpu/drm/radeon/rv515.c 	WREG32_PLL(R_000011_E2_DYN_CNTL,
WREG32_PLL        513 drivers/gpu/drm/radeon/rv515.c 	WREG32_PLL(R_000013_IDCT_DYN_CNTL,