WREG32_PCIE 94 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c return WREG32_PCIE(index, value); WREG32_PCIE 286 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c WREG32_PCIE(*pos >> 2, value); WREG32_PCIE 1462 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, tmp); WREG32_PCIE 1480 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL4, tmp); WREG32_PCIE 1484 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL4, tmp); WREG32_PCIE 1512 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL4, tmp); WREG32_PCIE 1521 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl); WREG32_PCIE 1535 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl); WREG32_PCIE 1566 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_N_FTS_CNTL, data); WREG32_PCIE 1571 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL3, data); WREG32_PCIE 1576 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_P_CNTL, data); WREG32_PCIE 1589 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL, data); WREG32_PCIE 1600 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPB0_PIF_PWRDOWN_0, data); WREG32_PCIE 1608 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPB0_PIF_PWRDOWN_1, data); WREG32_PCIE 1616 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPB1_PIF_PWRDOWN_0, data); WREG32_PCIE 1624 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPB1_PIF_PWRDOWN_1, data); WREG32_PCIE 1630 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL, data); WREG32_PCIE 1649 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL2, data); WREG32_PCIE 1686 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL, data); WREG32_PCIE 1694 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_CNTL2, data); WREG32_PCIE 1706 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_LC_CNTL, data); WREG32_PCIE 1770 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK, perfctr); WREG32_PCIE 1776 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_PERF_COUNT_CNTL, 0x00000005); WREG32_PCIE 1785 drivers/gpu/drm/amd/amdgpu/cik.c WREG32_PCIE(ixPCIE_PERF_COUNT_CNTL, 0x00000002); WREG32_PCIE 853 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c WREG32_PCIE(ixPCIE_CNTL2, data); WREG32_PCIE 210 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_PCIE(smnCPM_CONTROL, data); WREG32_PCIE 230 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_PCIE(smnPCIE_CNTL2, data); WREG32_PCIE 310 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_PCIE(smnPCIE_CONFIG_CNTL, data); WREG32_PCIE 170 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_PCIE(smnCPM_CONTROL, data); WREG32_PCIE 190 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_PCIE(smnPCIE_CNTL2, data); WREG32_PCIE 270 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_PCIE(smnPCIE_CONFIG_CNTL, data); WREG32_PCIE 276 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_PCIE(smnPCIE_CI_CNTL, data); WREG32_PCIE 171 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_PCIE(smnNBIF_MGCG_CTRL_LCLK, data); WREG32_PCIE 213 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_PCIE(smnPCIE_CNTL2, data); WREG32_PCIE 214 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_PCIE(smnPCIE_CNTL2, data); WREG32_PCIE 315 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_PCIE(smnPCIE_CI_CNTL, data); WREG32_PCIE 1358 drivers/gpu/drm/amd/amdgpu/si.c WREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK, perfctr); WREG32_PCIE 1364 drivers/gpu/drm/amd/amdgpu/si.c WREG32_PCIE(ixPCIE_PERF_COUNT_CNTL, 0x00000005); WREG32_PCIE 1373 drivers/gpu/drm/amd/amdgpu/si.c WREG32_PCIE(ixPCIE_PERF_COUNT_CNTL, 0x00000002); WREG32_PCIE 1850 drivers/gpu/drm/amd/amdgpu/si.c WREG32_PCIE(PCIE_P_CNTL, data); WREG32_PCIE 2013 drivers/gpu/drm/amd/amdgpu/si.c WREG32_PCIE(PCIE_CNTL2, data); WREG32_PCIE 852 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_PCIE(smnPCIE_PERF_CNTL_TXCLK, perfctr); WREG32_PCIE 858 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_PCIE(smnPCIE_PERF_COUNT_CNTL, 0x00000005); WREG32_PCIE 867 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_PCIE(smnPCIE_PERF_COUNT_CNTL, 0x00000002); WREG32_PCIE 901 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_PCIE(smnPCIE_PERF_CNTL_TXCLK3, perfctr); WREG32_PCIE 907 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_PCIE(smnPCIE_PERF_COUNT_CNTL, 0x00000005); WREG32_PCIE 916 drivers/gpu/drm/amd/amdgpu/soc15.c WREG32_PCIE(smnPCIE_PERF_COUNT_CNTL, 0x00000002); WREG32_PCIE 970 drivers/gpu/drm/amd/amdgpu/vi.c WREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK, perfctr); WREG32_PCIE 976 drivers/gpu/drm/amd/amdgpu/vi.c WREG32_PCIE(ixPCIE_PERF_COUNT_CNTL, 0x00000005); WREG32_PCIE 985 drivers/gpu/drm/amd/amdgpu/vi.c WREG32_PCIE(ixPCIE_PERF_COUNT_CNTL, 0x00000002); WREG32_PCIE 1374 drivers/gpu/drm/amd/amdgpu/vi.c WREG32_PCIE(ixPCIE_CNTL2, data); WREG32_PCIE 223 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_PCIE(addr_start, src[i]); WREG32_PCIE 227 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), WREG32_PCIE 229 drivers/gpu/drm/amd/powerplay/smu_v11_0.c WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), WREG32_PCIE 96 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp | RADEON_PCIE_TX_GART_INVALIDATE_TLB); WREG32_PCIE 98 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); WREG32_PCIE 168 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); WREG32_PCIE 169 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_start); WREG32_PCIE 171 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); WREG32_PCIE 172 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); WREG32_PCIE 173 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); WREG32_PCIE 175 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_BASE, table_addr); WREG32_PCIE 177 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO, rdev->mc.vram_start); WREG32_PCIE 178 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_HI, 0); WREG32_PCIE 180 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_ERROR, 0); WREG32_PCIE 184 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); WREG32_PCIE 197 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, 0); WREG32_PCIE 198 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, 0); WREG32_PCIE 199 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); WREG32_PCIE 200 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); WREG32_PCIE 203 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN); WREG32_PCIE 550 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl); WREG32_PCIE 551 drivers/gpu/drm/radeon/r300.c WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, (link_width_cntl | WREG32_PCIE 135 drivers/gpu/drm/radeon/rv6xx_dpm.c WREG32_PCIE(PCIE_P_CNTL, tmp); WREG32_PCIE 126 drivers/gpu/drm/radeon/rv770_dpm.c WREG32_PCIE(PCIE_P_CNTL, tmp); WREG32_PCIE 5582 drivers/gpu/drm/radeon/si.c WREG32_PCIE(PCIE_CNTL2, data); WREG32_PCIE 7274 drivers/gpu/drm/radeon/si.c WREG32_PCIE(PCIE_P_CNTL, data); WREG32_PCIE 7437 drivers/gpu/drm/radeon/si.c WREG32_PCIE(PCIE_CNTL2, data);