WREG32_OR        1640 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	WREG32_OR(mmHDMI_INFOFRAME_CONTROL0 + offset,
WREG32_OR        1648 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	WREG32_OR(mmAFMT_AUDIO_PACKET_CONTROL + offset,
WREG32_OR         538 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c 	WREG32_OR(mmVCE_VCPU_CNTL, 0x00100000);
WREG32_OR         215 drivers/gpu/drm/radeon/dce3_1_afmt.c 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,
WREG32_OR         219 drivers/gpu/drm/radeon/dce3_1_afmt.c 	WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,
WREG32_OR         229 drivers/gpu/drm/radeon/dce3_1_afmt.c 		WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE);
WREG32_OR        1750 drivers/gpu/drm/radeon/evergreen.c 		WREG32_OR(DC_HPDx_INT_CONTROL(hpd), DC_HPDx_INT_POLARITY);
WREG32_OR        4646 drivers/gpu/drm/radeon/evergreen.c 			WREG32_OR(DC_HPDx_INT_CONTROL(i), DC_HPDx_INT_ACK);
WREG32_OR        4651 drivers/gpu/drm/radeon/evergreen.c 			WREG32_OR(DC_HPDx_INT_CONTROL(i), DC_HPDx_RX_INT_ACK);
WREG32_OR        4656 drivers/gpu/drm/radeon/evergreen.c 			WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i],
WREG32_OR         384 drivers/gpu/drm/radeon/evergreen_hdmi.c 	WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset,
WREG32_OR         395 drivers/gpu/drm/radeon/evergreen_hdmi.c 		WREG32_OR(HDMI_GC + offset, HDMI_GC_AVMUTE);
WREG32_OR         419 drivers/gpu/drm/radeon/evergreen_hdmi.c 			WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
WREG32_OR         458 drivers/gpu/drm/radeon/evergreen_hdmi.c 		WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset,
WREG32_OR         231 drivers/gpu/drm/radeon/r600_hdmi.c 	WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,
WREG32_OR         234 drivers/gpu/drm/radeon/r600_hdmi.c 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,
WREG32_OR         345 drivers/gpu/drm/radeon/r600_hdmi.c 	WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset,
WREG32_OR         366 drivers/gpu/drm/radeon/r600_hdmi.c 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,
WREG32_OR         399 drivers/gpu/drm/radeon/r600_hdmi.c 		WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE);
WREG32_OR         453 drivers/gpu/drm/radeon/r600_hdmi.c 	WREG32_OR(HDMI0_CONTROL + offset,
WREG32_OR         461 drivers/gpu/drm/radeon/r600_hdmi.c 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,
WREG32_OR         487 drivers/gpu/drm/radeon/r600_hdmi.c 				WREG32_OR(AVIVO_TMDSA_CNTL, AVIVO_TMDSA_CNTL_HDMI_EN);
WREG32_OR         495 drivers/gpu/drm/radeon/r600_hdmi.c 				WREG32_OR(AVIVO_LVTMA_CNTL, AVIVO_LVTMA_CNTL_HDMI_EN);
WREG32_OR         503 drivers/gpu/drm/radeon/r600_hdmi.c 				WREG32_OR(DDIA_CNTL, DDIA_HDMI_EN);
WREG32_OR        6180 drivers/gpu/drm/radeon/si.c 			WREG32_OR(DC_HPDx_INT_CONTROL(i), DC_HPDx_INT_ACK);
WREG32_OR        6185 drivers/gpu/drm/radeon/si.c 			WREG32_OR(DC_HPDx_INT_CONTROL(i), DC_HPDx_RX_INT_ACK);
WREG32_OR         535 drivers/misc/habanalabs/goya/goya.c 	WREG32_OR(reg, asid);
WREG32_OR        1141 drivers/misc/habanalabs/goya/goya.c 	WREG32_OR(mmTPC0_CFG_FUNC_MBIST_CNTRL + tpc_offset,
WREG32_OR        1156 drivers/misc/habanalabs/goya/goya.c 	WREG32_OR(mmTPC0_EML_CFG_DBG_CNT + tpc_eml_offset,