WREG32_NO_KIQ     144 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 		WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)pos) | 0x80000000);
WREG32_NO_KIQ     145 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 		WREG32_NO_KIQ(mmMM_INDEX_HI, pos >> 31);
WREG32_NO_KIQ    1569 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)aligned_pos) | 0x80000000);
WREG32_NO_KIQ    1570 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_INDEX_HI, aligned_pos >> 31);
WREG32_NO_KIQ    1576 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 			WREG32_NO_KIQ(mmMM_DATA, value);
WREG32_NO_KIQ    2182 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
WREG32_NO_KIQ    2183 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_INDEX_HI, *pos >> 31);
WREG32_NO_KIQ    2230 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
WREG32_NO_KIQ    2231 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_INDEX_HI, *pos >> 31);
WREG32_NO_KIQ    2232 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 		WREG32_NO_KIQ(mmMM_DATA, value);
WREG32_NO_KIQ     262 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 	WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, inv_req);
WREG32_NO_KIQ     288 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 		WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);
WREG32_NO_KIQ     535 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 	WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, inv_req);
WREG32_NO_KIQ     557 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 		WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);
WREG32_NO_KIQ     142 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW0),
WREG32_NO_KIQ     144 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW1),
WREG32_NO_KIQ     146 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW2),
WREG32_NO_KIQ     148 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_MSGBUF_TRN_DW3),
WREG32_NO_KIQ     307 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_INT_CNTL), tmp);
WREG32_NO_KIQ     360 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	WREG32_NO_KIQ(SOC15_REG_OFFSET(NBIO, 0, mmBIF_BX_PF0_MAILBOX_INT_CNTL), tmp);
WREG32_NO_KIQ     325 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c 	WREG32_NO_KIQ(mmMAILBOX_CONTROL, reg);
WREG32_NO_KIQ     348 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c 	WREG32_NO_KIQ(mmMAILBOX_CONTROL, reg);
WREG32_NO_KIQ     359 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c 	WREG32_NO_KIQ(mmMAILBOX_MSGBUF_TRN_DW0, reg);
WREG32_NO_KIQ     506 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c 	WREG32_NO_KIQ(mmMAILBOX_INT_CNTL, tmp);
WREG32_NO_KIQ     536 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c 	WREG32_NO_KIQ(mmMAILBOX_INT_CNTL, tmp);
WREG32_NO_KIQ     239 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 	WREG32_NO_KIQ(reg, tmp);
WREG32_NO_KIQ      67 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c 		WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
WREG32_NO_KIQ      84 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c 		WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
WREG32_NO_KIQ      45 drivers/gpu/drm/amd/amdgpu/soc15_common.h 	WREG32_NO_KIQ((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value)
WREG32_NO_KIQ     421 drivers/gpu/drm/amd/amdgpu/vega10_ih.c 	WREG32_NO_KIQ(reg, tmp);
WREG32_NO_KIQ      91 drivers/gpu/drm/amd/amdgpu/vi.c 	WREG32_NO_KIQ(mmPCIE_INDEX, reg);
WREG32_NO_KIQ     103 drivers/gpu/drm/amd/amdgpu/vi.c 	WREG32_NO_KIQ(mmPCIE_INDEX, reg);
WREG32_NO_KIQ     105 drivers/gpu/drm/amd/amdgpu/vi.c 	WREG32_NO_KIQ(mmPCIE_DATA, v);
WREG32_NO_KIQ     116 drivers/gpu/drm/amd/amdgpu/vi.c 	WREG32_NO_KIQ(mmSMC_IND_INDEX_11, (reg));
WREG32_NO_KIQ     127 drivers/gpu/drm/amd/amdgpu/vi.c 	WREG32_NO_KIQ(mmSMC_IND_INDEX_11, (reg));
WREG32_NO_KIQ     128 drivers/gpu/drm/amd/amdgpu/vi.c 	WREG32_NO_KIQ(mmSMC_IND_DATA_11, (v));