WREG32_IDX         92 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c 		return WREG32_IDX(index, value);
WREG32_IDX       2290 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
WREG32_IDX       2307 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
WREG32_IDX       2369 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
WREG32_IDX       2386 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);
WREG32_IDX       2177 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
WREG32_IDX       2194 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
WREG32_IDX       2190 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
WREG32_IDX       2205 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,
WREG32_IDX       3254 drivers/gpu/drm/radeon/radeon_combios.c 		WREG32_IDX((addr) | RADEON_MM_APER, 0xdeadbeef);
WREG32_IDX         68 drivers/gpu/drm/radeon/radeon_cursor.c 		WREG32_IDX(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset,
WREG32_IDX         72 drivers/gpu/drm/radeon/radeon_cursor.c 		WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
WREG32_IDX         86 drivers/gpu/drm/radeon/radeon_cursor.c 		WREG32_IDX(reg, RREG32_IDX(reg) & ~RADEON_CRTC_CUR_EN);