WREG32_FIELD15 655 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c WREG32_FIELD15(GC, 0, RLC_CP_SCHEDULERS, scheduler1, 0); WREG32_FIELD15 108 drivers/gpu/drm/amd/amdgpu/df_v1_7.c WREG32_FIELD15(DF, 0, DF_CS_AON0_CoherentSlaveModeCtrlA0, WREG32_FIELD15 1737 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff); WREG32_FIELD15 1846 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); WREG32_FIELD15 1848 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); WREG32_FIELD15 1881 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); WREG32_FIELD15 3398 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); WREG32_FIELD15 3492 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1); WREG32_FIELD15 5033 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 5052 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 1632 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, RLC_LB_CNTL, LOAD_BALANCE_ENABLE, enable ? 1 : 0); WREG32_FIELD15 2750 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, RLC_SRM_CNTL, SRM_ENABLE, 1); WREG32_FIELD15 2949 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0); WREG32_FIELD15 2956 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); WREG32_FIELD15 2958 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); WREG32_FIELD15 2968 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1); WREG32_FIELD15 3559 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); WREG32_FIELD15 3652 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1); WREG32_FIELD15 3960 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0); WREG32_FIELD15 5485 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 5555 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 5574 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 5585 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\ WREG32_FIELD15 5589 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_ME##me##_PIPE##pipe##_INT_CNTL,\ WREG32_FIELD15 5599 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 5608 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c WREG32_FIELD15(GC, 0, CP_INT_CNTL_RING0, WREG32_FIELD15 110 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_FIELD15(GC, 0, VM_L2_PROTECTION_FAULT_CNTL2, WREG32_FIELD15 310 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c WREG32_FIELD15(GC, 0, VM_L2_CNTL, ENABLE_L2_CACHE, 0); WREG32_FIELD15 105 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_FIELD15(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2, WREG32_FIELD15 296 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c WREG32_FIELD15(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); WREG32_FIELD15 1441 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_FIELD15(HDP, 0, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1); WREG32_FIELD15 1483 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_FIELD15(DCE, 0, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); WREG32_FIELD15 1486 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c WREG32_FIELD15(DCE, 0, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); WREG32_FIELD15 117 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c WREG32_FIELD15(NBIO, 0, RCC_DEV0_EPF0_RCC_DOORBELL_APER_EN, BIF_DOORBELL_APER_EN, WREG32_FIELD15 91 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c WREG32_FIELD15(NBIO, 0, RCC_PF_0_0_RCC_DOORBELL_APER_EN, BIF_DOORBELL_APER_EN, enable ? 1 : 0); WREG32_FIELD15 117 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c WREG32_FIELD15(NBIO, 0, RCC_DOORBELL_APER_EN, BIF_DOORBELL_APER_EN, enable ? 1 : 0); WREG32_FIELD15 154 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c WREG32_FIELD15(NBIO, 0, RCC_DOORBELL_APER_EN, BIF_DOORBELL_APER_EN, enable ? 1 : 0); WREG32_FIELD15 74 drivers/gpu/drm/amd/amdgpu/umc_v6_1.c WREG32_FIELD15(RSMU, 0, RSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU,