WDT                33 arch/sh/kernel/cpu/sh2/setup-sh7619.c 	INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
WDT                50 arch/sh/kernel/cpu/sh2/setup-sh7619.c 	{ 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
WDT                90 arch/sh/kernel/cpu/sh2a/setup-sh7201.c 	INTC_IRQ(WDT, 156),
WDT               158 arch/sh/kernel/cpu/sh2a/setup-sh7201.c 	{ 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
WDT                62 arch/sh/kernel/cpu/sh2a/setup-sh7203.c 	INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
WDT               143 arch/sh/kernel/cpu/sh2a/setup-sh7203.c 	{ 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
WDT                60 arch/sh/kernel/cpu/sh2a/setup-sh7206.c 	INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
WDT               111 arch/sh/kernel/cpu/sh2a/setup-sh7206.c 	{ 0xfffe0c04, 0, 16, 4, /* IPR08 */ { CMT0, CMT1, BSC, WDT } },
WDT                80 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 	INTC_IRQ(BSC, 177), INTC_IRQ(WDT, 178),
WDT               200 arch/sh/kernel/cpu/sh2a/setup-sh7264.c 	{ 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
WDT                89 arch/sh/kernel/cpu/sh2a/setup-sh7269.c 	INTC_IRQ(BSC, 190), INTC_IRQ(WDT, 191),
WDT               218 arch/sh/kernel/cpu/sh2a/setup-sh7269.c 	{ 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { CMT0, CMT1, BSC, WDT } },
WDT                50 arch/sh/kernel/cpu/sh3/setup-sh7705.c 	INTC_VECT(WDT, 0x560),
WDT                56 arch/sh/kernel/cpu/sh3/setup-sh7705.c 	{ 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
WDT                41 arch/sh/kernel/cpu/sh3/setup-sh770x.c 	INTC_VECT(WDT, 0x560),
WDT                68 arch/sh/kernel/cpu/sh3/setup-sh770x.c 	{ 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
WDT                52 arch/sh/kernel/cpu/sh3/setup-sh7710.c 	INTC_VECT(WDT, 0x560),
WDT                58 arch/sh/kernel/cpu/sh3/setup-sh7710.c 	{ 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
WDT               242 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	INTC_VECT(WDT, 0x560),        INTC_VECT(REF_RCMI, 0x580),
WDT               267 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	{ 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
WDT                99 arch/sh/kernel/cpu/sh4/setup-sh4-202.c 	INTC_VECT(WDT, 0x560),
WDT               104 arch/sh/kernel/cpu/sh4/setup-sh4-202.c 	{ 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
WDT               200 arch/sh/kernel/cpu/sh4/setup-sh7750.c 	INTC_VECT(WDT, 0x560),
WDT               206 arch/sh/kernel/cpu/sh4/setup-sh7750.c 	{ 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
WDT                73 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	INTC_VECT(WDT, 0x560),
WDT               104 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	{ 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
WDT               255 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
WDT               305 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	    HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
WDT               317 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	{ 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
WDT               316 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	INTC_VECT(WDT, 0x560),
WDT               359 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	    HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
WDT               366 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	{ 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
WDT               392 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	INTC_VECT(WDT, 0x560),
WDT               454 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	    PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT,
WDT               466 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	{ 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { SCIF4, SCIF5, WDT, } },
WDT               504 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	INTC_VECT(WDT, 0x3e0),
WDT               584 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT },
WDT               616 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	{ 0xfe410800, 0, 32, 8, /* INT2PRI0 */ { 0, 0, 0, WDT } },