VX               2525 arch/powerpc/xmon/ppc-opc.c #define VX_MASK	VX(0x3f, 0x7ff)
VX               2570 arch/powerpc/xmon/ppc-opc.c #define VXVA(op, xop, vaop) (VX(op,xop) | (((vaop) & 0x1f) << 16))
VX               3089 arch/powerpc/xmon/ppc-opc.c {"vaddubm",	VX (4,	 0),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3090 arch/powerpc/xmon/ppc-opc.c {"vmul10cuq",	VX (4,	 1),	VXVB_MASK,   PPCVEC3,	0,		{VD, VA}},
VX               3091 arch/powerpc/xmon/ppc-opc.c {"vmaxub",	VX (4,	 2),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3092 arch/powerpc/xmon/ppc-opc.c {"vrlb",	VX (4,	 4),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3095 arch/powerpc/xmon/ppc-opc.c {"vmuloub",	VX (4,	 8),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3096 arch/powerpc/xmon/ppc-opc.c {"vaddfp",	VX (4,	10),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3098 arch/powerpc/xmon/ppc-opc.c {"vmrghb",	VX (4,	12),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3100 arch/powerpc/xmon/ppc-opc.c {"vpkuhum",	VX (4,	14),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3164 arch/powerpc/xmon/ppc-opc.c {"vadduhm",	VX (4,	64),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3165 arch/powerpc/xmon/ppc-opc.c {"vmul10ecuq",	VX (4,	65),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3166 arch/powerpc/xmon/ppc-opc.c {"vmaxuh",	VX (4,	66),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3167 arch/powerpc/xmon/ppc-opc.c {"vrlh",	VX (4,	68),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3170 arch/powerpc/xmon/ppc-opc.c {"vmulouh",	VX (4,	72),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3171 arch/powerpc/xmon/ppc-opc.c {"vsubfp",	VX (4,	74),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3173 arch/powerpc/xmon/ppc-opc.c {"vmrghh",	VX (4,	76),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3175 arch/powerpc/xmon/ppc-opc.c {"vpkuwum",	VX (4,	78),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3185 arch/powerpc/xmon/ppc-opc.c {"vadduwm",	VX (4,	128),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3186 arch/powerpc/xmon/ppc-opc.c {"vmaxuw",	VX (4,	130),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3187 arch/powerpc/xmon/ppc-opc.c {"vrlw",	VX (4,	132),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3188 arch/powerpc/xmon/ppc-opc.c {"vrlwmi",	VX (4,	133),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3191 arch/powerpc/xmon/ppc-opc.c {"vmulouw",	VX (4,	136),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3192 arch/powerpc/xmon/ppc-opc.c {"vmuluwm",	VX (4,	137),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3193 arch/powerpc/xmon/ppc-opc.c {"vmrghw",	VX (4,	140),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3194 arch/powerpc/xmon/ppc-opc.c {"vpkuhus",	VX (4,	142),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3200 arch/powerpc/xmon/ppc-opc.c {"vaddudm",	VX (4, 192),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3201 arch/powerpc/xmon/ppc-opc.c {"vmaxud",	VX (4, 194),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3202 arch/powerpc/xmon/ppc-opc.c {"vrld",	VX (4, 196),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3203 arch/powerpc/xmon/ppc-opc.c {"vrldmi",	VX (4, 197),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3206 arch/powerpc/xmon/ppc-opc.c {"vpkuwus",	VX (4, 206),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3211 arch/powerpc/xmon/ppc-opc.c {"vadduqm",	VX (4, 256),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3212 arch/powerpc/xmon/ppc-opc.c {"vmaxsb",	VX (4, 258),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3213 arch/powerpc/xmon/ppc-opc.c {"vslb",	VX (4, 260),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3215 arch/powerpc/xmon/ppc-opc.c {"vmulosb",	VX (4, 264),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3216 arch/powerpc/xmon/ppc-opc.c {"vrefp",	VX (4, 266),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3217 arch/powerpc/xmon/ppc-opc.c {"vmrglb",	VX (4, 268),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3218 arch/powerpc/xmon/ppc-opc.c {"vpkshus",	VX (4, 270),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3225 arch/powerpc/xmon/ppc-opc.c {"vaddcuq",	VX (4, 320),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3226 arch/powerpc/xmon/ppc-opc.c {"vmaxsh",	VX (4, 322),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3227 arch/powerpc/xmon/ppc-opc.c {"vslh",	VX (4, 324),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3229 arch/powerpc/xmon/ppc-opc.c {"vmulosh",	VX (4, 328),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3230 arch/powerpc/xmon/ppc-opc.c {"vrsqrtefp",	VX (4, 330),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3231 arch/powerpc/xmon/ppc-opc.c {"vmrglh",	VX (4, 332),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3232 arch/powerpc/xmon/ppc-opc.c {"vpkswus",	VX (4, 334),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3239 arch/powerpc/xmon/ppc-opc.c {"vaddcuw",	VX (4, 384),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3240 arch/powerpc/xmon/ppc-opc.c {"vmaxsw",	VX (4, 386),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3241 arch/powerpc/xmon/ppc-opc.c {"vslw",	VX (4, 388),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3242 arch/powerpc/xmon/ppc-opc.c {"vrlwnm",	VX (4, 389),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3244 arch/powerpc/xmon/ppc-opc.c {"vmulosw",	VX (4, 392),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3245 arch/powerpc/xmon/ppc-opc.c {"vexptefp",	VX (4, 394),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3246 arch/powerpc/xmon/ppc-opc.c {"vmrglw",	VX (4, 396),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3247 arch/powerpc/xmon/ppc-opc.c {"vpkshss",	VX (4, 398),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3250 arch/powerpc/xmon/ppc-opc.c {"vmaxsd",	VX (4, 450),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3251 arch/powerpc/xmon/ppc-opc.c {"vsl",		VX (4, 452),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3252 arch/powerpc/xmon/ppc-opc.c {"vrldnm",	VX (4, 453),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3254 arch/powerpc/xmon/ppc-opc.c {"vlogefp",	VX (4, 458),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3255 arch/powerpc/xmon/ppc-opc.c {"vpkswss",	VX (4, 462),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3260 arch/powerpc/xmon/ppc-opc.c {"evaddw",	VX (4, 512),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3261 arch/powerpc/xmon/ppc-opc.c {"vaddubs",	VX (4, 512),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3262 arch/powerpc/xmon/ppc-opc.c {"vmul10uq",	VX (4, 513),	VXVB_MASK,   PPCVEC3,	0,		{VD, VA}},
VX               3263 arch/powerpc/xmon/ppc-opc.c {"evaddiw",	VX (4, 514),	VX_MASK,     PPCSPE,	0,		{RS, RB, UIMM}},
VX               3264 arch/powerpc/xmon/ppc-opc.c {"vminub",	VX (4, 514),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3265 arch/powerpc/xmon/ppc-opc.c {"evsubfw",	VX (4, 516),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3266 arch/powerpc/xmon/ppc-opc.c {"evsubw",	VX (4, 516),	VX_MASK,     PPCSPE,	0,		{RS, RB, RA}},
VX               3267 arch/powerpc/xmon/ppc-opc.c {"vsrb",	VX (4, 516),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3268 arch/powerpc/xmon/ppc-opc.c {"evsubifw",	VX (4, 518),	VX_MASK,     PPCSPE,	0,		{RS, UIMM, RB}},
VX               3269 arch/powerpc/xmon/ppc-opc.c {"evsubiw",	VX (4, 518),	VX_MASK,     PPCSPE,	0,		{RS, RB, UIMM}},
VX               3271 arch/powerpc/xmon/ppc-opc.c {"evabs",	VX (4, 520),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3272 arch/powerpc/xmon/ppc-opc.c {"vmuleub",	VX (4, 520),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3273 arch/powerpc/xmon/ppc-opc.c {"evneg",	VX (4, 521),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3274 arch/powerpc/xmon/ppc-opc.c {"evextsb",	VX (4, 522),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3275 arch/powerpc/xmon/ppc-opc.c {"vrfin",	VX (4, 522),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3276 arch/powerpc/xmon/ppc-opc.c {"evextsh",	VX (4, 523),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3277 arch/powerpc/xmon/ppc-opc.c {"evrndw",	VX (4, 524),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3278 arch/powerpc/xmon/ppc-opc.c {"vspltb",	VX (4, 524),   VXUIMM4_MASK, PPCVEC,	0,		{VD, VB, UIMM4}},
VX               3279 arch/powerpc/xmon/ppc-opc.c {"vextractub",	VX (4, 525),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3280 arch/powerpc/xmon/ppc-opc.c {"evcntlzw",	VX (4, 525),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3281 arch/powerpc/xmon/ppc-opc.c {"evcntlsw",	VX (4, 526),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3282 arch/powerpc/xmon/ppc-opc.c {"vupkhsb",	VX (4, 526),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3283 arch/powerpc/xmon/ppc-opc.c {"brinc",	VX (4, 527),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3286 arch/powerpc/xmon/ppc-opc.c {"evand",	VX (4, 529),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3287 arch/powerpc/xmon/ppc-opc.c {"evandc",	VX (4, 530),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3288 arch/powerpc/xmon/ppc-opc.c {"evxor",	VX (4, 534),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3289 arch/powerpc/xmon/ppc-opc.c {"evmr",	VX (4, 535),	VX_MASK,     PPCSPE,	0,		{RS, RA, BBA}},
VX               3290 arch/powerpc/xmon/ppc-opc.c {"evor",	VX (4, 535),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3291 arch/powerpc/xmon/ppc-opc.c {"evnor",	VX (4, 536),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3292 arch/powerpc/xmon/ppc-opc.c {"evnot",	VX (4, 536),	VX_MASK,     PPCSPE,	0,		{RS, RA, BBA}},
VX               3294 arch/powerpc/xmon/ppc-opc.c {"eveqv",	VX (4, 537),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3295 arch/powerpc/xmon/ppc-opc.c {"evorc",	VX (4, 539),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3296 arch/powerpc/xmon/ppc-opc.c {"evnand",	VX (4, 542),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3297 arch/powerpc/xmon/ppc-opc.c {"evsrwu",	VX (4, 544),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3298 arch/powerpc/xmon/ppc-opc.c {"evsrws",	VX (4, 545),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3299 arch/powerpc/xmon/ppc-opc.c {"evsrwiu",	VX (4, 546),	VX_MASK,     PPCSPE,	0,		{RS, RA, EVUIMM}},
VX               3300 arch/powerpc/xmon/ppc-opc.c {"evsrwis",	VX (4, 547),	VX_MASK,     PPCSPE,	0,		{RS, RA, EVUIMM}},
VX               3301 arch/powerpc/xmon/ppc-opc.c {"evslw",	VX (4, 548),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3302 arch/powerpc/xmon/ppc-opc.c {"evslwi",	VX (4, 550),	VX_MASK,     PPCSPE,	0,		{RS, RA, EVUIMM}},
VX               3303 arch/powerpc/xmon/ppc-opc.c {"evrlw",	VX (4, 552),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3304 arch/powerpc/xmon/ppc-opc.c {"evsplati",	VX (4, 553),	VX_MASK,     PPCSPE,	0,		{RS, SIMM}},
VX               3305 arch/powerpc/xmon/ppc-opc.c {"evrlwi",	VX (4, 554),	VX_MASK,     PPCSPE,	0,		{RS, RA, EVUIMM}},
VX               3306 arch/powerpc/xmon/ppc-opc.c {"evsplatfi",	VX (4, 555),	VX_MASK,     PPCSPE,	0,		{RS, SIMM}},
VX               3307 arch/powerpc/xmon/ppc-opc.c {"evmergehi",	VX (4, 556),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3308 arch/powerpc/xmon/ppc-opc.c {"evmergelo",	VX (4, 557),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3309 arch/powerpc/xmon/ppc-opc.c {"evmergehilo",	VX (4, 558),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3310 arch/powerpc/xmon/ppc-opc.c {"evmergelohi",	VX (4, 559),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3311 arch/powerpc/xmon/ppc-opc.c {"evcmpgtu",	VX (4, 560),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3312 arch/powerpc/xmon/ppc-opc.c {"evcmpgts",	VX (4, 561),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3313 arch/powerpc/xmon/ppc-opc.c {"evcmpltu",	VX (4, 562),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3314 arch/powerpc/xmon/ppc-opc.c {"evcmplts",	VX (4, 563),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3315 arch/powerpc/xmon/ppc-opc.c {"evcmpeq",	VX (4, 564),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3317 arch/powerpc/xmon/ppc-opc.c {"vadduhs",	VX (4, 576),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3318 arch/powerpc/xmon/ppc-opc.c {"vmul10euq",	VX (4, 577),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3319 arch/powerpc/xmon/ppc-opc.c {"vminuh",	VX (4, 578),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3320 arch/powerpc/xmon/ppc-opc.c {"vsrh",	VX (4, 580),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3322 arch/powerpc/xmon/ppc-opc.c {"vmuleuh",	VX (4, 584),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3323 arch/powerpc/xmon/ppc-opc.c {"vrfiz",	VX (4, 586),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3324 arch/powerpc/xmon/ppc-opc.c {"vsplth",	VX (4, 588),   VXUIMM3_MASK, PPCVEC,	0,		{VD, VB, UIMM3}},
VX               3325 arch/powerpc/xmon/ppc-opc.c {"vextractuh",	VX (4, 589),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3326 arch/powerpc/xmon/ppc-opc.c {"vupkhsh",	VX (4, 590),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3330 arch/powerpc/xmon/ppc-opc.c {"evfsadd",	VX (4, 640),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3331 arch/powerpc/xmon/ppc-opc.c {"vadduws",	VX (4, 640),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3332 arch/powerpc/xmon/ppc-opc.c {"evfssub",	VX (4, 641),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3333 arch/powerpc/xmon/ppc-opc.c {"vminuw",	VX (4, 642),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3334 arch/powerpc/xmon/ppc-opc.c {"evfsabs",	VX (4, 644),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3335 arch/powerpc/xmon/ppc-opc.c {"vsrw",	VX (4, 644),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3336 arch/powerpc/xmon/ppc-opc.c {"evfsnabs",	VX (4, 645),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3337 arch/powerpc/xmon/ppc-opc.c {"evfsneg",	VX (4, 646),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3339 arch/powerpc/xmon/ppc-opc.c {"vmuleuw",	VX (4, 648),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3340 arch/powerpc/xmon/ppc-opc.c {"evfsmul",	VX (4, 648),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3341 arch/powerpc/xmon/ppc-opc.c {"evfsdiv",	VX (4, 649),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3342 arch/powerpc/xmon/ppc-opc.c {"vrfip",	VX (4, 650),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3343 arch/powerpc/xmon/ppc-opc.c {"evfscmpgt",	VX (4, 652),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3344 arch/powerpc/xmon/ppc-opc.c {"vspltw",	VX (4, 652),   VXUIMM2_MASK, PPCVEC,	0,		{VD, VB, UIMM2}},
VX               3345 arch/powerpc/xmon/ppc-opc.c {"vextractuw",	VX (4, 653),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3346 arch/powerpc/xmon/ppc-opc.c {"evfscmplt",	VX (4, 653),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3347 arch/powerpc/xmon/ppc-opc.c {"evfscmpeq",	VX (4, 654),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3348 arch/powerpc/xmon/ppc-opc.c {"vupklsb",	VX (4, 654),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3349 arch/powerpc/xmon/ppc-opc.c {"evfscfui",	VX (4, 656),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3350 arch/powerpc/xmon/ppc-opc.c {"evfscfsi",	VX (4, 657),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3351 arch/powerpc/xmon/ppc-opc.c {"evfscfuf",	VX (4, 658),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3352 arch/powerpc/xmon/ppc-opc.c {"evfscfsf",	VX (4, 659),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3353 arch/powerpc/xmon/ppc-opc.c {"evfsctui",	VX (4, 660),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3354 arch/powerpc/xmon/ppc-opc.c {"evfsctsi",	VX (4, 661),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3355 arch/powerpc/xmon/ppc-opc.c {"evfsctuf",	VX (4, 662),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3356 arch/powerpc/xmon/ppc-opc.c {"evfsctsf",	VX (4, 663),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3357 arch/powerpc/xmon/ppc-opc.c {"evfsctuiz",	VX (4, 664),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3359 arch/powerpc/xmon/ppc-opc.c {"evfsctsiz",	VX (4, 666),	VX_MASK,     PPCSPE,	0,		{RS, RB}},
VX               3360 arch/powerpc/xmon/ppc-opc.c {"evfststgt",	VX (4, 668),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3361 arch/powerpc/xmon/ppc-opc.c {"evfststlt",	VX (4, 669),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3362 arch/powerpc/xmon/ppc-opc.c {"evfststeq",	VX (4, 670),	VX_MASK,     PPCSPE,	0,		{CRFD, RA, RB}},
VX               3364 arch/powerpc/xmon/ppc-opc.c {"efsadd",	VX (4, 704),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3365 arch/powerpc/xmon/ppc-opc.c {"efssub",	VX (4, 705),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3366 arch/powerpc/xmon/ppc-opc.c {"vminud",	VX (4, 706),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3367 arch/powerpc/xmon/ppc-opc.c {"efsabs",	VX (4, 708),	VX_MASK,     PPCEFS,	0,		{RS, RA}},
VX               3368 arch/powerpc/xmon/ppc-opc.c {"vsr",		VX (4, 708),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3369 arch/powerpc/xmon/ppc-opc.c {"efsnabs",	VX (4, 709),	VX_MASK,     PPCEFS,	0,		{RS, RA}},
VX               3370 arch/powerpc/xmon/ppc-opc.c {"efsneg",	VX (4, 710),	VX_MASK,     PPCEFS,	0,		{RS, RA}},
VX               3373 arch/powerpc/xmon/ppc-opc.c {"efsmul",	VX (4, 712),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3374 arch/powerpc/xmon/ppc-opc.c {"efsdiv",	VX (4, 713),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3375 arch/powerpc/xmon/ppc-opc.c {"vrfim",	VX (4, 714),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3376 arch/powerpc/xmon/ppc-opc.c {"efscmpgt",	VX (4, 716),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3377 arch/powerpc/xmon/ppc-opc.c {"vextractd",	VX (4, 717),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3378 arch/powerpc/xmon/ppc-opc.c {"efscmplt",	VX (4, 717),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3379 arch/powerpc/xmon/ppc-opc.c {"efscmpeq",	VX (4, 718),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3380 arch/powerpc/xmon/ppc-opc.c {"vupklsh",	VX (4, 718),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3381 arch/powerpc/xmon/ppc-opc.c {"efscfd",	VX (4, 719),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3382 arch/powerpc/xmon/ppc-opc.c {"efscfui",	VX (4, 720),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3383 arch/powerpc/xmon/ppc-opc.c {"efscfsi",	VX (4, 721),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3384 arch/powerpc/xmon/ppc-opc.c {"efscfuf",	VX (4, 722),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3385 arch/powerpc/xmon/ppc-opc.c {"efscfsf",	VX (4, 723),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3386 arch/powerpc/xmon/ppc-opc.c {"efsctui",	VX (4, 724),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3387 arch/powerpc/xmon/ppc-opc.c {"efsctsi",	VX (4, 725),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3388 arch/powerpc/xmon/ppc-opc.c {"efsctuf",	VX (4, 726),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3389 arch/powerpc/xmon/ppc-opc.c {"efsctsf",	VX (4, 727),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3390 arch/powerpc/xmon/ppc-opc.c {"efsctuiz",	VX (4, 728),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3392 arch/powerpc/xmon/ppc-opc.c {"efsctsiz",	VX (4, 730),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3393 arch/powerpc/xmon/ppc-opc.c {"efststgt",	VX (4, 732),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3394 arch/powerpc/xmon/ppc-opc.c {"efststlt",	VX (4, 733),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3395 arch/powerpc/xmon/ppc-opc.c {"efststeq",	VX (4, 734),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3396 arch/powerpc/xmon/ppc-opc.c {"efdadd",	VX (4, 736),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3397 arch/powerpc/xmon/ppc-opc.c {"efdsub",	VX (4, 737),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3398 arch/powerpc/xmon/ppc-opc.c {"efdcfuid",	VX (4, 738),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3399 arch/powerpc/xmon/ppc-opc.c {"efdcfsid",	VX (4, 739),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3400 arch/powerpc/xmon/ppc-opc.c {"efdabs",	VX (4, 740),	VX_MASK,     PPCEFS,	0,		{RS, RA}},
VX               3401 arch/powerpc/xmon/ppc-opc.c {"efdnabs",	VX (4, 741),	VX_MASK,     PPCEFS,	0,		{RS, RA}},
VX               3402 arch/powerpc/xmon/ppc-opc.c {"efdneg",	VX (4, 742),	VX_MASK,     PPCEFS,	0,		{RS, RA}},
VX               3403 arch/powerpc/xmon/ppc-opc.c {"efdmul",	VX (4, 744),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3404 arch/powerpc/xmon/ppc-opc.c {"efddiv",	VX (4, 745),	VX_MASK,     PPCEFS,	0,		{RS, RA, RB}},
VX               3405 arch/powerpc/xmon/ppc-opc.c {"efdctuidz",	VX (4, 746),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3406 arch/powerpc/xmon/ppc-opc.c {"efdctsidz",	VX (4, 747),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3407 arch/powerpc/xmon/ppc-opc.c {"efdcmpgt",	VX (4, 748),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3408 arch/powerpc/xmon/ppc-opc.c {"efdcmplt",	VX (4, 749),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3409 arch/powerpc/xmon/ppc-opc.c {"efdcmpeq",	VX (4, 750),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3410 arch/powerpc/xmon/ppc-opc.c {"efdcfs",	VX (4, 751),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3411 arch/powerpc/xmon/ppc-opc.c {"efdcfui",	VX (4, 752),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3412 arch/powerpc/xmon/ppc-opc.c {"efdcfsi",	VX (4, 753),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3413 arch/powerpc/xmon/ppc-opc.c {"efdcfuf",	VX (4, 754),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3414 arch/powerpc/xmon/ppc-opc.c {"efdcfsf",	VX (4, 755),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3415 arch/powerpc/xmon/ppc-opc.c {"efdctui",	VX (4, 756),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3416 arch/powerpc/xmon/ppc-opc.c {"efdctsi",	VX (4, 757),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3417 arch/powerpc/xmon/ppc-opc.c {"efdctuf",	VX (4, 758),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3418 arch/powerpc/xmon/ppc-opc.c {"efdctsf",	VX (4, 759),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3419 arch/powerpc/xmon/ppc-opc.c {"efdctuiz",	VX (4, 760),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3421 arch/powerpc/xmon/ppc-opc.c {"efdctsiz",	VX (4, 762),	VX_MASK,     PPCEFS,	0,		{RS, RB}},
VX               3422 arch/powerpc/xmon/ppc-opc.c {"efdtstgt",	VX (4, 764),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3423 arch/powerpc/xmon/ppc-opc.c {"efdtstlt",	VX (4, 765),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3424 arch/powerpc/xmon/ppc-opc.c {"efdtsteq",	VX (4, 766),	VX_MASK,     PPCEFS,	0,		{CRFD, RA, RB}},
VX               3425 arch/powerpc/xmon/ppc-opc.c {"evlddx",	VX (4, 768),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3426 arch/powerpc/xmon/ppc-opc.c {"vaddsbs",	VX (4, 768),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3427 arch/powerpc/xmon/ppc-opc.c {"evldd",	VX (4, 769),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_8, RA}},
VX               3428 arch/powerpc/xmon/ppc-opc.c {"evldwx",	VX (4, 770),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3429 arch/powerpc/xmon/ppc-opc.c {"vminsb",	VX (4, 770),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3430 arch/powerpc/xmon/ppc-opc.c {"evldw",	VX (4, 771),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_8, RA}},
VX               3431 arch/powerpc/xmon/ppc-opc.c {"evldhx",	VX (4, 772),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3432 arch/powerpc/xmon/ppc-opc.c {"vsrab",	VX (4, 772),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3433 arch/powerpc/xmon/ppc-opc.c {"evldh",	VX (4, 773),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_8, RA}},
VX               3435 arch/powerpc/xmon/ppc-opc.c {"evlhhesplatx",VX (4, 776),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3436 arch/powerpc/xmon/ppc-opc.c {"vmulesb",	VX (4, 776),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3437 arch/powerpc/xmon/ppc-opc.c {"evlhhesplat",	VX (4, 777),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_2, RA}},
VX               3438 arch/powerpc/xmon/ppc-opc.c {"vcfux",	VX (4, 778),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3439 arch/powerpc/xmon/ppc-opc.c {"vcuxwfp",	VX (4, 778),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3440 arch/powerpc/xmon/ppc-opc.c {"evlhhousplatx",VX(4, 780),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3441 arch/powerpc/xmon/ppc-opc.c {"vspltisb",	VX (4, 780),	VXVB_MASK,   PPCVEC,	0,		{VD, SIMM}},
VX               3442 arch/powerpc/xmon/ppc-opc.c {"vinsertb",	VX (4, 781),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3443 arch/powerpc/xmon/ppc-opc.c {"evlhhousplat",VX (4, 781),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_2, RA}},
VX               3444 arch/powerpc/xmon/ppc-opc.c {"evlhhossplatx",VX(4, 782),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3445 arch/powerpc/xmon/ppc-opc.c {"vpkpx",	VX (4, 782),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3446 arch/powerpc/xmon/ppc-opc.c {"evlhhossplat",VX (4, 783),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_2, RA}},
VX               3448 arch/powerpc/xmon/ppc-opc.c {"evlwhex",	VX (4, 784),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3450 arch/powerpc/xmon/ppc-opc.c {"evlwhe",	VX (4, 785),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3451 arch/powerpc/xmon/ppc-opc.c {"evlwhoux",	VX (4, 788),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3452 arch/powerpc/xmon/ppc-opc.c {"evlwhou",	VX (4, 789),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3453 arch/powerpc/xmon/ppc-opc.c {"evlwhosx",	VX (4, 790),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3454 arch/powerpc/xmon/ppc-opc.c {"evlwhos",	VX (4, 791),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3456 arch/powerpc/xmon/ppc-opc.c {"evlwwsplatx",	VX (4, 792),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3458 arch/powerpc/xmon/ppc-opc.c {"evlwwsplat",	VX (4, 793),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3459 arch/powerpc/xmon/ppc-opc.c {"evlwhsplatx",	VX (4, 796),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3460 arch/powerpc/xmon/ppc-opc.c {"evlwhsplat",	VX (4, 797),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3461 arch/powerpc/xmon/ppc-opc.c {"evstddx",	VX (4, 800),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3462 arch/powerpc/xmon/ppc-opc.c {"evstdd",	VX (4, 801),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_8, RA}},
VX               3463 arch/powerpc/xmon/ppc-opc.c {"evstdwx",	VX (4, 802),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3464 arch/powerpc/xmon/ppc-opc.c {"evstdw",	VX (4, 803),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_8, RA}},
VX               3465 arch/powerpc/xmon/ppc-opc.c {"evstdhx",	VX (4, 804),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3466 arch/powerpc/xmon/ppc-opc.c {"evstdh",	VX (4, 805),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_8, RA}},
VX               3467 arch/powerpc/xmon/ppc-opc.c {"evstwhex",	VX (4, 816),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3468 arch/powerpc/xmon/ppc-opc.c {"evstwhe",	VX (4, 817),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3469 arch/powerpc/xmon/ppc-opc.c {"evstwhox",	VX (4, 820),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3470 arch/powerpc/xmon/ppc-opc.c {"evstwho",	VX (4, 821),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3471 arch/powerpc/xmon/ppc-opc.c {"evstwwex",	VX (4, 824),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3472 arch/powerpc/xmon/ppc-opc.c {"evstwwe",	VX (4, 825),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3473 arch/powerpc/xmon/ppc-opc.c {"evstwwox",	VX (4, 828),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3474 arch/powerpc/xmon/ppc-opc.c {"evstwwo",	VX (4, 829),	VX_MASK,     PPCSPE,	0,		{RS, EVUIMM_4, RA}},
VX               3475 arch/powerpc/xmon/ppc-opc.c {"vaddshs",	VX (4, 832),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3476 arch/powerpc/xmon/ppc-opc.c {"bcdcpsgn.",	VX (4, 833),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3477 arch/powerpc/xmon/ppc-opc.c {"vminsh",	VX (4, 834),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3478 arch/powerpc/xmon/ppc-opc.c {"vsrah",	VX (4, 836),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3480 arch/powerpc/xmon/ppc-opc.c {"vmulesh",	VX (4, 840),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3481 arch/powerpc/xmon/ppc-opc.c {"vcfsx",	VX (4, 842),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3482 arch/powerpc/xmon/ppc-opc.c {"vcsxwfp",	VX (4, 842),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3483 arch/powerpc/xmon/ppc-opc.c {"vspltish",	VX (4, 844),	VXVB_MASK,   PPCVEC,	0,		{VD, SIMM}},
VX               3484 arch/powerpc/xmon/ppc-opc.c {"vinserth",	VX (4, 845),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3485 arch/powerpc/xmon/ppc-opc.c {"vupkhpx",	VX (4, 846),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3492 arch/powerpc/xmon/ppc-opc.c {"vaddsws",	VX (4, 896),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3493 arch/powerpc/xmon/ppc-opc.c {"vminsw",	VX (4, 898),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3494 arch/powerpc/xmon/ppc-opc.c {"vsraw",	VX (4, 900),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3496 arch/powerpc/xmon/ppc-opc.c {"vmulesw",	VX (4, 904),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3497 arch/powerpc/xmon/ppc-opc.c {"vctuxs",	VX (4, 906),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3498 arch/powerpc/xmon/ppc-opc.c {"vcfpuxws",	VX (4, 906),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3499 arch/powerpc/xmon/ppc-opc.c {"vspltisw",	VX (4, 908),	VXVB_MASK,   PPCVEC,	0,		{VD, SIMM}},
VX               3500 arch/powerpc/xmon/ppc-opc.c {"vinsertw",	VX (4, 909),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3503 arch/powerpc/xmon/ppc-opc.c {"vminsd",	VX (4, 962),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3504 arch/powerpc/xmon/ppc-opc.c {"vsrad",	VX (4, 964),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3507 arch/powerpc/xmon/ppc-opc.c {"vctsxs",	VX (4, 970),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3508 arch/powerpc/xmon/ppc-opc.c {"vcfpsxws",	VX (4, 970),	VX_MASK,     PPCVEC,	0,		{VD, VB, UIMM}},
VX               3509 arch/powerpc/xmon/ppc-opc.c {"vinsertd",	VX (4, 973),   VXUIMM4_MASK, PPCVEC3,	0,		{VD, VB, UIMM4}},
VX               3510 arch/powerpc/xmon/ppc-opc.c {"vupklpx",	VX (4, 974),	VXVA_MASK,   PPCVEC,	0,		{VD, VB}},
VX               3515 arch/powerpc/xmon/ppc-opc.c {"vsububm",	VX (4,1024),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3516 arch/powerpc/xmon/ppc-opc.c {"bcdadd.",	VX (4,1025),	VXPS_MASK,   PPCVEC2,	0,		{VD, VA, VB, PS}},
VX               3517 arch/powerpc/xmon/ppc-opc.c {"vavgub",	VX (4,1026),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3518 arch/powerpc/xmon/ppc-opc.c {"vabsdub",	VX (4,1027),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3519 arch/powerpc/xmon/ppc-opc.c {"evmhessf",	VX (4,1027),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3520 arch/powerpc/xmon/ppc-opc.c {"vand",	VX (4,1028),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3525 arch/powerpc/xmon/ppc-opc.c {"evmhossf",	VX (4,1031),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3526 arch/powerpc/xmon/ppc-opc.c {"vpmsumb",	VX (4,1032),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3527 arch/powerpc/xmon/ppc-opc.c {"evmheumi",	VX (4,1032),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3528 arch/powerpc/xmon/ppc-opc.c {"evmhesmi",	VX (4,1033),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3529 arch/powerpc/xmon/ppc-opc.c {"vmaxfp",	VX (4,1034),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3530 arch/powerpc/xmon/ppc-opc.c {"evmhesmf",	VX (4,1035),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3531 arch/powerpc/xmon/ppc-opc.c {"evmhoumi",	VX (4,1036),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3532 arch/powerpc/xmon/ppc-opc.c {"vslo",	VX (4,1036),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3533 arch/powerpc/xmon/ppc-opc.c {"evmhosmi",	VX (4,1037),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3534 arch/powerpc/xmon/ppc-opc.c {"evmhosmf",	VX (4,1039),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3539 arch/powerpc/xmon/ppc-opc.c {"evmhessfa",	VX (4,1059),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3540 arch/powerpc/xmon/ppc-opc.c {"evmhossfa",	VX (4,1063),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3541 arch/powerpc/xmon/ppc-opc.c {"evmheumia",	VX (4,1064),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3542 arch/powerpc/xmon/ppc-opc.c {"evmhesmia",	VX (4,1065),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3543 arch/powerpc/xmon/ppc-opc.c {"evmhesmfa",	VX (4,1067),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3544 arch/powerpc/xmon/ppc-opc.c {"evmhoumia",	VX (4,1068),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3545 arch/powerpc/xmon/ppc-opc.c {"evmhosmia",	VX (4,1069),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3546 arch/powerpc/xmon/ppc-opc.c {"evmhosmfa",	VX (4,1071),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3547 arch/powerpc/xmon/ppc-opc.c {"vsubuhm",	VX (4,1088),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3548 arch/powerpc/xmon/ppc-opc.c {"bcdsub.",	VX (4,1089),	VXPS_MASK,   PPCVEC2,	0,		{VD, VA, VB, PS}},
VX               3549 arch/powerpc/xmon/ppc-opc.c {"vavguh",	VX (4,1090),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3550 arch/powerpc/xmon/ppc-opc.c {"vabsduh",	VX (4,1091),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3551 arch/powerpc/xmon/ppc-opc.c {"vandc",	VX (4,1092),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3556 arch/powerpc/xmon/ppc-opc.c {"evmwhssf",	VX (4,1095),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3557 arch/powerpc/xmon/ppc-opc.c {"vpmsumh",	VX (4,1096),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3558 arch/powerpc/xmon/ppc-opc.c {"evmwlumi",	VX (4,1096),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3559 arch/powerpc/xmon/ppc-opc.c {"vminfp",	VX (4,1098),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3560 arch/powerpc/xmon/ppc-opc.c {"evmwhumi",	VX (4,1100),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3561 arch/powerpc/xmon/ppc-opc.c {"vsro",	VX (4,1100),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3562 arch/powerpc/xmon/ppc-opc.c {"evmwhsmi",	VX (4,1101),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3563 arch/powerpc/xmon/ppc-opc.c {"vpkudum",	VX (4,1102),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3564 arch/powerpc/xmon/ppc-opc.c {"evmwhsmf",	VX (4,1103),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3565 arch/powerpc/xmon/ppc-opc.c {"evmwssf",	VX (4,1107),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3567 arch/powerpc/xmon/ppc-opc.c {"evmwumi",	VX (4,1112),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3569 arch/powerpc/xmon/ppc-opc.c {"evmwsmi",	VX (4,1113),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3570 arch/powerpc/xmon/ppc-opc.c {"evmwsmf",	VX (4,1115),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3575 arch/powerpc/xmon/ppc-opc.c {"evmwhssfa",	VX (4,1127),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3576 arch/powerpc/xmon/ppc-opc.c {"evmwlumia",	VX (4,1128),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3577 arch/powerpc/xmon/ppc-opc.c {"evmwhumia",	VX (4,1132),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3578 arch/powerpc/xmon/ppc-opc.c {"evmwhsmia",	VX (4,1133),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3579 arch/powerpc/xmon/ppc-opc.c {"evmwhsmfa",	VX (4,1135),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3580 arch/powerpc/xmon/ppc-opc.c {"evmwssfa",	VX (4,1139),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3581 arch/powerpc/xmon/ppc-opc.c {"evmwumia",	VX (4,1144),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3582 arch/powerpc/xmon/ppc-opc.c {"evmwsmia",	VX (4,1145),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3583 arch/powerpc/xmon/ppc-opc.c {"evmwsmfa",	VX (4,1147),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3584 arch/powerpc/xmon/ppc-opc.c {"vsubuwm",	VX (4,1152),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3585 arch/powerpc/xmon/ppc-opc.c {"bcdus.",	VX (4,1153),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3586 arch/powerpc/xmon/ppc-opc.c {"vavguw",	VX (4,1154),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3587 arch/powerpc/xmon/ppc-opc.c {"vabsduw",	VX (4,1155),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3588 arch/powerpc/xmon/ppc-opc.c {"vmr",		VX (4,1156),	VX_MASK,     PPCVEC,	0,		{VD, VA, VBA}},
VX               3589 arch/powerpc/xmon/ppc-opc.c {"vor",		VX (4,1156),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3591 arch/powerpc/xmon/ppc-opc.c {"vpmsumw",	VX (4,1160),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3599 arch/powerpc/xmon/ppc-opc.c {"vsubudm",	VX (4,1216),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3600 arch/powerpc/xmon/ppc-opc.c {"evaddusiaaw",	VX (4,1216),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3601 arch/powerpc/xmon/ppc-opc.c {"bcds.",	VX (4,1217),	VXPS_MASK,   PPCVEC3,	0,		{VD, VA, VB, PS}},
VX               3602 arch/powerpc/xmon/ppc-opc.c {"evaddssiaaw",	VX (4,1217),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3603 arch/powerpc/xmon/ppc-opc.c {"evsubfusiaaw",VX (4,1218),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3604 arch/powerpc/xmon/ppc-opc.c {"evsubfssiaaw",VX (4,1219),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3605 arch/powerpc/xmon/ppc-opc.c {"evmra",	VX (4,1220),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3606 arch/powerpc/xmon/ppc-opc.c {"vxor",	VX (4,1220),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3607 arch/powerpc/xmon/ppc-opc.c {"evdivws",	VX (4,1222),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3612 arch/powerpc/xmon/ppc-opc.c {"evdivwu",	VX (4,1223),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3613 arch/powerpc/xmon/ppc-opc.c {"vpmsumd",	VX (4,1224),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3614 arch/powerpc/xmon/ppc-opc.c {"evaddumiaaw",	VX (4,1224),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3615 arch/powerpc/xmon/ppc-opc.c {"evaddsmiaaw",	VX (4,1225),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3616 arch/powerpc/xmon/ppc-opc.c {"evsubfumiaaw",VX (4,1226),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3617 arch/powerpc/xmon/ppc-opc.c {"evsubfsmiaaw",VX (4,1227),	VX_MASK,     PPCSPE,	0,		{RS, RA}},
VX               3618 arch/powerpc/xmon/ppc-opc.c {"vpkudus",	VX (4,1230),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3625 arch/powerpc/xmon/ppc-opc.c {"vsubuqm",	VX (4,1280),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3626 arch/powerpc/xmon/ppc-opc.c {"evmheusiaaw",	VX (4,1280),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3627 arch/powerpc/xmon/ppc-opc.c {"bcdtrunc.",	VX (4,1281),	VXPS_MASK,   PPCVEC3,	0,		{VD, VA, VB, PS}},
VX               3628 arch/powerpc/xmon/ppc-opc.c {"evmhessiaaw",	VX (4,1281),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3629 arch/powerpc/xmon/ppc-opc.c {"vavgsb",	VX (4,1282),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3630 arch/powerpc/xmon/ppc-opc.c {"evmhessfaaw",	VX (4,1283),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3631 arch/powerpc/xmon/ppc-opc.c {"evmhousiaaw",	VX (4,1284),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3632 arch/powerpc/xmon/ppc-opc.c {"vnot",	VX (4,1284),	VX_MASK,     PPCVEC,	0,		{VD, VA, VBA}},
VX               3633 arch/powerpc/xmon/ppc-opc.c {"vnor",	VX (4,1284),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3634 arch/powerpc/xmon/ppc-opc.c {"evmhossiaaw",	VX (4,1285),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3638 arch/powerpc/xmon/ppc-opc.c {"evmhossfaaw",	VX (4,1287),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3639 arch/powerpc/xmon/ppc-opc.c {"evmheumiaaw",	VX (4,1288),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3640 arch/powerpc/xmon/ppc-opc.c {"vcipher",	VX (4,1288),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3641 arch/powerpc/xmon/ppc-opc.c {"vcipherlast",	VX (4,1289),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3642 arch/powerpc/xmon/ppc-opc.c {"evmhesmiaaw",	VX (4,1289),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3643 arch/powerpc/xmon/ppc-opc.c {"evmhesmfaaw",	VX (4,1291),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3644 arch/powerpc/xmon/ppc-opc.c {"vgbbd",	VX (4,1292),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3645 arch/powerpc/xmon/ppc-opc.c {"evmhoumiaaw",	VX (4,1292),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3646 arch/powerpc/xmon/ppc-opc.c {"evmhosmiaaw",	VX (4,1293),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3647 arch/powerpc/xmon/ppc-opc.c {"evmhosmfaaw",	VX (4,1295),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3650 arch/powerpc/xmon/ppc-opc.c {"evmhegumiaa",	VX (4,1320),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3651 arch/powerpc/xmon/ppc-opc.c {"evmhegsmiaa",	VX (4,1321),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3652 arch/powerpc/xmon/ppc-opc.c {"evmhegsmfaa",	VX (4,1323),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3653 arch/powerpc/xmon/ppc-opc.c {"evmhogumiaa",	VX (4,1324),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3654 arch/powerpc/xmon/ppc-opc.c {"evmhogsmiaa",	VX (4,1325),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3655 arch/powerpc/xmon/ppc-opc.c {"evmhogsmfaa",	VX (4,1327),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3656 arch/powerpc/xmon/ppc-opc.c {"vsubcuq",	VX (4,1344),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3657 arch/powerpc/xmon/ppc-opc.c {"evmwlusiaaw",	VX (4,1344),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3658 arch/powerpc/xmon/ppc-opc.c {"bcdutrunc.",	VX (4,1345),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3659 arch/powerpc/xmon/ppc-opc.c {"evmwlssiaaw",	VX (4,1345),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3660 arch/powerpc/xmon/ppc-opc.c {"vavgsh",	VX (4,1346),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3661 arch/powerpc/xmon/ppc-opc.c {"vorc",	VX (4,1348),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3665 arch/powerpc/xmon/ppc-opc.c {"vncipher",	VX (4,1352),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3666 arch/powerpc/xmon/ppc-opc.c {"evmwlumiaaw",	VX (4,1352),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3667 arch/powerpc/xmon/ppc-opc.c {"vncipherlast",VX (4,1353),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3668 arch/powerpc/xmon/ppc-opc.c {"evmwlsmiaaw",	VX (4,1353),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3669 arch/powerpc/xmon/ppc-opc.c {"vbpermq",	VX (4,1356),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3670 arch/powerpc/xmon/ppc-opc.c {"vpksdus",	VX (4,1358),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3671 arch/powerpc/xmon/ppc-opc.c {"evmwssfaa",	VX (4,1363),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3673 arch/powerpc/xmon/ppc-opc.c {"evmwumiaa",	VX (4,1368),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3675 arch/powerpc/xmon/ppc-opc.c {"evmwsmiaa",	VX (4,1369),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3676 arch/powerpc/xmon/ppc-opc.c {"evmwsmfaa",	VX (4,1371),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3679 arch/powerpc/xmon/ppc-opc.c {"evmheusianw",	VX (4,1408),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3680 arch/powerpc/xmon/ppc-opc.c {"vsubcuw",	VX (4,1408),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3681 arch/powerpc/xmon/ppc-opc.c {"evmhessianw",	VX (4,1409),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3689 arch/powerpc/xmon/ppc-opc.c {"vavgsw",	VX (4,1410),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3690 arch/powerpc/xmon/ppc-opc.c {"evmhessfanw",	VX (4,1411),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3691 arch/powerpc/xmon/ppc-opc.c {"vnand",	VX (4,1412),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3692 arch/powerpc/xmon/ppc-opc.c {"evmhousianw",	VX (4,1412),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3693 arch/powerpc/xmon/ppc-opc.c {"evmhossianw",	VX (4,1413),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3697 arch/powerpc/xmon/ppc-opc.c {"evmhossfanw",	VX (4,1415),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3698 arch/powerpc/xmon/ppc-opc.c {"evmheumianw",	VX (4,1416),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3699 arch/powerpc/xmon/ppc-opc.c {"evmhesmianw",	VX (4,1417),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3700 arch/powerpc/xmon/ppc-opc.c {"evmhesmfanw",	VX (4,1419),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3701 arch/powerpc/xmon/ppc-opc.c {"evmhoumianw",	VX (4,1420),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3702 arch/powerpc/xmon/ppc-opc.c {"evmhosmianw",	VX (4,1421),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3703 arch/powerpc/xmon/ppc-opc.c {"evmhosmfanw",	VX (4,1423),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3706 arch/powerpc/xmon/ppc-opc.c {"evmhegumian",	VX (4,1448),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3707 arch/powerpc/xmon/ppc-opc.c {"evmhegsmian",	VX (4,1449),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3708 arch/powerpc/xmon/ppc-opc.c {"evmhegsmfan",	VX (4,1451),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3709 arch/powerpc/xmon/ppc-opc.c {"evmhogumian",	VX (4,1452),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3710 arch/powerpc/xmon/ppc-opc.c {"evmhogsmian",	VX (4,1453),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3711 arch/powerpc/xmon/ppc-opc.c {"evmhogsmfan",	VX (4,1455),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3712 arch/powerpc/xmon/ppc-opc.c {"evmwlusianw",	VX (4,1472),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3713 arch/powerpc/xmon/ppc-opc.c {"bcdsr.",	VX (4,1473),	VXPS_MASK,   PPCVEC3,	0,		{VD, VA, VB, PS}},
VX               3714 arch/powerpc/xmon/ppc-opc.c {"evmwlssianw",	VX (4,1473),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3715 arch/powerpc/xmon/ppc-opc.c {"vsld",	VX (4,1476),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3719 arch/powerpc/xmon/ppc-opc.c {"vsbox",	VX (4,1480),	VXVB_MASK,   PPCVEC2,	0,		{VD, VA}},
VX               3720 arch/powerpc/xmon/ppc-opc.c {"evmwlumianw",	VX (4,1480),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3721 arch/powerpc/xmon/ppc-opc.c {"evmwlsmianw",	VX (4,1481),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3722 arch/powerpc/xmon/ppc-opc.c {"vbpermd",	VX (4,1484),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3723 arch/powerpc/xmon/ppc-opc.c {"vpksdss",	VX (4,1486),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3724 arch/powerpc/xmon/ppc-opc.c {"evmwssfan",	VX (4,1491),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3726 arch/powerpc/xmon/ppc-opc.c {"evmwumian",	VX (4,1496),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3728 arch/powerpc/xmon/ppc-opc.c {"evmwsmian",	VX (4,1497),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3729 arch/powerpc/xmon/ppc-opc.c {"evmwsmfan",	VX (4,1499),	VX_MASK,     PPCSPE,	0,		{RS, RA, RB}},
VX               3732 arch/powerpc/xmon/ppc-opc.c {"vsububs",	VX (4,1536),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3749 arch/powerpc/xmon/ppc-opc.c {"mfvscr",	VX (4,1540),	VXVAVB_MASK, PPCVEC,	0,		{VD}},
VX               3753 arch/powerpc/xmon/ppc-opc.c {"vsum4ubs",	VX (4,1544),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3754 arch/powerpc/xmon/ppc-opc.c {"vextublx",	VX (4,1549),	VX_MASK,     PPCVEC3,	0,		{RT, RA, VB}},
VX               3755 arch/powerpc/xmon/ppc-opc.c {"vsubuhs",	VX (4,1600),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3756 arch/powerpc/xmon/ppc-opc.c {"mtvscr",	VX (4,1604),	VXVDVA_MASK, PPCVEC,	0,		{VB}},
VX               3758 arch/powerpc/xmon/ppc-opc.c {"vsum4shs",	VX (4,1608),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3761 arch/powerpc/xmon/ppc-opc.c {"vextuhlx",	VX (4,1613),	VX_MASK,     PPCVEC3,	0,		{RT, RA, VB}},
VX               3762 arch/powerpc/xmon/ppc-opc.c {"vupkhsw",	VX (4,1614),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3763 arch/powerpc/xmon/ppc-opc.c {"vsubuws",	VX (4,1664),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3764 arch/powerpc/xmon/ppc-opc.c {"vshasigmaw",	VX (4,1666),	VX_MASK,     PPCVEC2,	0,		{VD, VA, ST, SIX}},
VX               3765 arch/powerpc/xmon/ppc-opc.c {"veqv",	VX (4,1668),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3769 arch/powerpc/xmon/ppc-opc.c {"vsum2sws",	VX (4,1672),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3770 arch/powerpc/xmon/ppc-opc.c {"vmrgow",	VX (4,1676),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3771 arch/powerpc/xmon/ppc-opc.c {"vextuwlx",	VX (4,1677),	VX_MASK,     PPCVEC3,	0,		{RT, RA, VB}},
VX               3772 arch/powerpc/xmon/ppc-opc.c {"vshasigmad",	VX (4,1730),	VX_MASK,     PPCVEC2,	0,		{VD, VA, ST, SIX}},
VX               3773 arch/powerpc/xmon/ppc-opc.c {"vsrd",	VX (4,1732),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3778 arch/powerpc/xmon/ppc-opc.c {"vupklsw",	VX (4,1742),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3779 arch/powerpc/xmon/ppc-opc.c {"vsubsbs",	VX (4,1792),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3780 arch/powerpc/xmon/ppc-opc.c {"vclzb",	VX (4,1794),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3781 arch/powerpc/xmon/ppc-opc.c {"vpopcntb",	VX (4,1795),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3782 arch/powerpc/xmon/ppc-opc.c {"vsrv",	VX (4,1796),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3786 arch/powerpc/xmon/ppc-opc.c {"vsum4sbs",	VX (4,1800),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3787 arch/powerpc/xmon/ppc-opc.c {"vextubrx",	VX (4,1805),	VX_MASK,     PPCVEC3,	0,		{RT, RA, VB}},
VX               3790 arch/powerpc/xmon/ppc-opc.c {"vsubshs",	VX (4,1856),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3791 arch/powerpc/xmon/ppc-opc.c {"vclzh",	VX (4,1858),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3792 arch/powerpc/xmon/ppc-opc.c {"vpopcnth",	VX (4,1859),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3793 arch/powerpc/xmon/ppc-opc.c {"vslv",	VX (4,1860),	VX_MASK,     PPCVEC3,	0,		{VD, VA, VB}},
VX               3795 arch/powerpc/xmon/ppc-opc.c {"vextuhrx",	VX (4,1869),	VX_MASK,     PPCVEC3,	0,		{RT, RA, VB}},
VX               3802 arch/powerpc/xmon/ppc-opc.c {"vsubsws",	VX (4,1920),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3803 arch/powerpc/xmon/ppc-opc.c {"vclzw",	VX (4,1922),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3804 arch/powerpc/xmon/ppc-opc.c {"vpopcntw",	VX (4,1923),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3808 arch/powerpc/xmon/ppc-opc.c {"vsumsws",	VX (4,1928),	VX_MASK,     PPCVEC,	0,		{VD, VA, VB}},
VX               3809 arch/powerpc/xmon/ppc-opc.c {"vmrgew",	VX (4,1932),	VX_MASK,     PPCVEC2,	0,		{VD, VA, VB}},
VX               3810 arch/powerpc/xmon/ppc-opc.c {"vextuwrx",	VX (4,1933),	VX_MASK,     PPCVEC3,	0,		{RT, RA, VB}},
VX               3813 arch/powerpc/xmon/ppc-opc.c {"vclzd",	VX (4,1986),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX               3814 arch/powerpc/xmon/ppc-opc.c {"vpopcntd",	VX (4,1987),	VXVA_MASK,   PPCVEC2,	0,		{VD, VB}},
VX                428 arch/s390/include/asm/vx-insn.h .macro	VX	vr1, vr2, vr3