VOP_REG_MASK_SYNC  194 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG_MASK_SYNC(PX30_INTR_STATUS, 0xffff, 0),
VOP_REG_MASK_SYNC  195 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG_MASK_SYNC(PX30_INTR_EN, 0xffff, 0),
VOP_REG_MASK_SYNC  196 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG_MASK_SYNC(PX30_INTR_CLEAR, 0xffff, 0),
VOP_REG_MASK_SYNC  666 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG_MASK_SYNC(RK3368_INTR_STATUS, 0x3fff, 0),
VOP_REG_MASK_SYNC  667 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG_MASK_SYNC(RK3368_INTR_EN, 0x3fff, 0),
VOP_REG_MASK_SYNC  668 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG_MASK_SYNC(RK3368_INTR_CLEAR, 0x3fff, 0),
VOP_REG_MASK_SYNC  750 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG_MASK_SYNC(RK3366_INTR_STATUS0, 0xffff, 0),
VOP_REG_MASK_SYNC  751 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG_MASK_SYNC(RK3366_INTR_EN0, 0xffff, 0),
VOP_REG_MASK_SYNC  752 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG_MASK_SYNC(RK3366_INTR_CLEAR0, 0xffff, 0),
VOP_REG_MASK_SYNC  906 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG_MASK_SYNC(RK3328_INTR_STATUS0, 0xffff, 0),
VOP_REG_MASK_SYNC  907 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG_MASK_SYNC(RK3328_INTR_EN0, 0xffff, 0),
VOP_REG_MASK_SYNC  908 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG_MASK_SYNC(RK3328_INTR_CLEAR0, 0xffff, 0),