VOP_REG            64 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
VOP_REG            65 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
VOP_REG            66 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
VOP_REG            67 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
VOP_REG            74 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
VOP_REG            75 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
VOP_REG            76 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
VOP_REG            77 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
VOP_REG            78 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
VOP_REG            79 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
VOP_REG            80 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
VOP_REG            81 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
VOP_REG            82 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
VOP_REG            83 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
VOP_REG            89 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
VOP_REG            90 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
VOP_REG            91 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
VOP_REG            92 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0),
VOP_REG            93 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0),
VOP_REG            94 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0),
VOP_REG            95 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0),
VOP_REG            96 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
VOP_REG           116 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),
VOP_REG           123 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
VOP_REG           124 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),
VOP_REG           125 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
VOP_REG           126 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),
VOP_REG           130 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),
VOP_REG           135 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),
VOP_REG           136 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),
VOP_REG           137 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 27),
VOP_REG           138 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 11),
VOP_REG           139 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 10),
VOP_REG           155 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
VOP_REG           156 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
VOP_REG           157 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
VOP_REG           158 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           159 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),
VOP_REG           160 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),
VOP_REG           161 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
VOP_REG           193 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 0),
VOP_REG           201 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.out_mode = VOP_REG(PX30_DSP_CTRL2, 0xf, 16),
VOP_REG           202 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_blank = VOP_REG(PX30_DSP_CTRL2, 0x1, 14),
VOP_REG           203 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 8),
VOP_REG           204 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_sel = VOP_REG(PX30_DSP_CTRL2, 0x1, 7),
VOP_REG           205 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_mode = VOP_REG(PX30_DSP_CTRL2, 0x1, 6),
VOP_REG           210 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.htotal_pw = VOP_REG(PX30_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
VOP_REG           211 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hact_st_end = VOP_REG(PX30_DSP_HACT_ST_END, 0x0fff0fff, 0),
VOP_REG           212 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vtotal_pw = VOP_REG(PX30_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
VOP_REG           213 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vact_st_end = VOP_REG(PX30_DSP_VACT_ST_END, 0x0fff0fff, 0),
VOP_REG           217 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 1),
VOP_REG           218 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0xf, 25),
VOP_REG           219 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0),
VOP_REG           220 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24),
VOP_REG           224 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_x = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
VOP_REG           225 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_y = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
VOP_REG           226 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_x = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
VOP_REG           227 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_y = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
VOP_REG           234 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0),
VOP_REG           235 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1),
VOP_REG           236 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12),
VOP_REG           237 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(PX30_WIN0_ACT_INFO, 0xffffffff, 0),
VOP_REG           238 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(PX30_WIN0_DSP_INFO, 0xffffffff, 0),
VOP_REG           239 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(PX30_WIN0_DSP_ST, 0xffffffff, 0),
VOP_REG           240 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(PX30_WIN0_YRGB_MST0, 0xffffffff, 0),
VOP_REG           241 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(PX30_WIN0_CBR_MST0, 0xffffffff, 0),
VOP_REG           242 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 0),
VOP_REG           243 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 16),
VOP_REG           249 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0),
VOP_REG           250 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4),
VOP_REG           251 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12),
VOP_REG           252 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(PX30_WIN1_DSP_INFO, 0xffffffff, 0),
VOP_REG           253 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0),
VOP_REG           254 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0),
VOP_REG           255 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(PX30_WIN1_VIR, 0x1fff, 0),
VOP_REG           261 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4),
VOP_REG           262 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0),
VOP_REG           263 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5),
VOP_REG           264 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20),
VOP_REG           265 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0),
VOP_REG           266 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(PX30_WIN2_DSP_ST0, 0x1fff1fff, 0),
VOP_REG           267 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(PX30_WIN2_MST0, 0xffffffff, 0),
VOP_REG           268 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(PX30_WIN2_VIR0_1, 0x1fff, 0),
VOP_REG           306 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
VOP_REG           307 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
VOP_REG           308 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
VOP_REG           309 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
VOP_REG           316 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),
VOP_REG           317 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 4),
VOP_REG           318 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 19),
VOP_REG           319 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0),
VOP_REG           320 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           321 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0),
VOP_REG           322 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3066_WIN0_YRGB_MST0, 0xffffffff, 0),
VOP_REG           323 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0),
VOP_REG           324 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0),
VOP_REG           325 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16),
VOP_REG           332 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),
VOP_REG           333 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 7),
VOP_REG           334 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 23),
VOP_REG           335 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0),
VOP_REG           336 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           337 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0),
VOP_REG           338 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3066_WIN1_YRGB_MST, 0xffffffff, 0),
VOP_REG           339 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0),
VOP_REG           340 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0),
VOP_REG           341 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16),
VOP_REG           347 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),
VOP_REG           348 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3066_SYS_CTRL0, 0x7, 10),
VOP_REG           349 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3066_SYS_CTRL0, 0x1, 27),
VOP_REG           350 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           351 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),
VOP_REG           352 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),
VOP_REG           353 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0),
VOP_REG           357 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.htotal_pw = VOP_REG(RK3066_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
VOP_REG           358 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hact_st_end = VOP_REG(RK3066_DSP_HACT_ST_END, 0x1fff1fff, 0),
VOP_REG           359 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vtotal_pw = VOP_REG(RK3066_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
VOP_REG           360 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vact_st_end = VOP_REG(RK3066_DSP_VACT_ST_END, 0x1fff1fff, 0),
VOP_REG           364 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.pin_pol = VOP_REG(RK3066_DSP_CTRL0, 0x7, 4),
VOP_REG           368 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1),
VOP_REG           369 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0),
VOP_REG           370 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0),
VOP_REG           371 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11),
VOP_REG           372 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10),
VOP_REG           373 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24),
VOP_REG           399 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3066_INT_STATUS, 0xfff, 12),
VOP_REG           400 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG(RK3066_INT_STATUS, 0xf, 0),
VOP_REG           401 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3066_INT_STATUS, 0xf, 4),
VOP_REG           402 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG(RK3066_INT_STATUS, 0xf, 8),
VOP_REG           416 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
VOP_REG           417 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
VOP_REG           418 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
VOP_REG           419 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
VOP_REG           426 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0),
VOP_REG           427 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3),
VOP_REG           428 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15),
VOP_REG           429 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3188_WIN0_ACT_INFO, 0x1fff1fff, 0),
VOP_REG           430 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3188_WIN0_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           431 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3188_WIN0_DSP_ST, 0x1fff1fff, 0),
VOP_REG           432 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0),
VOP_REG           433 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0),
VOP_REG           434 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0),
VOP_REG           440 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 1),
VOP_REG           441 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3188_SYS_CTRL, 0x7, 6),
VOP_REG           442 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 19),
VOP_REG           444 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3188_WIN1_DSP_INFO, 0x07ff07ff, 0),
VOP_REG           445 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0),
VOP_REG           446 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0),
VOP_REG           447 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16),
VOP_REG           451 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.htotal_pw = VOP_REG(RK3188_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
VOP_REG           452 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hact_st_end = VOP_REG(RK3188_DSP_HACT_ST_END, 0x0fff0fff, 0),
VOP_REG           453 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vtotal_pw = VOP_REG(RK3188_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
VOP_REG           454 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vact_st_end = VOP_REG(RK3188_DSP_VACT_ST_END, 0x0fff0fff, 0),
VOP_REG           458 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.pin_pol = VOP_REG(RK3188_DSP_CTRL0, 0xf, 4),
VOP_REG           462 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.gate_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 31),
VOP_REG           463 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.standby = VOP_REG(RK3188_SYS_CTRL, 0x1, 30),
VOP_REG           464 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.out_mode = VOP_REG(RK3188_DSP_CTRL0, 0xf, 0),
VOP_REG           465 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cfg_done = VOP_REG(RK3188_REG_CFG_DONE, 0x1, 0),
VOP_REG           466 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_sel = VOP_REG(RK3188_DSP_CTRL0, 0x1, 27),
VOP_REG           467 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11),
VOP_REG           468 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10),
VOP_REG           469 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x3, 24),
VOP_REG           493 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3188_INT_STATUS, 0xfff, 12),
VOP_REG           494 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG(RK3188_INT_STATUS, 0xf, 0),
VOP_REG           495 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3188_INT_STATUS, 0xf, 4),
VOP_REG           496 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG(RK3188_INT_STATUS, 0xf, 8),
VOP_REG           510 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),
VOP_REG           511 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),
VOP_REG           512 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28),
VOP_REG           513 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26),
VOP_REG           514 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),
VOP_REG           515 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23),
VOP_REG           516 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22),
VOP_REG           517 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20),
VOP_REG           518 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18),
VOP_REG           519 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16),
VOP_REG           520 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15),
VOP_REG           521 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12),
VOP_REG           522 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8),
VOP_REG           523 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7),
VOP_REG           524 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6),
VOP_REG           525 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5),
VOP_REG           526 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4),
VOP_REG           527 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2),
VOP_REG           528 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1),
VOP_REG           529 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0),
VOP_REG           530 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),
VOP_REG           535 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
VOP_REG           536 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
VOP_REG           537 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
VOP_REG           538 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
VOP_REG           545 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
VOP_REG           546 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
VOP_REG           547 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
VOP_REG           548 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
VOP_REG           549 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           550 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
VOP_REG           551 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
VOP_REG           552 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
VOP_REG           553 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
VOP_REG           554 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
VOP_REG           555 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
VOP_REG           556 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
VOP_REG           557 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
VOP_REG           563 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4),
VOP_REG           564 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),
VOP_REG           565 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1),
VOP_REG           566 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12),
VOP_REG           567 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0),
VOP_REG           568 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3288_WIN2_DSP_ST0, 0x1fff1fff, 0),
VOP_REG           569 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3288_WIN2_MST0, 0xffffffff, 0),
VOP_REG           570 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3288_WIN2_VIR0_1, 0x1fff, 0),
VOP_REG           571 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.src_alpha_ctl = VOP_REG(RK3288_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
VOP_REG           572 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0),
VOP_REG           576 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
VOP_REG           577 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),
VOP_REG           578 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
VOP_REG           579 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),
VOP_REG           580 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
VOP_REG           581 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
VOP_REG           585 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4),
VOP_REG           586 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
VOP_REG           587 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
VOP_REG           588 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
VOP_REG           589 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
VOP_REG           594 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),
VOP_REG           595 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),
VOP_REG           596 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_sel = VOP_REG(RK3288_DSP_CTRL1, 0x1, 4),
VOP_REG           597 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_mode = VOP_REG(RK3288_DSP_CTRL1, 0x1, 3),
VOP_REG           598 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 2),
VOP_REG           599 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),
VOP_REG           600 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),
VOP_REG           601 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),
VOP_REG           602 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),
VOP_REG           603 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),
VOP_REG           634 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),
VOP_REG           635 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
VOP_REG           636 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4),
VOP_REG           637 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8),
VOP_REG           664 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),
VOP_REG           665 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),
VOP_REG           675 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),
VOP_REG           676 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),
VOP_REG           677 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),
VOP_REG           678 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),
VOP_REG           679 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22),
VOP_REG           680 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0),
VOP_REG           681 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0),
VOP_REG           682 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0),
VOP_REG           683 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0),
VOP_REG           684 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0),
VOP_REG           685 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0),
VOP_REG           686 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16),
VOP_REG           687 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
VOP_REG           688 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0),
VOP_REG           689 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0),
VOP_REG           695 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),
VOP_REG           696 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),
VOP_REG           697 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),
VOP_REG           698 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),
VOP_REG           699 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),
VOP_REG           700 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),
VOP_REG           701 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),
VOP_REG           702 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),
VOP_REG           703 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),
VOP_REG           704 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0),
VOP_REG           705 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0),
VOP_REG           720 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 16),
VOP_REG           721 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 20),
VOP_REG           722 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 24),
VOP_REG           723 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 28),
VOP_REG           724 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
VOP_REG           725 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
VOP_REG           726 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
VOP_REG           727 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
VOP_REG           731 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.global_regdone_en = VOP_REG(RK3368_SYS_CTRL, 0x1, 11),
VOP_REG           748 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),
VOP_REG           749 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),
VOP_REG           767 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0xf, 16),
VOP_REG           768 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 16),
VOP_REG           769 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 20),
VOP_REG           770 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 24),
VOP_REG           771 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0xf, 28),
VOP_REG           772 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),
VOP_REG           773 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),
VOP_REG           774 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),
VOP_REG           775 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),
VOP_REG           776 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),
VOP_REG           777 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3),
VOP_REG           782 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),
VOP_REG           783 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 16),
VOP_REG           784 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 0),
VOP_REG           785 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 16),
VOP_REG           786 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 0),
VOP_REG           787 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 16),
VOP_REG           788 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 0),
VOP_REG           789 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 16),
VOP_REG           790 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 16, 0xffff, 0),
VOP_REG           791 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 20, 0xffffffff, 0),
VOP_REG           792 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 24, 0xffffffff, 0),
VOP_REG           793 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 		VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 28, 0xffffffff, 0),
VOP_REG           801 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	  .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1) },
VOP_REG           803 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	  .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 9) },
VOP_REG           830 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	  .y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1)},
VOP_REG           866 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
VOP_REG           867 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),
VOP_REG           868 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
VOP_REG           869 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),
VOP_REG           870 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
VOP_REG           871 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),
VOP_REG           875 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),
VOP_REG           876 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),
VOP_REG           877 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),
VOP_REG           878 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),
VOP_REG           879 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 16),
VOP_REG           880 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 20),
VOP_REG           881 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 24),
VOP_REG           882 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0xf, 28),
VOP_REG           886 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),
VOP_REG           891 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_sel = VOP_REG(RK3328_DSP_CTRL1, 0x1, 4),
VOP_REG           892 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_mode = VOP_REG(RK3328_DSP_CTRL1, 0x1, 3),
VOP_REG           893 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_down_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 2),
VOP_REG           894 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.pre_dither_down = VOP_REG(RK3328_DSP_CTRL1, 0x1, 1),
VOP_REG           895 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),
VOP_REG           896 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),
VOP_REG           897 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),
VOP_REG           904 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),
VOP_REG           905 drivers/gpu/drm/rockchip/rockchip_vop_reg.c 	.line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),