VM_L2_CNTL2       152 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
VM_L2_CNTL2       153 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
VM_L2_CNTL2       616 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c 	tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
VM_L2_CNTL2       617 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
VM_L2_CNTL2       844 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
VM_L2_CNTL2       845 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
VM_L2_CNTL2       181 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1);
VM_L2_CNTL2       182 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
VM_L2_CNTL2      5459 drivers/gpu/drm/radeon/cik.c 	WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);
VM_L2_CNTL2      5576 drivers/gpu/drm/radeon/cik.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      2413 drivers/gpu/drm/radeon/evergreen.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      2466 drivers/gpu/drm/radeon/evergreen.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      2496 drivers/gpu/drm/radeon/evergreen.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      1300 drivers/gpu/drm/radeon/ni.c 	WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);
VM_L2_CNTL2      1379 drivers/gpu/drm/radeon/ni.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      1146 drivers/gpu/drm/radeon/r600.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      1238 drivers/gpu/drm/radeon/r600.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2       913 drivers/gpu/drm/radeon/rv770.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2       959 drivers/gpu/drm/radeon/rv770.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2       990 drivers/gpu/drm/radeon/rv770.c 	WREG32(VM_L2_CNTL2, 0);
VM_L2_CNTL2      4311 drivers/gpu/drm/radeon/si.c 	WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);
VM_L2_CNTL2      4397 drivers/gpu/drm/radeon/si.c 	WREG32(VM_L2_CNTL2, 0);