VM_CONTEXT1_CNTL 216 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); VM_CONTEXT1_CNTL 217 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, VM_CONTEXT1_CNTL 219 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 221 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 224 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 226 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 228 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 230 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 232 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 234 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 238 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 416 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 418 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 420 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 422 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 424 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 426 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 499 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 501 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 503 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 505 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 507 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 509 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 664 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); VM_CONTEXT1_CNTL 665 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, 1); VM_CONTEXT1_CNTL 666 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_BLOCK_SIZE, VM_CONTEXT1_CNTL 724 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 726 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 728 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 730 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 732 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 734 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 736 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 907 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); VM_CONTEXT1_CNTL 908 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, 1); VM_CONTEXT1_CNTL 909 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 910 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 911 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PDE0_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 912 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VALID_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 913 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, READ_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 914 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 915 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); VM_CONTEXT1_CNTL 916 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_BLOCK_SIZE, VM_CONTEXT1_CNTL 248 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); VM_CONTEXT1_CNTL 249 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, VM_CONTEXT1_CNTL 251 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 253 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 256 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 258 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 260 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 262 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 264 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 266 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 270 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, VM_CONTEXT1_CNTL 5494 drivers/gpu/drm/radeon/cik.c WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | VM_CONTEXT1_CNTL 5565 drivers/gpu/drm/radeon/cik.c WREG32(VM_CONTEXT1_CNTL, 0); VM_CONTEXT1_CNTL 2445 drivers/gpu/drm/radeon/evergreen.c WREG32(VM_CONTEXT1_CNTL, 0); VM_CONTEXT1_CNTL 2461 drivers/gpu/drm/radeon/evergreen.c WREG32(VM_CONTEXT1_CNTL, 0); VM_CONTEXT1_CNTL 2511 drivers/gpu/drm/radeon/evergreen.c WREG32(VM_CONTEXT1_CNTL, 0); VM_CONTEXT1_CNTL 1335 drivers/gpu/drm/radeon/ni.c WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | VM_CONTEXT1_CNTL 1369 drivers/gpu/drm/radeon/ni.c WREG32(VM_CONTEXT1_CNTL, 0); VM_CONTEXT1_CNTL 4350 drivers/gpu/drm/radeon/si.c WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) | VM_CONTEXT1_CNTL 4388 drivers/gpu/drm/radeon/si.c WREG32(VM_CONTEXT1_CNTL, 0);