VMID 213 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); VMID 856 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); VMID 169 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); VMID 2517 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0); VMID 2587 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_CE_IC_BASE_CNTL, VMID, 0); VMID 2656 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0); VMID 3036 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_GFX_MQD_CONTROL, VMID, 0); VMID 3043 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_VMID, VMID, 0); VMID 3318 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); VMID 4500 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); VMID 3304 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0); VMID 3479 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); VMID 635 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); VMID 745 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); VMID 1273 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c VMID); VMID 989 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); VMID 1458 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c VMID); VMID 137 drivers/gpu/drm/amd/amdgpu/nv.c grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid); VMID 292 drivers/gpu/drm/amd/amdgpu/soc15.c grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid); VMID 365 drivers/gpu/drm/amd/amdgpu/vi.c srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid); VMID 690 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c VMID, address->vmid); VMID 116 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh) VMID 185 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h type VMID VMID 91 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.h HUBP_SF(HUBPREQ0_VMID_SETTINGS_0, VMID, mask_sh),\ VMID 202 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c tmp = PHM_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0); VMID 1859 drivers/gpu/drm/radeon/cik.c VMID(vmid & 0xf) | VMID 5716 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, VMID(vm_id)); VMID 5734 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, VMID(0)); VMID 964 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_write(ring, VMID(vm_id)); VMID 984 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_write(ring, VMID(0)); VMID 191 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_VMID(b, n, v) SET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), VMID, v) VMID 309 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_VMID(b, n) GET_GLOBAL_FIELD(b, (n<<2)|(M2VCBR_N), VMID)