VECS0            2137 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	[I915_EXEC_VEBOX]	= VECS0
VECS0             122 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	[VECS0] = {
VECS0             159 drivers/gpu/drm/i915/gt/intel_engine_user.c 		[VIDEO_ENHANCEMENT_CLASS] = { VECS0, I915_MAX_VECS },
VECS0             447 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		if (HAS_ENGINE(gt->i915, VECS0)) {
VECS0            3069 drivers/gpu/drm/i915/gt/intel_lrc.c 			[VECS0] = GEN8_VECS_IRQ_SHIFT,
VECS0             335 drivers/gpu/drm/i915/gt/intel_mocs.c 	case VECS0:
VECS0             291 drivers/gpu/drm/i915/gt/intel_reset.c 		[VECS0] = GEN6_GRDOM_VECS,
VECS0             416 drivers/gpu/drm/i915/gt/intel_reset.c 		[VECS0] = GEN11_GRDOM_VECS,
VECS0             558 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		case VECS0:
VECS0             415 drivers/gpu/drm/i915/gvt/cmd_parser.c #define R_VECS	BIT(VECS0)
VECS0             613 drivers/gpu/drm/i915/gvt/cmd_parser.c 	[VECS0] = {
VECS0            1101 drivers/gpu/drm/i915/gvt/cmd_parser.c 	[VECS0] = {
VECS0              54 drivers/gpu/drm/i915/gvt/execlist.c 	[VECS0] = VECS_AS_CONTEXT_SWITCH,
VECS0             338 drivers/gpu/drm/i915/gvt/handlers.c 			engine_mask |= BIT(VECS0);
VECS0            1768 drivers/gpu/drm/i915/gvt/handlers.c 		id = VECS0;
VECS0             128 drivers/gpu/drm/i915/gvt/mmio_context.c 	{VECS0, RING_EXCC(VEBOX_RING_BASE), 0xffff, false}, /* 0x1a028 */
VECS0             156 drivers/gpu/drm/i915/gvt/mmio_context.c 	[VECS0] = 0xcb00,
VECS0             343 drivers/gpu/drm/i915/gvt/mmio_context.c 	[VECS0] = 0x4270,
VECS0             403 drivers/gpu/drm/i915/gvt/mmio_context.c 		[VECS0] = 0xcb00,
VECS0            2078 drivers/gpu/drm/i915/i915_drv.h 	ENGINE_INSTANCES_MASK(dev_priv, VECS0, I915_MAX_VECS)
VECS0            1124 drivers/gpu/drm/i915/i915_gpu_error.c 			case VECS0:
VECS0            1697 drivers/gpu/drm/i915/i915_irq.c 		intel_engine_breadcrumbs_irq(dev_priv->engine[VECS0]);
VECS0             493 drivers/gpu/drm/i915/i915_pci.c 	.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
VECS0             557 drivers/gpu/drm/i915/i915_pci.c 		BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
VECS0             566 drivers/gpu/drm/i915/i915_pci.c 	.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
VECS0             616 drivers/gpu/drm/i915/i915_pci.c 		BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
VECS0             633 drivers/gpu/drm/i915/i915_pci.c 	.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
VECS0             690 drivers/gpu/drm/i915/i915_pci.c 		BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
VECS0             711 drivers/gpu/drm/i915/i915_pci.c 		BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
VECS0             760 drivers/gpu/drm/i915/i915_pci.c 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
VECS0             767 drivers/gpu/drm/i915/i915_pci.c 	.engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VCS0) | BIT(VECS0),
VECS0             799 drivers/gpu/drm/i915/i915_pci.c 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),