VCN_HWIP           42 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c 		adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i]));
VCN_HWIP           42 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c 		adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i]));
VCN_HWIP           42 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c 		adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i]));
VCN_HWIP           44 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c 		adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(VCN_BASE.instance[i]));