VCE_CLOCK_GATING_A  107 drivers/gpu/drm/radeon/vce_v1_0.c 		tmp = RREG32(VCE_CLOCK_GATING_A);
VCE_CLOCK_GATING_A  109 drivers/gpu/drm/radeon/vce_v1_0.c 		WREG32(VCE_CLOCK_GATING_A, tmp);
VCE_CLOCK_GATING_A  120 drivers/gpu/drm/radeon/vce_v1_0.c 		tmp = RREG32(VCE_CLOCK_GATING_A);
VCE_CLOCK_GATING_A  122 drivers/gpu/drm/radeon/vce_v1_0.c 		WREG32(VCE_CLOCK_GATING_A, tmp);
VCE_CLOCK_GATING_A  139 drivers/gpu/drm/radeon/vce_v1_0.c 	tmp = RREG32(VCE_CLOCK_GATING_A);
VCE_CLOCK_GATING_A  141 drivers/gpu/drm/radeon/vce_v1_0.c 	WREG32(VCE_CLOCK_GATING_A, tmp);
VCE_CLOCK_GATING_A  222 drivers/gpu/drm/radeon/vce_v1_0.c 	WREG32_P(VCE_CLOCK_GATING_A, 0, ~(1 << 16));
VCE_CLOCK_GATING_A  134 drivers/gpu/drm/radeon/vce_v2_0.c 	tmp = RREG32(VCE_CLOCK_GATING_A);
VCE_CLOCK_GATING_A  138 drivers/gpu/drm/radeon/vce_v2_0.c 	WREG32(VCE_CLOCK_GATING_A, tmp);
VCE_CLOCK_GATING_A  162 drivers/gpu/drm/radeon/vce_v2_0.c 	WREG32_P(VCE_CLOCK_GATING_A, 0, ~(1 << 16));