VC5_OUT_DIV_CONTROL_SELB_NORM  569 drivers/clk/clk-versaclock5.c 	const u8 mask = VC5_OUT_DIV_CONTROL_SELB_NORM |
VC5_OUT_DIV_CONTROL_SELB_NORM  610 drivers/clk/clk-versaclock5.c 	const u8 mask = VC5_OUT_DIV_CONTROL_SELB_NORM |
VC5_OUT_DIV_CONTROL_SELB_NORM  613 drivers/clk/clk-versaclock5.c 	const u8 fodclkmask = VC5_OUT_DIV_CONTROL_SELB_NORM |
VC5_OUT_DIV_CONTROL_SELB_NORM  615 drivers/clk/clk-versaclock5.c 	const u8 extclk = VC5_OUT_DIV_CONTROL_SELB_NORM |
VC5_OUT_DIV_CONTROL_SELB_NORM  641 drivers/clk/clk-versaclock5.c 			VC5_OUT_DIV_CONTROL_SELB_NORM |
VC5_OUT_DIV_CONTROL_SELB_NORM  644 drivers/clk/clk-versaclock5.c 	const u8 extclk = VC5_OUT_DIV_CONTROL_SELB_NORM |