VBLANK_ACK 3190 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); VBLANK_ACK 3316 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); VBLANK_ACK 2940 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_ACK); VBLANK_ACK 7336 drivers/gpu/drm/radeon/cik.c WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); VBLANK_ACK 7340 drivers/gpu/drm/radeon/cik.c WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK); VBLANK_ACK 7352 drivers/gpu/drm/radeon/cik.c WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); VBLANK_ACK 7356 drivers/gpu/drm/radeon/cik.c WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK); VBLANK_ACK 7369 drivers/gpu/drm/radeon/cik.c WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); VBLANK_ACK 7373 drivers/gpu/drm/radeon/cik.c WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK); VBLANK_ACK 4637 drivers/gpu/drm/radeon/evergreen.c VBLANK_ACK); VBLANK_ACK 6171 drivers/gpu/drm/radeon/si.c VBLANK_ACK);