VBIOS_MC_REGISTER_ARRAY_SIZE 1601 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c if (num_entries > VBIOS_MC_REGISTER_ARRAY_SIZE) VBIOS_MC_REGISTER_ARRAY_SIZE 104 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; VBIOS_MC_REGISTER_ARRAY_SIZE 116 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.h struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; VBIOS_MC_REGISTER_ARRAY_SIZE 112 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c PP_ASSERT_WITH_CODE((num_entries <= VBIOS_MC_REGISTER_ARRAY_SIZE), VBIOS_MC_REGISTER_ARRAY_SIZE 221 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h uint32_t mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; VBIOS_MC_REGISTER_ARRAY_SIZE 251 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h pp_atomctrl_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; VBIOS_MC_REGISTER_ARRAY_SIZE 4019 drivers/gpu/drm/radeon/radeon_atombios.c if (num_entries > VBIOS_MC_REGISTER_ARRAY_SIZE) VBIOS_MC_REGISTER_ARRAY_SIZE 656 drivers/gpu/drm/radeon/radeon_mode.h u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE]; VBIOS_MC_REGISTER_ARRAY_SIZE 668 drivers/gpu/drm/radeon/radeon_mode.h struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];