VA_BITS 408 arch/arm64/include/asm/kvm_mmu.h idmap_idx = hyp_idmap_start >> VA_BITS; VA_BITS 48 arch/arm64/include/asm/memory.h #define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS)) VA_BITS 61 arch/arm64/include/asm/memory.h #if VA_BITS > 48 VA_BITS 64 arch/arm64/include/asm/memory.h #define VA_BITS_MIN (VA_BITS) VA_BITS 75 arch/arm64/include/asm/memory.h #define MAX_USER_VA_BITS VA_BITS VA_BITS 69 arch/arm64/include/asm/mmu_context.h return unlikely(idmap_t0sz != TCR_T0SZ(VA_BITS)); VA_BITS 12 arch/arm64/kernel/crash_core.c VMCOREINFO_NUMBER(VA_BITS); VA_BITS 348 arch/arm64/kernel/head.S #if (VA_BITS < 48) VA_BITS 359 arch/arm64/kernel/head.S #if VA_BITS != EXTRA_SHIFT VA_BITS 159 arch/arm64/mm/kasan_init.c BUILD_BUG_ON(!IS_ALIGNED(_KASAN_SHADOW_START(VA_BITS), PGDIR_SIZE)); VA_BITS 41 arch/arm64/mm/mmu.c u64 idmap_t0sz = TCR_T0SZ(VA_BITS); VA_BITS 698 arch/arm64/mm/mmu.c if ((((long)addr) >> VA_BITS) != -1UL) VA_BITS 568 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define ESID_BITS (VA_BITS - (SID_SHIFT + CONTEXT_BITS)) VA_BITS 569 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define ESID_BITS_1T (VA_BITS - (SID_SHIFT_1T + CONTEXT_BITS)) VA_BITS 639 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_BITS_256M (VA_BITS - SID_SHIFT) VA_BITS 647 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_BITS_1T (VA_BITS - SID_SHIFT_1T) VA_BITS 769 arch/powerpc/include/asm/book3s/64/mmu-hash.h unsigned long va_bits = VA_BITS; VA_BITS 1915 arch/powerpc/platforms/pseries/lpar.c unsigned long va_bits = VA_BITS; VA_BITS 25 arch/sparc/include/asm/processor_64.h #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) VA_BITS 27 arch/sparc/include/asm/processor_64.h #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) VA_BITS 2228 drivers/iommu/arm-smmu-v3.c ias = min_t(unsigned long, ias, VA_BITS); VA_BITS 803 virt/kvm/arm/mmu.c if ((base ^ io_map_base) & BIT(VA_BITS - 1))