V7M_SCB_CTR        90 arch/arm/include/asm/cachetype.h 	writel(cache_selector, BASEADDR_V7M_SCB + V7M_SCB_CTR);
V7M_SCB_CTR       204 arch/arm/include/asm/cputype.h 	return readl(BASEADDR_V7M_SCB + V7M_SCB_CTR);