UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  685 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c 	data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK |
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 1341 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c 	data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK |
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK 1624 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	data2 &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK |
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  547 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  620 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 	data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  598 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  828 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 	data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  526 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		data &= ~(UVD_SUVD_CGC_CTRL__SRE_MODE_MASK
UVD_SUVD_CGC_CTRL__SRE_MODE_MASK  588 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 		data |= (UVD_SUVD_CGC_CTRL__SRE_MODE_MASK