UVD_MPC_SET_MUXA0__VARA_4__SHIFT  827 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));
UVD_MPC_SET_MUXA0__VARA_4__SHIFT 1025 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		 (0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0xFFFFFFFF, 0);
UVD_MPC_SET_MUXA0__VARA_4__SHIFT  979 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		 (0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);
UVD_MPC_SET_MUXA0__VARA_4__SHIFT 1107 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));
UVD_MPC_SET_MUXA0__VARA_4__SHIFT  763 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));