UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT   64 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h 			<< UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT) | 			\
UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT   76 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h 			<< UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT) | 			\
UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT  108 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h 			offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); 			\
UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT  119 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h 				 offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); 		\