UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  464 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  589 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  591 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		data |= 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  650 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  652 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c 		reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  516 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  618 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		reg_data = 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  620 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		reg_data = 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  797 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  799 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c 		data |= 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  441 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  558 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			data |= 1 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;
UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT  560 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c 			data |= 0 << UVD_CGC_CTRL__DYN_CLOCK_MODE__SHIFT;