UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 587 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 596 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c data &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 611 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c tmp |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK | UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 660 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK | UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 747 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 756 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c data &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 824 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c if (data & UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK) UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 1315 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK | UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 1405 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 1414 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c data &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 1487 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c if (data & UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK) UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 845 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK, 0); UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 958 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK); UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 1598 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c data |= UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK | UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 466 drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c data &= ~ UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 518 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c data &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK; UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK 443 drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c data &= ~UVD_CGC_CTRL__DYN_CLOCK_MODE_MASK;