UL 10 arch/alpha/include/asm/page.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 32 arch/arc/include/uapi/asm/page.h #define PAGE_OFFSET _AC(0x80000000, UL) /* Kernel starts at 2G onwrds */ UL 129 arch/arm/include/asm/cp15.h #define cr_alignment UL(0) UL 41 arch/arm/include/asm/delay.h #define UDELAY_MULT UL(2147 * HZ + 483648 * HZ / 1000000) UL 151 arch/arm/include/asm/kvm_arm.h #define VTTBR_CNP_BIT _AC(1, UL) UL 158 arch/arm/include/asm/kvm_arm.h #define HSR_EC (_AC(0x3f, UL) << HSR_EC_SHIFT) UL 159 arch/arm/include/asm/kvm_arm.h #define HSR_IL (_AC(1, UL) << 25) UL 162 arch/arm/include/asm/kvm_arm.h #define HSR_ISV (_AC(1, UL) << HSR_ISV_SHIFT) UL 170 arch/arm/include/asm/kvm_arm.h #define HSR_CV (_AC(1, UL) << HSR_CV_SHIFT) UL 172 arch/arm/include/asm/kvm_arm.h #define HSR_COND (_AC(0xf, UL) << HSR_COND_SHIFT) UL 211 arch/arm/include/asm/kvm_arm.h #define HSR_WFI_IS_WFE (_AC(1, UL) << 0) UL 213 arch/arm/include/asm/kvm_arm.h #define HSR_HVC_IMM_MASK ((_AC(1, UL) << 16) - 1) UL 215 arch/arm/include/asm/kvm_arm.h #define HSR_DABT_S1PTW (_AC(1, UL) << 7) UL 216 arch/arm/include/asm/kvm_arm.h #define HSR_DABT_CM (_AC(1, UL) << 8) UL 23 arch/arm/include/asm/memory.h #define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET) UL 31 arch/arm/include/asm/memory.h #define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M)) UL 37 arch/arm/include/asm/memory.h #define TASK_SIZE_26 (UL(1) << 26) UL 77 arch/arm/include/asm/memory.h #define VECTORS_BASE UL(0xffff0000) UL 93 arch/arm/include/asm/memory.h #define TASK_SIZE UL(0xffffffff) UL 96 arch/arm/include/asm/memory.h #define TASK_UNMAPPED_BASE UL(0x00000000) UL 100 arch/arm/include/asm/memory.h #define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) UL 125 arch/arm/include/asm/memory.h #define ITCM_OFFSET UL(0xfffe0000) UL 126 arch/arm/include/asm/memory.h #define DTCM_OFFSET UL(0xfffe8000) UL 141 arch/arm/include/asm/memory.h #define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) UL 12 arch/arm/include/asm/page.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 56 arch/arm/include/asm/pgtable-3level.h #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) UL 25 arch/arm/mach-davinci/include/mach/hardware.h #define IO_PHYS UL(0x01c00000) UL 25 arch/arm/mach-omap1/include/mach/memory.h #define OMAP1510_LB_OFFSET UL(0x30000000) UL 21 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM1_2_BASE UL(0xD0000000) UL 23 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM1_UART_BASE UL(0xD0000000) UL 25 arch/arm/mach-spear/include/mach/spear.h #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) UL 28 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) UL 32 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) UL 34 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) UL 35 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) UL 37 arch/arm/mach-spear/include/mach/spear.h #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) UL 49 arch/arm/mach-spear/include/mach/spear.h #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) UL 54 arch/arm/mach-spear/include/mach/spear.h #define PERIP_GRP2_BASE UL(0xB3000000) UL 56 arch/arm/mach-spear/include/mach/spear.h #define MCIF_SDHCI_BASE UL(0xB3000000) UL 57 arch/arm/mach-spear/include/mach/spear.h #define SYSRAM0_BASE UL(0xB3800000) UL 61 arch/arm/mach-spear/include/mach/spear.h #define PERIP_GRP1_BASE UL(0xE0000000) UL 63 arch/arm/mach-spear/include/mach/spear.h #define UART_BASE UL(0xE0000000) UL 65 arch/arm/mach-spear/include/mach/spear.h #define SSP_BASE UL(0xE0100000) UL 66 arch/arm/mach-spear/include/mach/spear.h #define MISC_BASE UL(0xE0700000) UL 69 arch/arm/mach-spear/include/mach/spear.h #define A9SM_AND_MPMC_BASE UL(0xEC000000) UL 72 arch/arm/mach-spear/include/mach/spear.h #define SPEAR1310_RAS_BASE UL(0xD8400000) UL 73 arch/arm/mach-spear/include/mach/spear.h #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) UL 76 arch/arm/mach-spear/include/mach/spear.h #define A9SM_PERIP_BASE UL(0xEC800000) UL 80 arch/arm/mach-spear/include/mach/spear.h #define L2CC_BASE UL(0xED000000) UL 81 arch/arm/mach-spear/include/mach/spear.h #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) UL 84 arch/arm/mach-spear/include/mach/spear.h #define MCIF_CF_BASE UL(0xB2800000) UL 24 arch/arm/mach-spear/spear1310.c #define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000) UL 25 arch/arm/mach-spear/spear1310.c #define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000) UL 23 arch/arm/mach-spear/spear310.c #define SPEAR310_UART1_BASE UL(0xB2000000) UL 24 arch/arm/mach-spear/spear310.c #define SPEAR310_UART2_BASE UL(0xB2080000) UL 25 arch/arm/mach-spear/spear310.c #define SPEAR310_UART3_BASE UL(0xB2100000) UL 26 arch/arm/mach-spear/spear310.c #define SPEAR310_UART4_BASE UL(0xB2180000) UL 27 arch/arm/mach-spear/spear310.c #define SPEAR310_UART5_BASE UL(0xB2200000) UL 25 arch/arm/mach-spear/spear320.c #define SPEAR320_UART1_BASE UL(0xA3000000) UL 26 arch/arm/mach-spear/spear320.c #define SPEAR320_UART2_BASE UL(0xA4000000) UL 27 arch/arm/mach-spear/spear320.c #define SPEAR320_SSP0_BASE UL(0xA5000000) UL 28 arch/arm/mach-spear/spear320.c #define SPEAR320_SSP1_BASE UL(0xA6000000) UL 12 arch/arm64/include/asm/cputype.h #define MPIDR_HWID_BITMASK UL(0xff00ffffff) UL 69 arch/arm64/include/asm/esr.h #define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) UL 73 arch/arm64/include/asm/esr.h #define ESR_ELx_IL (UL(1) << ESR_ELx_IL_SHIFT) UL 78 arch/arm64/include/asm/esr.h #define ESR_ELx_WNR (UL(1) << ESR_ELx_WNR_SHIFT) UL 82 arch/arm64/include/asm/esr.h #define ESR_ELx_IDS (UL(1) << ESR_ELx_IDS_SHIFT) UL 84 arch/arm64/include/asm/esr.h #define ESR_ELx_AET (UL(0x7) << ESR_ELx_AET_SHIFT) UL 86 arch/arm64/include/asm/esr.h #define ESR_ELx_AET_UC (UL(0) << ESR_ELx_AET_SHIFT) UL 87 arch/arm64/include/asm/esr.h #define ESR_ELx_AET_UEU (UL(1) << ESR_ELx_AET_SHIFT) UL 88 arch/arm64/include/asm/esr.h #define ESR_ELx_AET_UEO (UL(2) << ESR_ELx_AET_SHIFT) UL 89 arch/arm64/include/asm/esr.h #define ESR_ELx_AET_UER (UL(3) << ESR_ELx_AET_SHIFT) UL 90 arch/arm64/include/asm/esr.h #define ESR_ELx_AET_CE (UL(6) << ESR_ELx_AET_SHIFT) UL 94 arch/arm64/include/asm/esr.h #define ESR_ELx_SET_MASK (UL(3) << ESR_ELx_SET_SHIFT) UL 96 arch/arm64/include/asm/esr.h #define ESR_ELx_FnV (UL(1) << ESR_ELx_FnV_SHIFT) UL 98 arch/arm64/include/asm/esr.h #define ESR_ELx_EA (UL(1) << ESR_ELx_EA_SHIFT) UL 100 arch/arm64/include/asm/esr.h #define ESR_ELx_S1PTW (UL(1) << ESR_ELx_S1PTW_SHIFT) UL 113 arch/arm64/include/asm/esr.h #define ESR_ELx_ISV (UL(1) << ESR_ELx_ISV_SHIFT) UL 115 arch/arm64/include/asm/esr.h #define ESR_ELx_SAS (UL(3) << ESR_ELx_SAS_SHIFT) UL 117 arch/arm64/include/asm/esr.h #define ESR_ELx_SSE (UL(1) << ESR_ELx_SSE_SHIFT) UL 119 arch/arm64/include/asm/esr.h #define ESR_ELx_SRT_MASK (UL(0x1F) << ESR_ELx_SRT_SHIFT) UL 121 arch/arm64/include/asm/esr.h #define ESR_ELx_SF (UL(1) << ESR_ELx_SF_SHIFT) UL 123 arch/arm64/include/asm/esr.h #define ESR_ELx_AR (UL(1) << ESR_ELx_AR_SHIFT) UL 125 arch/arm64/include/asm/esr.h #define ESR_ELx_CM (UL(1) << ESR_ELx_CM_SHIFT) UL 128 arch/arm64/include/asm/esr.h #define ESR_ELx_CV (UL(1) << 24) UL 130 arch/arm64/include/asm/esr.h #define ESR_ELx_COND_MASK (UL(0xF) << ESR_ELx_COND_SHIFT) UL 131 arch/arm64/include/asm/esr.h #define ESR_ELx_WFx_ISS_TI (UL(1) << 0) UL 132 arch/arm64/include/asm/esr.h #define ESR_ELx_WFx_ISS_WFI (UL(0) << 0) UL 133 arch/arm64/include/asm/esr.h #define ESR_ELx_WFx_ISS_WFE (UL(1) << 0) UL 136 arch/arm64/include/asm/esr.h #define DISR_EL1_IDS (UL(1) << 24) UL 153 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_RES0_MASK (UL(0x7) << ESR_ELx_SYS64_ISS_RES0_SHIFT) UL 159 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_RT_MASK (UL(0x1f) << ESR_ELx_SYS64_ISS_RT_SHIFT) UL 161 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_CRM_MASK (UL(0xf) << ESR_ELx_SYS64_ISS_CRM_SHIFT) UL 163 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_CRN_MASK (UL(0xf) << ESR_ELx_SYS64_ISS_CRN_SHIFT) UL 165 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_OP1_MASK (UL(0x7) << ESR_ELx_SYS64_ISS_OP1_SHIFT) UL 167 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_OP2_MASK (UL(0x7) << ESR_ELx_SYS64_ISS_OP2_SHIFT) UL 169 arch/arm64/include/asm/esr.h #define ESR_ELx_SYS64_ISS_OP0_MASK (UL(0x3) << ESR_ELx_SYS64_ISS_OP0_SHIFT) UL 259 arch/arm64/include/asm/esr.h #define ESR_ELx_FP_EXC_TFV (UL(1) << 23) UL 269 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_RT_MASK (UL(0x1f) << ESR_ELx_CP15_32_ISS_RT_SHIFT) UL 271 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_CRM_MASK (UL(0xf) << ESR_ELx_CP15_32_ISS_CRM_SHIFT) UL 273 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_CRN_MASK (UL(0xf) << ESR_ELx_CP15_32_ISS_CRN_SHIFT) UL 275 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_OP1_MASK (UL(0x7) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) UL 277 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_32_ISS_OP2_MASK (UL(0x7) << ESR_ELx_CP15_32_ISS_OP2_SHIFT) UL 295 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_64_ISS_RT_MASK (UL(0x1f) << ESR_ELx_CP15_64_ISS_RT_SHIFT) UL 298 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_64_ISS_RT2_MASK (UL(0x1f) << ESR_ELx_CP15_64_ISS_RT2_SHIFT) UL 301 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_64_ISS_OP1_MASK (UL(0xf) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) UL 303 arch/arm64/include/asm/esr.h #define ESR_ELx_CP15_64_ISS_CRM_MASK (UL(0xf) << ESR_ELx_CP15_64_ISS_CRM_SHIFT) UL 110 arch/arm64/include/asm/kernel-pgtable.h #define SWAPPER_INIT_MAP_SIZE (_AC(1, UL) << SWAPPER_TABLE_SHIFT) UL 15 arch/arm64/include/asm/kvm_arm.h #define HCR_FWB (UL(1) << 46) UL 16 arch/arm64/include/asm/kvm_arm.h #define HCR_API (UL(1) << 41) UL 17 arch/arm64/include/asm/kvm_arm.h #define HCR_APK (UL(1) << 40) UL 18 arch/arm64/include/asm/kvm_arm.h #define HCR_TEA (UL(1) << 37) UL 19 arch/arm64/include/asm/kvm_arm.h #define HCR_TERR (UL(1) << 36) UL 20 arch/arm64/include/asm/kvm_arm.h #define HCR_TLOR (UL(1) << 35) UL 21 arch/arm64/include/asm/kvm_arm.h #define HCR_E2H (UL(1) << 34) UL 22 arch/arm64/include/asm/kvm_arm.h #define HCR_ID (UL(1) << 33) UL 23 arch/arm64/include/asm/kvm_arm.h #define HCR_CD (UL(1) << 32) UL 25 arch/arm64/include/asm/kvm_arm.h #define HCR_RW (UL(1) << HCR_RW_SHIFT) UL 26 arch/arm64/include/asm/kvm_arm.h #define HCR_TRVM (UL(1) << 30) UL 27 arch/arm64/include/asm/kvm_arm.h #define HCR_HCD (UL(1) << 29) UL 28 arch/arm64/include/asm/kvm_arm.h #define HCR_TDZ (UL(1) << 28) UL 29 arch/arm64/include/asm/kvm_arm.h #define HCR_TGE (UL(1) << 27) UL 30 arch/arm64/include/asm/kvm_arm.h #define HCR_TVM (UL(1) << 26) UL 31 arch/arm64/include/asm/kvm_arm.h #define HCR_TTLB (UL(1) << 25) UL 32 arch/arm64/include/asm/kvm_arm.h #define HCR_TPU (UL(1) << 24) UL 33 arch/arm64/include/asm/kvm_arm.h #define HCR_TPC (UL(1) << 23) UL 34 arch/arm64/include/asm/kvm_arm.h #define HCR_TSW (UL(1) << 22) UL 35 arch/arm64/include/asm/kvm_arm.h #define HCR_TAC (UL(1) << 21) UL 36 arch/arm64/include/asm/kvm_arm.h #define HCR_TIDCP (UL(1) << 20) UL 37 arch/arm64/include/asm/kvm_arm.h #define HCR_TSC (UL(1) << 19) UL 38 arch/arm64/include/asm/kvm_arm.h #define HCR_TID3 (UL(1) << 18) UL 39 arch/arm64/include/asm/kvm_arm.h #define HCR_TID2 (UL(1) << 17) UL 40 arch/arm64/include/asm/kvm_arm.h #define HCR_TID1 (UL(1) << 16) UL 41 arch/arm64/include/asm/kvm_arm.h #define HCR_TID0 (UL(1) << 15) UL 42 arch/arm64/include/asm/kvm_arm.h #define HCR_TWE (UL(1) << 14) UL 43 arch/arm64/include/asm/kvm_arm.h #define HCR_TWI (UL(1) << 13) UL 44 arch/arm64/include/asm/kvm_arm.h #define HCR_DC (UL(1) << 12) UL 46 arch/arm64/include/asm/kvm_arm.h #define HCR_BSU_IS (UL(1) << 10) UL 47 arch/arm64/include/asm/kvm_arm.h #define HCR_FB (UL(1) << 9) UL 48 arch/arm64/include/asm/kvm_arm.h #define HCR_VSE (UL(1) << 8) UL 49 arch/arm64/include/asm/kvm_arm.h #define HCR_VI (UL(1) << 7) UL 50 arch/arm64/include/asm/kvm_arm.h #define HCR_VF (UL(1) << 6) UL 51 arch/arm64/include/asm/kvm_arm.h #define HCR_AMO (UL(1) << 5) UL 52 arch/arm64/include/asm/kvm_arm.h #define HCR_IMO (UL(1) << 4) UL 53 arch/arm64/include/asm/kvm_arm.h #define HCR_FMO (UL(1) << 3) UL 54 arch/arm64/include/asm/kvm_arm.h #define HCR_PTW (UL(1) << 2) UL 55 arch/arm64/include/asm/kvm_arm.h #define HCR_SWIO (UL(1) << 1) UL 56 arch/arm64/include/asm/kvm_arm.h #define HCR_VM (UL(1) << 0) UL 259 arch/arm64/include/asm/kvm_arm.h #define VTTBR_CNP_BIT (UL(1)) UL 260 arch/arm64/include/asm/kvm_arm.h #define VTTBR_VMID_SHIFT (UL(48)) UL 279 arch/arm64/include/asm/kvm_arm.h #define MDCR_EL2_E2PB_MASK (UL(0x3)) UL 280 arch/arm64/include/asm/kvm_arm.h #define MDCR_EL2_E2PB_SHIFT (UL(12)) UL 306 arch/arm64/include/asm/kvm_arm.h #define HPFAR_MASK (~UL(0xf)) UL 13 arch/arm64/include/asm/kvm_asm.h #define VCPU_WORKAROUND_2_FLAG (_AC(1, UL) << VCPU_WORKAROUND_2_FLAG_SHIFT) UL 47 arch/arm64/include/asm/memory.h #define _PAGE_OFFSET(va) (-(UL(1) << (va))) UL 67 arch/arm64/include/asm/memory.h #define _PAGE_END(va) (-(UL(1) << ((va) - 1))) UL 84 arch/arm64/include/asm/memory.h #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL) UL 85 arch/arm64/include/asm/memory.h #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \ UL 109 arch/arm64/include/asm/memory.h #define THREAD_SIZE (UL(1) << THREAD_SHIFT) UL 12 arch/arm64/include/asm/mmu.h #define USER_ASID_FLAG (UL(1) << USER_ASID_BIT) UL 13 arch/arm64/include/asm/mmu.h #define TTBR_ASID_MASK (UL(0xffff) << 48) UL 17 arch/arm64/include/asm/page-def.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 20 arch/arm64/include/asm/page-def.h #define CONT_SIZE (_AC(1, UL) << (CONT_SHIFT + PAGE_SHIFT)) UL 50 arch/arm64/include/asm/pgtable-hwdef.h #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) UL 60 arch/arm64/include/asm/pgtable-hwdef.h #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) UL 70 arch/arm64/include/asm/pgtable-hwdef.h #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) UL 78 arch/arm64/include/asm/pgtable-hwdef.h #define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT) UL 204 arch/arm64/include/asm/pgtable-hwdef.h #define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) UL 206 arch/arm64/include/asm/pgtable-hwdef.h #define TTBR_CNP_BIT (UL(1) << 0) UL 213 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_T0SZ(x) ((UL(64) - (x)) << TCR_T0SZ_OFFSET) UL 214 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_T1SZ(x) ((UL(64) - (x)) << TCR_T1SZ_OFFSET) UL 217 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_T0SZ_MASK (((UL(1) << TCR_TxSZ_WIDTH) - 1) << TCR_T0SZ_OFFSET) UL 220 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_EPD0_MASK (UL(1) << TCR_EPD0_SHIFT) UL 222 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN0_MASK (UL(3) << TCR_IRGN0_SHIFT) UL 223 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN0_NC (UL(0) << TCR_IRGN0_SHIFT) UL 224 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN0_WBWA (UL(1) << TCR_IRGN0_SHIFT) UL 225 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN0_WT (UL(2) << TCR_IRGN0_SHIFT) UL 226 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN0_WBnWA (UL(3) << TCR_IRGN0_SHIFT) UL 229 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_EPD1_MASK (UL(1) << TCR_EPD1_SHIFT) UL 231 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN1_MASK (UL(3) << TCR_IRGN1_SHIFT) UL 232 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN1_NC (UL(0) << TCR_IRGN1_SHIFT) UL 233 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN1_WBWA (UL(1) << TCR_IRGN1_SHIFT) UL 234 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN1_WT (UL(2) << TCR_IRGN1_SHIFT) UL 235 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IRGN1_WBnWA (UL(3) << TCR_IRGN1_SHIFT) UL 245 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN0_MASK (UL(3) << TCR_ORGN0_SHIFT) UL 246 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN0_NC (UL(0) << TCR_ORGN0_SHIFT) UL 247 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN0_WBWA (UL(1) << TCR_ORGN0_SHIFT) UL 248 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN0_WT (UL(2) << TCR_ORGN0_SHIFT) UL 249 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN0_WBnWA (UL(3) << TCR_ORGN0_SHIFT) UL 252 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN1_MASK (UL(3) << TCR_ORGN1_SHIFT) UL 253 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN1_NC (UL(0) << TCR_ORGN1_SHIFT) UL 254 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN1_WBWA (UL(1) << TCR_ORGN1_SHIFT) UL 255 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN1_WT (UL(2) << TCR_ORGN1_SHIFT) UL 256 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ORGN1_WBnWA (UL(3) << TCR_ORGN1_SHIFT) UL 265 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_SH0_MASK (UL(3) << TCR_SH0_SHIFT) UL 266 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_SH0_INNER (UL(3) << TCR_SH0_SHIFT) UL 269 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_SH1_MASK (UL(3) << TCR_SH1_SHIFT) UL 270 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_SH1_INNER (UL(3) << TCR_SH1_SHIFT) UL 274 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG0_MASK (UL(3) << TCR_TG0_SHIFT) UL 275 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG0_4K (UL(0) << TCR_TG0_SHIFT) UL 276 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG0_64K (UL(1) << TCR_TG0_SHIFT) UL 277 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG0_16K (UL(2) << TCR_TG0_SHIFT) UL 280 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG1_MASK (UL(3) << TCR_TG1_SHIFT) UL 281 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG1_16K (UL(1) << TCR_TG1_SHIFT) UL 282 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG1_4K (UL(2) << TCR_TG1_SHIFT) UL 283 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TG1_64K (UL(3) << TCR_TG1_SHIFT) UL 286 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_IPS_MASK (UL(7) << TCR_IPS_SHIFT) UL 287 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_A1 (UL(1) << 22) UL 288 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_ASID16 (UL(1) << 36) UL 289 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TBI0 (UL(1) << 37) UL 290 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_TBI1 (UL(1) << 38) UL 291 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_HA (UL(1) << 39) UL 292 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_HD (UL(1) << 40) UL 293 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_NFD0 (UL(1) << 53) UL 294 arch/arm64/include/asm/pgtable-hwdef.h #define TCR_NFD1 (UL(1) << 54) UL 304 arch/arm64/include/asm/pgtable-hwdef.h #define TTBR_BADDR_MASK_52 (((UL(1) << 46) - 1) << 2) UL 309 arch/arm64/include/asm/pgtable-hwdef.h #define TTBR1_BADDR_4852_OFFSET (((UL(1) << (52 - PGDIR_SHIFT)) - \ UL 310 arch/arm64/include/asm/pgtable-hwdef.h (UL(1) << (48 - PGDIR_SHIFT))) * 8) UL 292 arch/arm64/include/asm/pgtable.h #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) UL 11 arch/arm64/include/asm/processor.h #define KERNEL_DS UL(-1) UL 12 arch/arm64/include/asm/processor.h #define USER_DS ((UL(1) << MAX_USER_VA_BITS) - 1) UL 44 arch/arm64/include/asm/processor.h #define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS_MIN) UL 45 arch/arm64/include/asm/processor.h #define TASK_SIZE_64 (UL(1) << vabits_actual) UL 53 arch/arm64/include/asm/processor.h #define TASK_SIZE_32 UL(0x100000000) UL 55 arch/arm64/include/asm/processor.h #define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE) UL 12 arch/arm64/include/asm/smp.h #define CPU_BOOT_STATUS_MASK ((UL(1) << CPU_STUCK_REASON_SHIFT) - 1) UL 23 arch/arm64/include/asm/smp.h #define CPU_STUCK_REASON_52_BIT_VA (UL(1) << CPU_STUCK_REASON_SHIFT) UL 24 arch/arm64/include/asm/smp.h #define CPU_STUCK_REASON_NO_GRAN (UL(2) << CPU_STUCK_REASON_SHIFT) UL 38 arch/arm64/kernel/reloc_test_core.c { "R_AARCH64_ABS64", absolute_data64, UL(SYM64_ABS_VAL) }, UL 39 arch/arm64/kernel/reloc_test_core.c { "R_AARCH64_ABS32", absolute_data32, UL(SYM32_ABS_VAL) }, UL 40 arch/arm64/kernel/reloc_test_core.c { "R_AARCH64_ABS16", absolute_data16, UL(SYM16_ABS_VAL) }, UL 41 arch/arm64/kernel/reloc_test_core.c { "R_AARCH64_MOVW_SABS_Gn", signed_movw, UL(SYM64_ABS_VAL) }, UL 42 arch/arm64/kernel/reloc_test_core.c { "R_AARCH64_MOVW_UABS_Gn", unsigned_movw, UL(SYM64_ABS_VAL) }, UL 14 arch/csky/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 19 arch/hexagon/include/asm/mem-layout.h #define PAGE_OFFSET _AC(0xc0000000, UL) UL 28 arch/ia64/include/uapi/asm/types.h # define __IA64_UL_CONST(x) x##UL UL 15 arch/m68k/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 14 arch/microblaze/include/asm/asm-compat.h # define __ASM_CONST(x) x##UL UL 17 arch/mips/include/asm/mach-ar7/spaces.h #define PAGE_OFFSET _AC(0x94000000, UL) UL 18 arch/mips/include/asm/mach-ar7/spaces.h #define PHYS_OFFSET _AC(0x14000000, UL) UL 15 arch/mips/include/asm/mach-cavium-octeon/spaces.h #define CAC_BASE _AC(0x8000000000000000, UL) UL 16 arch/mips/include/asm/mach-cavium-octeon/spaces.h #define UNCAC_BASE _AC(0x8000000000000000, UL) UL 17 arch/mips/include/asm/mach-cavium-octeon/spaces.h #define IO_BASE _AC(0x8000000000000000, UL) UL 24 arch/mips/include/asm/mach-generic/spaces.h # define PHYS_OFFSET _AC(0, UL) UL 30 arch/mips/include/asm/mach-generic/spaces.h #define CAC_BASE _AC(0x40000000, UL) UL 32 arch/mips/include/asm/mach-generic/spaces.h #define CAC_BASE _AC(0x80000000, UL) UL 35 arch/mips/include/asm/mach-generic/spaces.h #define IO_BASE _AC(0xa0000000, UL) UL 38 arch/mips/include/asm/mach-generic/spaces.h #define UNCAC_BASE _AC(0xa0000000, UL) UL 43 arch/mips/include/asm/mach-generic/spaces.h #define MAP_BASE _AC(0x60000000, UL) UL 45 arch/mips/include/asm/mach-generic/spaces.h #define MAP_BASE _AC(0xc0000000, UL) UL 53 arch/mips/include/asm/mach-generic/spaces.h #define HIGHMEM_START _AC(0x20000000, UL) UL 65 arch/mips/include/asm/mach-generic/spaces.h #define IO_BASE _AC(0x9000000000000000, UL) UL 69 arch/mips/include/asm/mach-generic/spaces.h #define UNCAC_BASE _AC(0x9000000000000000, UL) UL 73 arch/mips/include/asm/mach-generic/spaces.h #define MAP_BASE _AC(0xc000000000000000, UL) UL 82 arch/mips/include/asm/mach-generic/spaces.h #define HIGHMEM_START (_AC(1, UL) << _AC(59, UL)) UL 14 arch/mips/include/asm/mach-ip28/spaces.h #define PHYS_OFFSET _AC(0x20000000, UL) UL 6 arch/mips/include/asm/mach-loongson64/spaces.h #define CAC_BASE _AC(0x9800000000000000, UL) UL 36 arch/mips/include/asm/mach-malta/spaces.h #define PAGE_OFFSET _AC(0x0, UL) UL 37 arch/mips/include/asm/mach-malta/spaces.h #define PHYS_OFFSET _AC(0x80000000, UL) UL 38 arch/mips/include/asm/mach-malta/spaces.h #define HIGHMEM_START _AC(0xffff0000, UL) UL 10 arch/mips/include/asm/mach-pic32/spaces.h #define PHYS_OFFSET _AC(0x08000000, UL) UL 35 arch/mips/include/asm/page.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 63 arch/mips/include/asm/page.h #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) UL 16 arch/nds32/include/asm/page.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 25 arch/nios2/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 16 arch/parisc/include/asm/page.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 11 arch/powerpc/boot/page.h #define __ASM_CONST(x) x##UL UL 11 arch/powerpc/include/asm/asm-const.h # define __ASM_CONST(x) x##UL UL 7 arch/powerpc/include/asm/book3s/64/kup-radix.h #define AMR_KUAP_BLOCK_READ UL(0x4000000000000000) UL 8 arch/powerpc/include/asm/book3s/64/kup-radix.h #define AMR_KUAP_BLOCK_WRITE UL(0x8000000000000000) UL 13 arch/riscv/include/asm/csr.h #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */ UL 14 arch/riscv/include/asm/csr.h #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */ UL 15 arch/riscv/include/asm/csr.h #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */ UL 16 arch/riscv/include/asm/csr.h #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */ UL 18 arch/riscv/include/asm/csr.h #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */ UL 19 arch/riscv/include/asm/csr.h #define SR_FS_OFF _AC(0x00000000, UL) UL 20 arch/riscv/include/asm/csr.h #define SR_FS_INITIAL _AC(0x00002000, UL) UL 21 arch/riscv/include/asm/csr.h #define SR_FS_CLEAN _AC(0x00004000, UL) UL 22 arch/riscv/include/asm/csr.h #define SR_FS_DIRTY _AC(0x00006000, UL) UL 24 arch/riscv/include/asm/csr.h #define SR_XS _AC(0x00018000, UL) /* Extension Status */ UL 25 arch/riscv/include/asm/csr.h #define SR_XS_OFF _AC(0x00000000, UL) UL 26 arch/riscv/include/asm/csr.h #define SR_XS_INITIAL _AC(0x00008000, UL) UL 27 arch/riscv/include/asm/csr.h #define SR_XS_CLEAN _AC(0x00010000, UL) UL 28 arch/riscv/include/asm/csr.h #define SR_XS_DIRTY _AC(0x00018000, UL) UL 31 arch/riscv/include/asm/csr.h #define SR_SD _AC(0x80000000, UL) /* FS/XS dirty */ UL 33 arch/riscv/include/asm/csr.h #define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */ UL 38 arch/riscv/include/asm/csr.h #define SATP_PPN _AC(0x003FFFFF, UL) UL 39 arch/riscv/include/asm/csr.h #define SATP_MODE_32 _AC(0x80000000, UL) UL 42 arch/riscv/include/asm/csr.h #define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL) UL 43 arch/riscv/include/asm/csr.h #define SATP_MODE_39 _AC(0x8000000000000000, UL) UL 48 arch/riscv/include/asm/csr.h #define SCAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) UL 71 arch/riscv/include/asm/csr.h #define SIE_SSIE (_AC(0x1, UL) << IRQ_S_SOFT) UL 72 arch/riscv/include/asm/csr.h #define SIE_STIE (_AC(0x1, UL) << IRQ_S_TIMER) UL 73 arch/riscv/include/asm/csr.h #define SIE_SEIE (_AC(0x1, UL) << IRQ_S_EXT) UL 16 arch/riscv/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 25 arch/riscv/include/asm/page.h #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) UL 34 arch/riscv/include/asm/page.h #define PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) UL 14 arch/riscv/include/asm/pgtable-32.h #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) UL 13 arch/riscv/include/asm/pgtable-64.h #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) UL 18 arch/riscv/include/asm/pgtable-64.h #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) UL 12 arch/s390/include/asm/kasan.h (_AC(1, UL) << (_REGION1_SHIFT - KASAN_SHADOW_SCALE_SHIFT)) UL 15 arch/s390/include/asm/kasan.h (_AC(1, UL) << (_REGION2_SHIFT - KASAN_SHADOW_SCALE_SHIFT)) UL 17 arch/s390/include/asm/kasan.h #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL) UL 15 arch/s390/include/asm/page.h #define _PAGE_SIZE (_AC(1, UL) << _PAGE_SHIFT) UL 44 arch/s390/include/asm/setup.h #define LPP_PID_MASK _AC(0xffffffff, UL) UL 24 arch/sh/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 31 arch/sh/kernel/head_64.S #if (CONFIG_PAGE_OFFSET & ((1UL<<29)-1)) UL 8 arch/sparc/include/asm/dcu.h #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */ UL 9 arch/sparc/include/asm/dcu.h #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */ UL 10 arch/sparc/include/asm/dcu.h #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */ UL 11 arch/sparc/include/asm/dcu.h #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */ UL 12 arch/sparc/include/asm/dcu.h #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */ UL 13 arch/sparc/include/asm/dcu.h #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */ UL 14 arch/sparc/include/asm/dcu.h #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */ UL 15 arch/sparc/include/asm/dcu.h #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/ UL 16 arch/sparc/include/asm/dcu.h #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */ UL 17 arch/sparc/include/asm/dcu.h #define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */ UL 18 arch/sparc/include/asm/dcu.h #define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */ UL 19 arch/sparc/include/asm/dcu.h #define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */ UL 20 arch/sparc/include/asm/dcu.h #define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/ UL 21 arch/sparc/include/asm/dcu.h #define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */ UL 22 arch/sparc/include/asm/dcu.h #define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/ UL 23 arch/sparc/include/asm/dcu.h #define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */ UL 24 arch/sparc/include/asm/dcu.h #define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */ UL 25 arch/sparc/include/asm/dcu.h #define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */ UL 26 arch/sparc/include/asm/dcu.h #define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */ UL 8 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/ UL 9 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/ UL 10 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/ UL 11 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/ UL 12 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/ UL 13 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/ UL 14 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */ UL 15 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */ UL 16 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */ UL 17 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */ UL 18 arch/sparc/include/asm/lsu.h #define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/ UL 11 arch/sparc/include/asm/mmu_64.h #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) UL 22 arch/sparc/include/asm/mmu_64.h #define CTX_PGSZ_8KB _AC(0x0,UL) UL 23 arch/sparc/include/asm/mmu_64.h #define CTX_PGSZ_64KB _AC(0x1,UL) UL 24 arch/sparc/include/asm/mmu_64.h #define CTX_PGSZ_512KB _AC(0x2,UL) UL 25 arch/sparc/include/asm/mmu_64.h #define CTX_PGSZ_4MB _AC(0x3,UL) UL 26 arch/sparc/include/asm/mmu_64.h #define CTX_PGSZ_BITS _AC(0x7,UL) UL 15 arch/sparc/include/asm/page_32.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 9 arch/sparc/include/asm/page_64.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 25 arch/sparc/include/asm/page_64.h #define REAL_HPAGE_SIZE (_AC(1,UL) << REAL_HPAGE_SHIFT) UL 28 arch/sparc/include/asm/page_64.h #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) UL 32 arch/sparc/include/asm/page_64.h #define REAL_HPAGE_PER_HPAGE (_AC(1,UL) << (HPAGE_SHIFT - REAL_HPAGE_SHIFT)) UL 127 arch/sparc/include/asm/page_64.h _AC(0x0000000070000000,UL) : \ UL 442 arch/sparc/include/asm/pgtable_32.h #define VMALLOC_START _AC(0xfe600000,UL) UL 443 arch/sparc/include/asm/pgtable_32.h #define VMALLOC_END _AC(0xffc00000,UL) UL 37 arch/sparc/include/asm/pgtable_64.h #define TLBTEMP_BASE _AC(0x0000000006000000,UL) UL 38 arch/sparc/include/asm/pgtable_64.h #define TSBMAP_8K_BASE _AC(0x0000000008000000,UL) UL 39 arch/sparc/include/asm/pgtable_64.h #define TSBMAP_4M_BASE _AC(0x0000000008400000,UL) UL 40 arch/sparc/include/asm/pgtable_64.h #define MODULES_VADDR _AC(0x0000000010000000,UL) UL 41 arch/sparc/include/asm/pgtable_64.h #define MODULES_LEN _AC(0x00000000e0000000,UL) UL 42 arch/sparc/include/asm/pgtable_64.h #define MODULES_END _AC(0x00000000f0000000,UL) UL 43 arch/sparc/include/asm/pgtable_64.h #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) UL 44 arch/sparc/include/asm/pgtable_64.h #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) UL 45 arch/sparc/include/asm/pgtable_64.h #define VMALLOC_START _AC(0x0000000100000000,UL) UL 52 arch/sparc/include/asm/pgtable_64.h #define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) UL 60 arch/sparc/include/asm/pgtable_64.h #define PUD_SIZE (_AC(1,UL) << PUD_SHIFT) UL 66 arch/sparc/include/asm/pgtable_64.h #define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) UL 114 arch/sparc/include/asm/pgtable_64.h #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ UL 115 arch/sparc/include/asm/pgtable_64.h #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ UL 116 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SPECIAL _AC(0x0200000000000000,UL) /* Special page */ UL 117 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PMD_HUGE _AC(0x0100000000000000,UL) /* Huge page */ UL 121 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ UL 122 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */ UL 123 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */ UL 124 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */ UL 125 arch/sparc/include/asm/pgtable_64.h #define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ UL 126 arch/sparc/include/asm/pgtable_64.h #define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ UL 127 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ UL 128 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SPECIAL_4U _AC(0x0200000000000000,UL) /* Special page */ UL 129 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PMD_HUGE_4U _AC(0x0100000000000000,UL) /* Huge page */ UL 130 arch/sparc/include/asm/pgtable_64.h #define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ UL 131 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ UL 132 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ UL 133 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */ UL 134 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ UL 135 arch/sparc/include/asm/pgtable_64.h #define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */ UL 136 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */ UL 137 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */ UL 138 arch/sparc/include/asm/pgtable_64.h #define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */ UL 139 arch/sparc/include/asm/pgtable_64.h #define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */ UL 140 arch/sparc/include/asm/pgtable_64.h #define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ UL 141 arch/sparc/include/asm/pgtable_64.h #define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */ UL 142 arch/sparc/include/asm/pgtable_64.h #define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */ UL 143 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */ UL 144 arch/sparc/include/asm/pgtable_64.h #define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */ UL 145 arch/sparc/include/asm/pgtable_64.h #define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ UL 146 arch/sparc/include/asm/pgtable_64.h #define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ UL 147 arch/sparc/include/asm/pgtable_64.h #define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */ UL 148 arch/sparc/include/asm/pgtable_64.h #define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */ UL 149 arch/sparc/include/asm/pgtable_64.h #define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */ UL 152 arch/sparc/include/asm/pgtable_64.h #define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */ UL 153 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */ UL 154 arch/sparc/include/asm/pgtable_64.h #define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */ UL 155 arch/sparc/include/asm/pgtable_64.h #define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ UL 156 arch/sparc/include/asm/pgtable_64.h #define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ UL 157 arch/sparc/include/asm/pgtable_64.h #define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ UL 158 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SPECIAL_4V _AC(0x0200000000000000,UL) /* Special page */ UL 159 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PMD_HUGE_4V _AC(0x0100000000000000,UL) /* Huge page */ UL 160 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ UL 161 arch/sparc/include/asm/pgtable_64.h #define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ UL 162 arch/sparc/include/asm/pgtable_64.h #define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ UL 163 arch/sparc/include/asm/pgtable_64.h #define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */ UL 164 arch/sparc/include/asm/pgtable_64.h #define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */ UL 166 arch/sparc/include/asm/pgtable_64.h #define _PAGE_MCD_4V _AC(0x0000000000000200,UL) /* Memory Corruption */ UL 167 arch/sparc/include/asm/pgtable_64.h #define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */ UL 168 arch/sparc/include/asm/pgtable_64.h #define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */ UL 169 arch/sparc/include/asm/pgtable_64.h #define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */ UL 170 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */ UL 171 arch/sparc/include/asm/pgtable_64.h #define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */ UL 172 arch/sparc/include/asm/pgtable_64.h #define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */ UL 173 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */ UL 174 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */ UL 175 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */ UL 176 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */ UL 177 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */ UL 178 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */ UL 179 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */ UL 180 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */ UL 181 arch/sparc/include/asm/pgtable_64.h #define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */ UL 9 arch/sparc/include/asm/sfafsr.h #define SFAFSR_ME (_AC(1,UL) << SFAFSR_ME_SHIFT) UL 11 arch/sparc/include/asm/sfafsr.h #define SFAFSR_PRIV (_AC(1,UL) << SFAFSR_PRIV_SHIFT) UL 13 arch/sparc/include/asm/sfafsr.h #define SFAFSR_ISAP (_AC(1,UL) << SFAFSR_ISAP_SHIFT) UL 15 arch/sparc/include/asm/sfafsr.h #define SFAFSR_ETP (_AC(1,UL) << SFAFSR_ETP_SHIFT) UL 17 arch/sparc/include/asm/sfafsr.h #define SFAFSR_IVUE (_AC(1,UL) << SFAFSR_IVUE_SHIFT) UL 19 arch/sparc/include/asm/sfafsr.h #define SFAFSR_TO (_AC(1,UL) << SFAFSR_TO_SHIFT) UL 21 arch/sparc/include/asm/sfafsr.h #define SFAFSR_BERR (_AC(1,UL) << SFAFSR_BERR_SHIFT) UL 23 arch/sparc/include/asm/sfafsr.h #define SFAFSR_LDP (_AC(1,UL) << SFAFSR_LDP_SHIFT) UL 25 arch/sparc/include/asm/sfafsr.h #define SFAFSR_CP (_AC(1,UL) << SFAFSR_CP_SHIFT) UL 27 arch/sparc/include/asm/sfafsr.h #define SFAFSR_WP (_AC(1,UL) << SFAFSR_WP_SHIFT) UL 29 arch/sparc/include/asm/sfafsr.h #define SFAFSR_EDP (_AC(1,UL) << SFAFSR_EDP_SHIFT) UL 31 arch/sparc/include/asm/sfafsr.h #define SFAFSR_UE (_AC(1,UL) << SFAFSR_UE_SHIFT) UL 33 arch/sparc/include/asm/sfafsr.h #define SFAFSR_CE (_AC(1,UL) << SFAFSR_CE_SHIFT) UL 35 arch/sparc/include/asm/sfafsr.h #define SFAFSR_ETS (_AC(0xf,UL) << SFAFSR_ETS_SHIFT) UL 37 arch/sparc/include/asm/sfafsr.h #define SFAFSR_PSYND (_AC(0xffff,UL) << SFAFSR_PSYND_SHIFT) UL 44 arch/sparc/include/asm/sfafsr.h #define UDBE_UE (_AC(1,UL) << 9) UL 45 arch/sparc/include/asm/sfafsr.h #define UDBE_CE (_AC(1,UL) << 8) UL 46 arch/sparc/include/asm/sfafsr.h #define UDBE_E_SYNDR (_AC(0xff,UL) << 0) UL 59 arch/sparc/include/asm/sfafsr.h #define SFSTAT_UDBH_MASK (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT) UL 61 arch/sparc/include/asm/sfafsr.h #define SFSTAT_UDBL_MASK (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT) UL 63 arch/sparc/include/asm/sfafsr.h #define SFSTAT_TL_GT_ONE (_AC(1,UL) << SFSTAT_TL_GT_ONE_SHIFT) UL 65 arch/sparc/include/asm/sfafsr.h #define SFSTAT_TRAP_TYPE (_AC(0x1FF,UL) << SFSTAT_TRAP_TYPE_SHIFT) UL 67 arch/sparc/include/asm/sfafsr.h #define SFSTAT_AFSR_MASK (_AC(0x1ffffffff,UL) << SFSTAT_AFSR_SHIFT) UL 18 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */ UL 19 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_MCDE _AC(0x0000000000000800,UL) /* MCD Enable */ UL 20 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */ UL 21 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/ UL 22 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */ UL 23 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */ UL 24 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */ UL 25 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */ UL 26 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/ UL 27 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_RED _AC(0x0000000000000020,UL) /* Reset Error Debug. */ UL 28 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_PEF _AC(0x0000000000000010,UL) /* Floating Point Enable.*/ UL 29 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_AM _AC(0x0000000000000008,UL) /* Address Mask. */ UL 30 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege. */ UL 31 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_IE _AC(0x0000000000000002,UL) /* Interrupt Enable. */ UL 32 arch/sparc/include/uapi/asm/pstate.h #define PSTATE_AG _AC(0x0000000000000001,UL) /* Alternate Globals. */ UL 41 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_GL _AC(0x0000070000000000,UL) /* Global reg level */ UL 42 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_CCR _AC(0x000000ff00000000,UL) /* Condition Codes. */ UL 43 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_XCC _AC(0x000000f000000000,UL) /* Condition Codes. */ UL 44 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_XNEG _AC(0x0000008000000000,UL) /* %xcc Negative. */ UL 45 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_XZERO _AC(0x0000004000000000,UL) /* %xcc Zero. */ UL 46 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_XOVFL _AC(0x0000002000000000,UL) /* %xcc Overflow. */ UL 47 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_XCARRY _AC(0x0000001000000000,UL) /* %xcc Carry. */ UL 48 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_ICC _AC(0x0000000f00000000,UL) /* Condition Codes. */ UL 49 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_INEG _AC(0x0000000800000000,UL) /* %icc Negative. */ UL 50 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_IZERO _AC(0x0000000400000000,UL) /* %icc Zero. */ UL 51 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_IOVFL _AC(0x0000000200000000,UL) /* %icc Overflow. */ UL 52 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_ICARRY _AC(0x0000000100000000,UL) /* %icc Carry. */ UL 53 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_ASI _AC(0x00000000ff000000,UL) /* AddrSpace ID. */ UL 54 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_PIL _AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/ UL 55 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_PSTATE _AC(0x00000000000fff00,UL) /* PSTATE. */ UL 60 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_IG _AC(0x0000000000080000,UL) /* Interrupt Globals.*/ UL 61 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_MCDE _AC(0x0000000000080000,UL) /* MCD enable. */ UL 62 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_MG _AC(0x0000000000040000,UL) /* MMU Globals. */ UL 63 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_CLE _AC(0x0000000000020000,UL) /* CurrLittleEndian. */ UL 64 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_TLE _AC(0x0000000000010000,UL) /* TrapLittleEndian. */ UL 65 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_MM _AC(0x000000000000c000,UL) /* Memory Model. */ UL 66 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TSO */ UL 67 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_PSO _AC(0x0000000000004000,UL) /* MM: PSO */ UL 68 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_RMO _AC(0x0000000000008000,UL) /* MM: RMO */ UL 69 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_RED _AC(0x0000000000002000,UL) /* Reset Error Debug.*/ UL 70 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_PEF _AC(0x0000000000001000,UL) /* FPU Enable. */ UL 71 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_AM _AC(0x0000000000000800,UL) /* Address Mask. */ UL 72 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_PRIV _AC(0x0000000000000400,UL) /* Privilege. */ UL 73 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_IE _AC(0x0000000000000200,UL) /* Interrupt Enable. */ UL 74 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_AG _AC(0x0000000000000100,UL) /* Alternate Globals.*/ UL 75 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_SYSCALL _AC(0x0000000000000020,UL) /* in syscall trap */ UL 76 arch/sparc/include/uapi/asm/pstate.h #define TSTATE_CWP _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */ UL 85 arch/sparc/include/uapi/asm/pstate.h #define FPRS_FEF _AC(0x0000000000000004,UL) /* FPU Enable. */ UL 86 arch/sparc/include/uapi/asm/pstate.h #define FPRS_DU _AC(0x0000000000000002,UL) /* Dirty Upper. */ UL 87 arch/sparc/include/uapi/asm/pstate.h #define FPRS_DL _AC(0x0000000000000001,UL) /* Dirty Lower. */ UL 96 arch/sparc/include/uapi/asm/pstate.h #define VERS_MANUF _AC(0xffff000000000000,UL) /* Manufacturer. */ UL 97 arch/sparc/include/uapi/asm/pstate.h #define VERS_IMPL _AC(0x0000ffff00000000,UL) /* Implementation. */ UL 98 arch/sparc/include/uapi/asm/pstate.h #define VERS_MASK _AC(0x00000000ff000000,UL) /* Mask Set Revision.*/ UL 99 arch/sparc/include/uapi/asm/pstate.h #define VERS_MAXTL _AC(0x000000000000ff00,UL) /* Max Trap Level. */ UL 100 arch/sparc/include/uapi/asm/pstate.h #define VERS_MAXWIN _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/ UL 103 arch/sparc/include/uapi/asm/pstate.h #define CFR_AES _AC(0x0000000000000001,UL) /* Supports AES opcodes */ UL 104 arch/sparc/include/uapi/asm/pstate.h #define CFR_DES _AC(0x0000000000000002,UL) /* Supports DES opcodes */ UL 105 arch/sparc/include/uapi/asm/pstate.h #define CFR_KASUMI _AC(0x0000000000000004,UL) /* Supports KASUMI opcodes */ UL 106 arch/sparc/include/uapi/asm/pstate.h #define CFR_CAMELLIA _AC(0x0000000000000008,UL) /* Supports CAMELLIA opcodes*/ UL 107 arch/sparc/include/uapi/asm/pstate.h #define CFR_MD5 _AC(0x0000000000000010,UL) /* Supports MD5 opcodes */ UL 108 arch/sparc/include/uapi/asm/pstate.h #define CFR_SHA1 _AC(0x0000000000000020,UL) /* Supports SHA1 opcodes */ UL 109 arch/sparc/include/uapi/asm/pstate.h #define CFR_SHA256 _AC(0x0000000000000040,UL) /* Supports SHA256 opcodes */ UL 110 arch/sparc/include/uapi/asm/pstate.h #define CFR_SHA512 _AC(0x0000000000000080,UL) /* Supports SHA512 opcodes */ UL 111 arch/sparc/include/uapi/asm/pstate.h #define CFR_MPMUL _AC(0x0000000000000100,UL) /* Supports MPMUL opcodes */ UL 112 arch/sparc/include/uapi/asm/pstate.h #define CFR_MONTMUL _AC(0x0000000000000200,UL) /* Supports MONTMUL opcodes */ UL 113 arch/sparc/include/uapi/asm/pstate.h #define CFR_MONTSQR _AC(0x0000000000000400,UL) /* Supports MONTSQR opcodes */ UL 114 arch/sparc/include/uapi/asm/pstate.h #define CFR_CRC32C _AC(0x0000000000000800,UL) /* Supports CRC32C opcodes */ UL 14 arch/um/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 24 arch/unicore32/include/asm/memory.h #define PAGE_OFFSET UL(0xC0000000) UL 25 arch/unicore32/include/asm/memory.h #define TASK_SIZE (PAGE_OFFSET - UL(0x41000000)) UL 14 arch/unicore32/include/asm/page.h #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) UL 15 arch/unicore32/include/mach/memory.h #define PHYS_OFFSET UL(0x00000000) UL 17 arch/unicore32/include/mach/memory.h #define VECTORS_BASE UL(0xffff0000) UL 19 arch/unicore32/include/mach/memory.h #define KUSER_BASE UL(0x80000000) UL 49 arch/unicore32/include/mach/memory.h #define KUSER_VECPAGE_BASE (KUSER_BASE + UL(0x3fff0000)) UL 20 arch/x86/include/asm/boot.h #define MIN_KERNEL_ALIGN (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2) UL 6 arch/x86/include/asm/kasan.h #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL) UL 17 arch/x86/include/asm/page_32_types.h #define __PAGE_OFFSET_BASE _AC(CONFIG_PAGE_OFFSET, UL) UL 40 arch/x86/include/asm/page_64_types.h #define __PAGE_OFFSET_BASE_L5 _AC(0xff11000000000000, UL) UL 41 arch/x86/include/asm/page_64_types.h #define __PAGE_OFFSET_BASE_L4 _AC(0xffff888000000000, UL) UL 49 arch/x86/include/asm/page_64_types.h #define __START_KERNEL_map _AC(0xffffffff80000000, UL) UL 11 arch/x86/include/asm/page_types.h #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) UL 14 arch/x86/include/asm/page_types.h #define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT) UL 17 arch/x86/include/asm/page_types.h #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT) UL 30 arch/x86/include/asm/page_types.h #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) UL 64 arch/x86/include/asm/pgtable_64_types.h #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT) UL 98 arch/x86/include/asm/pgtable_64_types.h #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) UL 100 arch/x86/include/asm/pgtable_64_types.h #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) UL 102 arch/x86/include/asm/pgtable_64_types.h #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) UL 146 arch/x86/include/asm/pgtable_64_types.h #define MODULES_END _AC(0xffffffffff000000, UL) UL 149 arch/x86/include/asm/pgtable_64_types.h #define ESPFIX_PGD_ENTRY _AC(-2, UL) UL 152 arch/x86/include/asm/pgtable_64_types.h #define CPU_ENTRY_AREA_PGD _AC(-4, UL) UL 155 arch/x86/include/asm/pgtable_64_types.h #define EFI_VA_START ( -4 * (_AC(1, UL) << 30)) UL 156 arch/x86/include/asm/pgtable_64_types.h #define EFI_VA_END (-68 * (_AC(1, UL) << 30)) UL 32 arch/x86/include/uapi/asm/processor-flags.h #define X86_EFLAGS_IOPL (_AC(3,UL) << X86_EFLAGS_IOPL_BIT) UL 83 arch/x86/include/uapi/asm/processor-flags.h #define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL)) UL 137 arch/x86/include/uapi/asm/processor-flags.h #define X86_CR8_TPR _AC(0x0000000f,UL) /* task priority register */ UL 62 arch/x86/kernel/kprobes/core.c (((b0##UL << 0x0)|(b1##UL << 0x1)|(b2##UL << 0x2)|(b3##UL << 0x3) | \ UL 63 arch/x86/kernel/kprobes/core.c (b4##UL << 0x4)|(b5##UL << 0x5)|(b6##UL << 0x6)|(b7##UL << 0x7) | \ UL 64 arch/x86/kernel/kprobes/core.c (b8##UL << 0x8)|(b9##UL << 0x9)|(ba##UL << 0xa)|(bb##UL << 0xb) | \ UL 65 arch/x86/kernel/kprobes/core.c (bc##UL << 0xc)|(bd##UL << 0xd)|(be##UL << 0xe)|(bf##UL << 0xf)) \ UL 47 arch/x86/kernel/uprobes.c (((b0##UL << 0x0)|(b1##UL << 0x1)|(b2##UL << 0x2)|(b3##UL << 0x3) | \ UL 48 arch/x86/kernel/uprobes.c (b4##UL << 0x4)|(b5##UL << 0x5)|(b6##UL << 0x6)|(b7##UL << 0x7) | \ UL 49 arch/x86/kernel/uprobes.c (b8##UL << 0x8)|(b9##UL << 0x9)|(ba##UL << 0xa)|(bb##UL << 0xb) | \ UL 50 arch/x86/kernel/uprobes.c (bc##UL << 0xc)|(bd##UL << 0xd)|(be##UL << 0xe)|(bf##UL << 0xf)) \ UL 33 arch/xtensa/include/asm/page.h #define PAGE_OFFSET _AC(CONFIG_DEFAULT_MEM_START, UL) UL 34 arch/xtensa/include/asm/page.h #define PHYS_OFFSET _AC(CONFIG_DEFAULT_MEM_START, UL) UL 22 arch/xtensa/include/uapi/asm/types.h # define ___XTENSA_UL_CONST(x) x##UL UL 51 drivers/infiniband/sw/siw/siw_mem.h #define PAGES_PER_CHUNK (_AC(1, UL) << CHUNK_SHIFT) UL 13 drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h #define PAGE_SIZE_2MB (_AC(1, UL) << PAGE_SHIFT_2MB) UL 14 drivers/misc/habanalabs/include/hw_ip/mmu/mmu_general.h #define PAGE_SIZE_4KB (_AC(1, UL) << PAGE_SHIFT_4KB) UL 25 drivers/misc/lkdtm/bugs.c #define REC_STACK_SIZE (_AC(CONFIG_FRAME_WARN, UL) / 2) UL 71 drivers/net/ethernet/amazon/ena/ena_netdev.h #define ENA_PAGE_SIZE (_AC(SZ_16K, UL)) UL 8 include/linux/bits.h #define BIT(nr) (UL(1) << (nr)) UL 10 include/linux/bits.h #define BIT_MASK(nr) (UL(1) << ((nr) % BITS_PER_LONG)) UL 22 include/linux/bits.h (((~UL(0)) - (UL(1) << (l)) + 1) & \ UL 23 include/linux/bits.h (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) UL 13 include/linux/poison.h # define POISON_POINTER_DELTA _AC(CONFIG_ILLEGAL_POINTER_VALUE, UL) UL 25 include/uapi/linux/const.h #define _UL(x) (_AC(x, UL)) UL 749 include/xen/interface/xen.h #define __mk_unsigned_long(x) x ## UL UL 9 include/xen/page.h #define XEN_PAGE_SIZE (_AC(1, UL) << XEN_PAGE_SHIFT) UL 76 mm/zsmalloc.c #define ZS_MAX_PAGES_PER_ZSPAGE (_AC(1, UL) << ZS_MAX_ZSPAGE_ORDER) UL 122 mm/zsmalloc.c #define OBJ_INDEX_MASK ((_AC(1, UL) << OBJ_INDEX_BITS) - 1) UL 8 tools/include/linux/bits.h #define BIT(nr) (UL(1) << (nr)) UL 10 tools/include/linux/bits.h #define BIT_MASK(nr) (UL(1) << ((nr) % BITS_PER_LONG)) UL 22 tools/include/linux/bits.h (((~UL(0)) - (UL(1) << (l)) + 1) & \ UL 23 tools/include/linux/bits.h (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) UL 13 tools/include/linux/poison.h # define POISON_POINTER_DELTA _AC(CONFIG_ILLEGAL_POINTER_VALUE, UL) UL 25 tools/include/uapi/linux/const.h #define _UL(x) (_AC(x, UL)) UL 11 tools/testing/selftests/powerpc/primitives/asm/asm-const.h # define __ASM_CONST(x) x##UL