UINT64_CAST 46 arch/mips/include/asm/sn/addrs.h #define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK) UINT64_CAST 49 arch/mips/include/asm/sn/addrs.h ((UINT64_CAST(_pa) & ~NASID_MASK) | \ UINT64_CAST 50 arch/mips/include/asm/sn/addrs.h (UINT64_CAST(_nasid) << NASID_SHFT)) UINT64_CAST 58 arch/mips/include/asm/sn/addrs.h #define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS) UINT64_CAST 74 arch/mips/include/asm/sn/addrs.h (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) UINT64_CAST 85 arch/mips/include/asm/sn/addrs.h #define SWIN_SIZE (UINT64_CAST 1 << 24) UINT64_CAST 191 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) & NASID_MASK | \ UINT64_CAST 192 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \ UINT64_CAST 193 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 3 & 0x1f << 4) UINT64_CAST 198 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) & NASID_MASK | \ UINT64_CAST 199 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \ UINT64_CAST 200 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 3 & 0x1f << 4) UINT64_CAST 204 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) & NASID_MASK | \ UINT64_CAST 205 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \ UINT64_CAST 213 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) & NASID_MASK | \ UINT64_CAST 214 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 2 & BDECC_UPPER_MASK | \ UINT64_CAST 215 arch/mips/include/asm/sn/addrs.h UINT64_CAST(_pa) >> 3 & 3) UINT64_CAST 221 arch/mips/include/asm/sn/addrs.h #define BDADDR_IS_DIR(_ba) ((UINT64_CAST (_ba) & 0x200) != 0) UINT64_CAST 222 arch/mips/include/asm/sn/addrs.h #define BDADDR_IS_PRT(_ba) ((UINT64_CAST (_ba) & 0x200) == 0) UINT64_CAST 224 arch/mips/include/asm/sn/addrs.h #define BDDIR_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \ UINT64_CAST 225 arch/mips/include/asm/sn/addrs.h (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2 | \ UINT64_CAST 226 arch/mips/include/asm/sn/addrs.h (UINT64_CAST(_ba) & 0x1f << 4) << 3) UINT64_CAST 228 arch/mips/include/asm/sn/addrs.h #define BDPRT_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \ UINT64_CAST 229 arch/mips/include/asm/sn/addrs.h (UINT64_CAST(_ba) & BDDIR_UPPER_MASK)<<2) UINT64_CAST 231 arch/mips/include/asm/sn/addrs.h #define BDECC_TO_MEM(_ba) (UINT64_CAST (_ba) & NASID_MASK | \ UINT64_CAST 232 arch/mips/include/asm/sn/addrs.h (UINT64_CAST(_ba) & BDECC_UPPER_MASK)<<2 | \ UINT64_CAST 233 arch/mips/include/asm/sn/addrs.h (UINT64_CAST(_ba) & 3) << 3) UINT64_CAST 62 arch/mips/include/asm/sn/sn0/addrs.h #define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10) UINT64_CAST 63 arch/mips/include/asm/sn/sn0/addrs.h #define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3) UINT64_CAST 76 arch/mips/include/asm/sn/sn0/addrs.h #define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) UINT64_CAST 77 arch/mips/include/asm/sn/sn0/addrs.h #define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) UINT64_CAST 81 arch/mips/include/asm/sn/sn0/addrs.h #define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) UINT64_CAST 83 arch/mips/include/asm/sn/sn0/addrs.h #define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) UINT64_CAST 84 arch/mips/include/asm/sn/sn0/addrs.h #define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ UINT64_CAST 94 arch/mips/include/asm/sn/sn0/addrs.h (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) UINT64_CAST 104 arch/mips/include/asm/sn/sn0/addrs.h #define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) UINT64_CAST 109 arch/mips/include/asm/sn/sn0/addrs.h (UINT64_CAST(bigwin) << BWIN_SIZE_BITS)) UINT64_CAST 961 arch/mips/include/asm/sn/sn0/hubio.h #define IIO_WST_ERROR_MASK (UINT64_CAST 1 << 32) /* Widget status error */ UINT64_CAST 125 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_FPROM_CYC_MASK (UINT64_CAST 31 << 49) /* of 'L' suffix, */ UINT64_CAST 127 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_FPROM_WR_MASK (UINT64_CAST 31 << 44) UINT64_CAST 129 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_UCTLR_CYC_MASK (UINT64_CAST 31 << 39) UINT64_CAST 131 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_UCTLR_WR_MASK (UINT64_CAST 31 << 34) UINT64_CAST 133 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_DIMM0_SEL_MASK (UINT64_CAST 3 << 32) UINT64_CAST 135 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_IO_PROT_EN_MASK (UINT64_CAST 1 << 31) UINT64_CAST 136 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_IO_PROT (UINT64_CAST 1 << 31) UINT64_CAST 138 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_ARB_MLSS_MASK (UINT64_CAST 1 << 30) UINT64_CAST 139 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_ARB_MLSS (UINT64_CAST 1 << 30) UINT64_CAST 141 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_IGNORE_ECC_MASK (UINT64_CAST 1 << 29) UINT64_CAST 142 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_IGNORE_ECC (UINT64_CAST 1 << 29) UINT64_CAST 144 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_DIR_PREMIUM_MASK (UINT64_CAST 1 << 28) UINT64_CAST 145 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_DIR_PREMIUM (UINT64_CAST 1 << 28) UINT64_CAST 147 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_REPLY_GUAR_MASK (UINT64_CAST 15 << 24) UINT64_CAST 149 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_BANK_MASK(_b) (UINT64_CAST 7 << MMC_BANK_SHFT(_b)) UINT64_CAST 151 arch/mips/include/asm/sn/sn0/hubmd.h #define MMC_RESET_DEFAULTS (UINT64_CAST 0x0f << MMC_FPROM_CYC_SHFT | \ UINT64_CAST 152 arch/mips/include/asm/sn/sn0/hubmd.h UINT64_CAST 0x07 << MMC_FPROM_WR_SHFT | \ UINT64_CAST 153 arch/mips/include/asm/sn/sn0/hubmd.h UINT64_CAST 0x1f << MMC_UCTLR_CYC_SHFT | \ UINT64_CAST 154 arch/mips/include/asm/sn/sn0/hubmd.h UINT64_CAST 0x0f << MMC_UCTLR_WR_SHFT | \ UINT64_CAST 156 arch/mips/include/asm/sn/sn0/hubmd.h UINT64_CAST 0x0f << MMC_REPLY_GUAR_SHFT | \ UINT64_CAST 162 arch/mips/include/asm/sn/sn0/hubmd.h #define MRC_ENABLE_MASK (UINT64_CAST 1 << 63) UINT64_CAST 163 arch/mips/include/asm/sn/sn0/hubmd.h #define MRC_ENABLE (UINT64_CAST 1 << 63) UINT64_CAST 165 arch/mips/include/asm/sn/sn0/hubmd.h #define MRC_COUNTER_MASK (UINT64_CAST 0xfff << 12) UINT64_CAST 167 arch/mips/include/asm/sn/sn0/hubmd.h #define MRC_RESET_DEFAULTS (UINT64_CAST 0x400) UINT64_CAST 172 arch/mips/include/asm/sn/sn0/hubmd.h #define MDI_SELECT_MASK (UINT64_CAST 0x0f << 32) UINT64_CAST 173 arch/mips/include/asm/sn/sn0/hubmd.h #define MDI_DIMM_MODE_MASK (UINT64_CAST 0xfff) UINT64_CAST 178 arch/mips/include/asm/sn/sn0/hubmd.h #define MMS_RP_SIZE_MASK (UINT64_CAST 0x3f << 8) UINT64_CAST 180 arch/mips/include/asm/sn/sn0/hubmd.h #define MMS_RQ_SIZE_MASK (UINT64_CAST 0x1f) UINT64_CAST 186 arch/mips/include/asm/sn/sn0/hubmd.h #define MFC_VALID_MASK (UINT64_CAST 1 << 63) UINT64_CAST 187 arch/mips/include/asm/sn/sn0/hubmd.h #define MFC_VALID (UINT64_CAST 1 << 63) UINT64_CAST 189 arch/mips/include/asm/sn/sn0/hubmd.h #define MFC_ADDR_MASK (UINT64_CAST 0x3ffffff) UINT64_CAST 194 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_PHI1_MASK (UINT64_CAST 0x7f << 27) UINT64_CAST 196 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_PHI0_MASK (UINT64_CAST 0x7f << 27) UINT64_CAST 198 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_PULSE_MASK (UINT64_CAST 0x3ff << 10) UINT64_CAST 200 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_SAMPLE_MASK (UINT64_CAST 0xff << 2) UINT64_CAST 203 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_DONE (UINT64_CAST 0x02) UINT64_CAST 204 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_RD_DATA (UINT64_CAST 0x01) UINT64_CAST 205 arch/mips/include/asm/sn/sn0/hubmd.h #define MLAN_RESET_DEFAULTS (UINT64_CAST 0x31 << MLAN_PHI1_SHFT | \ UINT64_CAST 206 arch/mips/include/asm/sn/sn0/hubmd.h UINT64_CAST 0x31 << MLAN_PHI0_SHFT) UINT64_CAST 211 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_CORECLK_TST_MASK (UINT64_CAST 1 << 7) UINT64_CAST 212 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_CORECLK_TST (UINT64_CAST 1 << 7) UINT64_CAST 214 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_CORECLK_MASK (UINT64_CAST 1 << 6) UINT64_CAST 215 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_CORECLK (UINT64_CAST 1 << 6) UINT64_CAST 217 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_NETSYNC_MASK (UINT64_CAST 1 << 5) UINT64_CAST 218 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_NETSYNC (UINT64_CAST 1 << 5) UINT64_CAST 220 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_FPROMRDY_MASK (UINT64_CAST 1 << 4) UINT64_CAST 221 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_FPROMRDY (UINT64_CAST 1 << 4) UINT64_CAST 223 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_I2CINTR_MASK (UINT64_CAST 1 << 3) UINT64_CAST 224 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_I2CINTR (UINT64_CAST 1 << 3) UINT64_CAST 227 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_SN0_SLOTID_MASK (UINT64_CAST 7) UINT64_CAST 229 arch/mips/include/asm/sn/sn0/hubmd.h #define MSU_SN00_SLOTID_MASK (UINT64_CAST 0x80) UINT64_CAST 236 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_DIFF_THRES_VALID_MASK (UINT64_CAST 0x1 << 63) UINT64_CAST 238 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_DIFF_THRES_VALUE_MASK (UINT64_CAST 0xfffff) UINT64_CAST 242 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_VALUE_THRES_VALID_MASK (UINT64_CAST 0x1 << 63) UINT64_CAST 244 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_VALUE_THRES_VALUE_MASK (UINT64_CAST 0xfffff) UINT64_CAST 248 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_CANDIDATE_VALID_MASK (UINT64_CAST 0x1 << 63) UINT64_CAST 250 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_CANDIDATE_TYPE_MASK (UINT64_CAST 0x1 << 30) UINT64_CAST 252 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_CANDIDATE_OVERRUN_MASK (UINT64_CAST 0x1 << 29) UINT64_CAST 254 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_CANDIDATE_INITIATOR_MASK (UINT64_CAST 0x7ff << 18) UINT64_CAST 256 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_CANDIDATE_NODEID_MASK (UINT64_CAST 0x1ff << 20) UINT64_CAST 258 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_MIG_CANDIDATE_ADDR_MASK (UINT64_CAST 0x3ffff) UINT64_CAST 264 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_BANK_MASK (UINT64_CAST 7 << 29) UINT64_CAST 265 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_BANK_SIZE (UINT64_CAST 1 << MD_BANK_SHFT) /* 512 MB */ UINT64_CAST 266 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_BANK_OFFSET(_b) (UINT64_CAST (_b) << MD_BANK_SHFT) UINT64_CAST 278 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_SHARED (UINT64_CAST 0x0) /* 000 */ UINT64_CAST 279 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_POISONED (UINT64_CAST 0x1) /* 001 */ UINT64_CAST 280 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_EXCLUSIVE (UINT64_CAST 0x2) /* 010 */ UINT64_CAST 281 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_BUSY_SHARED (UINT64_CAST 0x3) /* 011 */ UINT64_CAST 282 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_BUSY_EXCL (UINT64_CAST 0x4) /* 100 */ UINT64_CAST 283 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_WAIT (UINT64_CAST 0x5) /* 101 */ UINT64_CAST 284 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_UNOWNED (UINT64_CAST 0x7) /* 111 */ UINT64_CAST 291 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_DIR_FORCE_ECC (UINT64_CAST 1 << 63) UINT64_CAST 321 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PDIR_PTR_MASK (UINT64_CAST 0x7ff << 22) UINT64_CAST 325 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PDIR_VECMSB_MASK (UINT64_CAST MD_PDIR_VECMSB_BITMASK << 22) UINT64_CAST 329 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PDIR_VECLSB_BITMASK (UINT64_CAST 0x3fffffffff) UINT64_CAST 386 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_RW (UINT64_CAST 0x6) UINT64_CAST 387 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_RO (UINT64_CAST 0x3) UINT64_CAST 388 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_NO (UINT64_CAST 0x0) UINT64_CAST 389 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_BAD (UINT64_CAST 0x5) UINT64_CAST 402 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PPROT_IO_MASK (UINT64_CAST 7 << 45) UINT64_CAST 416 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_MIGMD_IREL (UINT64_CAST 0x3 << 3) UINT64_CAST 417 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_MIGMD_IABS (UINT64_CAST 0x2 << 3) UINT64_CAST 418 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_MIGMD_PREL (UINT64_CAST 0x1 << 3) UINT64_CAST 419 arch/mips/include/asm/sn/sn0/hubmd.h #define MD_PROT_MIGMD_OFF (UINT64_CAST 0x0 << 3) UINT64_CAST 772 arch/mips/include/asm/sn/sn0/hubmd.h #define MMCE_ILL_MSG_MASK (UINT64_CAST 0x03 << MMCE_ILL_MSG_SHFT) UINT64_CAST 774 arch/mips/include/asm/sn/sn0/hubmd.h #define MMCE_ILL_REV_MASK (UINT64_CAST 0x03 << MMCE_ILL_REV_SHFT) UINT64_CAST 776 arch/mips/include/asm/sn/sn0/hubmd.h #define MMCE_LONG_PACK_MASK (UINT64_CAST 0x03 << MMCE_lONG_PACK_SHFT) UINT64_CAST 778 arch/mips/include/asm/sn/sn0/hubmd.h #define MMCE_SHORT_PACK_MASK (UINT64_CAST 0x03 << MMCE_SHORT_PACK_SHFT) UINT64_CAST 780 arch/mips/include/asm/sn/sn0/hubmd.h #define MMCE_BAD_DATA_MASK (UINT64_CAST 0x03 << MMCE_BAD_DATA_SHFT) UINT64_CAST 75 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30) UINT64_CAST 77 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29) UINT64_CAST 79 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28) /* out of reset. */ UINT64_CAST 81 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18) /* Max. # of nodes */ UINT64_CAST 85 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17) /* Granularity */ UINT64_CAST 89 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8)/* Node (Hub) ID */ UINT64_CAST 91 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_REV_MASK (UINT64_CAST 0xf << 4) /* Chip Revision */ UINT64_CAST 93 arch/mips/include/asm/sn/sn0/hubni.h #define NSRI_CHIPID_MASK (UINT64_CAST 0xf) /* Chip type ID */ UINT64_CAST 104 arch/mips/include/asm/sn/sn0/hubni.h #define NPR_PORTRESET (UINT64_CAST 1 << 7) /* Send warm reset */ UINT64_CAST 105 arch/mips/include/asm/sn/sn0/hubni.h #define NPR_LINKRESET (UINT64_CAST 1 << 1) /* Send link reset */ UINT64_CAST 106 arch/mips/include/asm/sn/sn0/hubni.h #define NPR_LOCALRESET (UINT64_CAST 1) /* Reset entire hub */ UINT64_CAST 110 arch/mips/include/asm/sn/sn0/hubni.h #define NPROT_RESETOK (UINT64_CAST 1) UINT64_CAST 115 arch/mips/include/asm/sn/sn0/hubni.h #define NGP_MAXRETRY_MASK (UINT64_CAST 0x3ff << 48) UINT64_CAST 117 arch/mips/include/asm/sn/sn0/hubni.h #define NGP_TAILTOWRAP_MASK (UINT64_CAST 0xffff << 32) UINT64_CAST 120 arch/mips/include/asm/sn/sn0/hubni.h #define NGP_CREDITTOVAL_MASK (UINT64_CAST 0xf << 16) UINT64_CAST 122 arch/mips/include/asm/sn/sn0/hubni.h #define NGP_TAILTOVAL_MASK (UINT64_CAST 0xf << 4) UINT64_CAST 126 arch/mips/include/asm/sn/sn0/hubni.h #define NDP_PORTTORESET (UINT64_CAST 1 << 18) /* Port tmout reset */ UINT64_CAST 127 arch/mips/include/asm/sn/sn0/hubni.h #define NDP_LLP8BITMODE (UINT64_CAST 1 << 12) /* LLP 8-bit mode */ UINT64_CAST 128 arch/mips/include/asm/sn/sn0/hubni.h #define NDP_PORTDISABLE (UINT64_CAST 1 << 6) /* Port disable */ UINT64_CAST 129 arch/mips/include/asm/sn/sn0/hubni.h #define NDP_SENDERROR (UINT64_CAST 1) /* Send data error */ UINT64_CAST 137 arch/mips/include/asm/sn/sn0/hubni.h #define NVP_PIOID_MASK (UINT64_CAST 0x3ff << 40) UINT64_CAST 139 arch/mips/include/asm/sn/sn0/hubni.h #define NVP_WRITEID_MASK (UINT64_CAST 0xff << 32) UINT64_CAST 140 arch/mips/include/asm/sn/sn0/hubni.h #define NVP_ADDRESS_MASK (UINT64_CAST 0xffff8) /* Bits 19:3 */ UINT64_CAST 142 arch/mips/include/asm/sn/sn0/hubni.h #define NVP_TYPE_MASK (UINT64_CAST 0x3) UINT64_CAST 146 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_VALID (UINT64_CAST 1 << 63) UINT64_CAST 147 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_OVERRUN (UINT64_CAST 1 << 62) UINT64_CAST 149 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_TARGET_MASK (UINT64_CAST 0x3ff << 51) UINT64_CAST 151 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_PIOID_MASK (UINT64_CAST 0x3ff << 40) UINT64_CAST 153 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_WRITEID_MASK (UINT64_CAST 0xff << 32) UINT64_CAST 154 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_ADDRESS_MASK (UINT64_CAST 0xfffffff8) /* Bits 31:3 */ UINT64_CAST 156 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_TYPE_MASK (UINT64_CAST 0x7) UINT64_CAST 157 arch/mips/include/asm/sn/sn0/hubni.h #define NVS_ERROR_MASK (UINT64_CAST 0x4) /* bit set means error */ UINT64_CAST 172 arch/mips/include/asm/sn/sn0/hubni.h #define NAGE_VCH_MASK (UINT64_CAST 3 << 10) UINT64_CAST 174 arch/mips/include/asm/sn/sn0/hubni.h #define NAGE_CC_MASK (UINT64_CAST 3 << 8) UINT64_CAST 176 arch/mips/include/asm/sn/sn0/hubni.h #define NAGE_AGE_MASK (UINT64_CAST 0xff) UINT64_CAST 186 arch/mips/include/asm/sn/sn0/hubni.h #define NPP_NULLTO_MASK (UINT64_CAST 0x3f << 16) UINT64_CAST 188 arch/mips/include/asm/sn/sn0/hubni.h #define NPP_MAXBURST_MASK (UINT64_CAST 0x3ff) UINT64_CAST 189 arch/mips/include/asm/sn/sn0/hubni.h #define NPP_RESET_DFLT_HUB20 ((UINT64_CAST 1 << NPP_NULLTO_SHFT) | \ UINT64_CAST 190 arch/mips/include/asm/sn/sn0/hubni.h (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT)) UINT64_CAST 191 arch/mips/include/asm/sn/sn0/hubni.h #define NPP_RESET_DEFAULTS ((UINT64_CAST 6 << NPP_NULLTO_SHFT) | \ UINT64_CAST 192 arch/mips/include/asm/sn/sn0/hubni.h (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT)) UINT64_CAST 197 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_LINKRESET (UINT64_CAST 1 << 37) UINT64_CAST 198 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_INTERNALERROR (UINT64_CAST 1 << 36) UINT64_CAST 199 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_BADMESSAGE (UINT64_CAST 1 << 35) UINT64_CAST 200 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_BADDEST (UINT64_CAST 1 << 34) UINT64_CAST 201 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_FIFOOVERFLOW (UINT64_CAST 1 << 33) UINT64_CAST 203 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_CREDITTO_MASK (UINT64_CAST 0xf << 28) UINT64_CAST 205 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_TAILTO_MASK (UINT64_CAST 0xf << 24) UINT64_CAST 207 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_RETRYCOUNT_MASK (UINT64_CAST 0xff << 16) UINT64_CAST 209 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_CBERRCOUNT_MASK (UINT64_CAST 0xff << 8) UINT64_CAST 211 arch/mips/include/asm/sn/sn0/hubni.h #define NPE_SNERRCOUNT_MASK (UINT64_CAST 0xff << 0) UINT64_CAST 223 arch/mips/include/asm/sn/sn0/hubni.h #define NMT_EXIT_PORT_MASK (UINT64_CAST 0xf) UINT64_CAST 227 arch/mips/include/asm/sn/sn0/hubni.h #define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf) UINT64_CAST 386 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_USE_INT_MASK (UINT64_CAST 1 << 16) UINT64_CAST 387 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_USE_INT (UINT64_CAST 1 << 16) UINT64_CAST 389 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_GCLK_MASK (UINT64_CAST 1 << 15) UINT64_CAST 390 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_GCLK (UINT64_CAST 1 << 15) UINT64_CAST 392 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_GCLK_COUNT_MASK (UINT64_CAST 0x7f << 8) UINT64_CAST 394 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_MAX_COUNT_MASK (UINT64_CAST 0x7f << 1) UINT64_CAST 396 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_GCLK_EN_MASK (UINT64_CAST 1) UINT64_CAST 397 arch/mips/include/asm/sn/sn0/hubpi.h #define PRLC_GCLK_EN (UINT64_CAST 1)