UIMM 46 arch/mips/mm/uasm-micromips.c [insn_andi] = {M(mm_andi32_op, 0, 0, 0, 0, 0), RT | RS | UIMM}, UIMM 95 arch/mips/mm/uasm-micromips.c [insn_ori] = {M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM}, UIMM 121 arch/mips/mm/uasm-micromips.c [insn_xori] = {M(mm_xori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM}, UIMM 191 arch/mips/mm/uasm-micromips.c if (ip->fields & UIMM) UIMM 54 arch/mips/mm/uasm-mips.c [insn_andi] = {M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM}, UIMM 161 arch/mips/mm/uasm-mips.c [insn_ori] = {M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM}, UIMM 202 arch/mips/mm/uasm-mips.c [insn_xori] = {M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM}, UIMM 255 arch/mips/mm/uasm-mips.c if (ip->fields & UIMM) UIMM 752 arch/powerpc/xmon/ppc-opc.c #define DCTL UIMM UIMM 756 arch/powerpc/xmon/ppc-opc.c #define UIMM3 UIMM + 1 UIMM 3263 arch/powerpc/xmon/ppc-opc.c {"evaddiw", VX (4, 514), VX_MASK, PPCSPE, 0, {RS, RB, UIMM}}, UIMM 3268 arch/powerpc/xmon/ppc-opc.c {"evsubifw", VX (4, 518), VX_MASK, PPCSPE, 0, {RS, UIMM, RB}}, UIMM 3269 arch/powerpc/xmon/ppc-opc.c {"evsubiw", VX (4, 518), VX_MASK, PPCSPE, 0, {RS, RB, UIMM}}, UIMM 3438 arch/powerpc/xmon/ppc-opc.c {"vcfux", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3439 arch/powerpc/xmon/ppc-opc.c {"vcuxwfp", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3481 arch/powerpc/xmon/ppc-opc.c {"vcfsx", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3482 arch/powerpc/xmon/ppc-opc.c {"vcsxwfp", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3497 arch/powerpc/xmon/ppc-opc.c {"vctuxs", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3498 arch/powerpc/xmon/ppc-opc.c {"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3507 arch/powerpc/xmon/ppc-opc.c {"vctsxs", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}}, UIMM 3508 arch/powerpc/xmon/ppc-opc.c {"vcfpsxws", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},