UIC_ARG_MIB_SEL    34 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01,
UIC_ARG_MIB_SEL    36 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19,
UIC_ARG_MIB_SEL    38 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN0_TX), 0x14,
UIC_ARG_MIB_SEL    40 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
UIC_ARG_MIB_SEL    42 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN0_RX), 0x01,
UIC_ARG_MIB_SEL    44 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN0_RX), 0x19,
UIC_ARG_MIB_SEL    46 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN0_RX), 4,
UIC_ARG_MIB_SEL    48 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
UIC_ARG_MIB_SEL    52 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
UIC_ARG_MIB_SEL    54 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN0_RX), 0x03,
UIC_ARG_MIB_SEL    56 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN0_RX), 0x16,
UIC_ARG_MIB_SEL    58 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN0_RX), 0x42,
UIC_ARG_MIB_SEL    60 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN0_RX), 0xa4,
UIC_ARG_MIB_SEL    62 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN0_RX), 0x01,
UIC_ARG_MIB_SEL    64 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN0_RX), 0x01,
UIC_ARG_MIB_SEL    66 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN0_RX), 0x28,
UIC_ARG_MIB_SEL    68 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN0_RX), 0x1E,
UIC_ARG_MIB_SEL    70 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
UIC_ARG_MIB_SEL    72 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
UIC_ARG_MIB_SEL    91 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01,
UIC_ARG_MIB_SEL    93 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19,
UIC_ARG_MIB_SEL    95 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN0_RX), 0x19,
UIC_ARG_MIB_SEL    97 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN0_TX), 0x12,
UIC_ARG_MIB_SEL    99 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
UIC_ARG_MIB_SEL   101 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN0_RX), 0x01,
UIC_ARG_MIB_SEL   103 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN0_RX), 2,
UIC_ARG_MIB_SEL   105 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
UIC_ARG_MIB_SEL   109 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN0_RX), 0x03,
UIC_ARG_MIB_SEL   111 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN0_RX), 0x16,
UIC_ARG_MIB_SEL   113 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN0_RX), 0x42,
UIC_ARG_MIB_SEL   115 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN0_RX), 0xa4,
UIC_ARG_MIB_SEL   117 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN0_RX), 0x01,
UIC_ARG_MIB_SEL   119 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN0_RX), 0x01,
UIC_ARG_MIB_SEL   121 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN0_RX), 0x28,
UIC_ARG_MIB_SEL   123 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN0_RX), 0x1E,
UIC_ARG_MIB_SEL   125 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
UIC_ARG_MIB_SEL   148 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN1_TX), 0x0d,
UIC_ARG_MIB_SEL   150 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN1_TX), 0x19,
UIC_ARG_MIB_SEL   152 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN1_TX), 0x12,
UIC_ARG_MIB_SEL   154 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
UIC_ARG_MIB_SEL   159 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN1_RX), 0x01,
UIC_ARG_MIB_SEL   161 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN1_RX), 0x19,
UIC_ARG_MIB_SEL   163 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN1_RX), 2,
UIC_ARG_MIB_SEL   165 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN1_RX), 0x80,
UIC_ARG_MIB_SEL   167 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN1_RX), 0x03,
UIC_ARG_MIB_SEL   169 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN1_RX), 0x16,
UIC_ARG_MIB_SEL   171 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN1_RX), 0x42,
UIC_ARG_MIB_SEL   173 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN1_RX), 0xa4,
UIC_ARG_MIB_SEL   175 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN1_RX), 0x01,
UIC_ARG_MIB_SEL   177 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN1_RX), 0x01,
UIC_ARG_MIB_SEL   179 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN1_RX), 0x28,
UIC_ARG_MIB_SEL   181 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN1_RX), 0x1E,
UIC_ARG_MIB_SEL   183 drivers/scsi/ufs/tc-dwc-g210.c 		{ UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN1_RX), 0x2f,
UIC_ARG_MIB_SEL    31 drivers/scsi/ufs/ufs-hisi.c 		err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 0),
UIC_ARG_MIB_SEL    34 drivers/scsi/ufs/ufs-hisi.c 		    UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 1), &tx_fsm_val_1);
UIC_ARG_MIB_SEL    48 drivers/scsi/ufs/ufs-hisi.c 		err = ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 0),
UIC_ARG_MIB_SEL    51 drivers/scsi/ufs/ufs-hisi.c 		 UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE, 1), &tx_fsm_val_1);
UIC_ARG_MIB_SEL   146 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD0C1, 0x0), 0x1);
UIC_ARG_MIB_SEL   148 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x156A, 0x0), 0x2);
UIC_ARG_MIB_SEL   150 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8114, 0x0), 0x1);
UIC_ARG_MIB_SEL   152 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8121, 0x0), 0x2D);
UIC_ARG_MIB_SEL   154 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8122, 0x0), 0x1);
UIC_ARG_MIB_SEL   158 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8127, 0x0), 0x98);
UIC_ARG_MIB_SEL   160 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8128, 0x0), 0x1);
UIC_ARG_MIB_SEL   164 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1);
UIC_ARG_MIB_SEL   166 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x800D, 0x4), 0x58);
UIC_ARG_MIB_SEL   168 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x800D, 0x5), 0x58);
UIC_ARG_MIB_SEL   170 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x800E, 0x4), 0xB);
UIC_ARG_MIB_SEL   172 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x800E, 0x5), 0xB);
UIC_ARG_MIB_SEL   174 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8009, 0x4), 0x1);
UIC_ARG_MIB_SEL   176 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8009, 0x5), 0x1);
UIC_ARG_MIB_SEL   178 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1);
UIC_ARG_MIB_SEL   180 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8113, 0x0), 0x1);
UIC_ARG_MIB_SEL   181 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1);
UIC_ARG_MIB_SEL   185 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0092, 0x4), 0xA);
UIC_ARG_MIB_SEL   187 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0092, 0x5), 0xA);
UIC_ARG_MIB_SEL   189 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008f, 0x4), 0xA);
UIC_ARG_MIB_SEL   191 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008f, 0x5), 0xA);
UIC_ARG_MIB_SEL   194 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x4), 0x7);
UIC_ARG_MIB_SEL   196 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x5), 0x7);
UIC_ARG_MIB_SEL   200 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0095, 0x4), 0x4F);
UIC_ARG_MIB_SEL   202 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0095, 0x5), 0x4F);
UIC_ARG_MIB_SEL   204 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0094, 0x4), 0x4F);
UIC_ARG_MIB_SEL   206 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0094, 0x5), 0x4F);
UIC_ARG_MIB_SEL   208 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008B, 0x4), 0x4F);
UIC_ARG_MIB_SEL   210 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008B, 0x5), 0x4F);
UIC_ARG_MIB_SEL   212 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x000F, 0x0), 0x5);
UIC_ARG_MIB_SEL   214 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x000F, 0x1), 0x5);
UIC_ARG_MIB_SEL   216 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1);
UIC_ARG_MIB_SEL   218 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(0xD0C1, 0x0), &value);
UIC_ARG_MIB_SEL   224 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD0C1, 0x0), 0x0);
UIC_ARG_MIB_SEL   238 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x155E, 0x0), 0x0);
UIC_ARG_MIB_SEL   240 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD0AB, 0x0), 0x0);
UIC_ARG_MIB_SEL   241 drivers/scsi/ufs/ufs-hisi.c 	ufshcd_dme_get(hba, UIC_ARG_MIB_SEL(0xD0AB, 0x0), &value);
UIC_ARG_MIB_SEL   331 drivers/scsi/ufs/ufs-hisi.c 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xd085, 0x0), 0x01);
UIC_ARG_MIB_SEL   208 drivers/scsi/ufs/ufs-qcom.c 				UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE,
UIC_ARG_MIB_SEL   224 drivers/scsi/ufs/ufs-qcom.c 				UIC_ARG_MIB_SEL(MPHY_TX_FSM_STATE,
UIC_ARG_MIB_SEL  3836 drivers/scsi/ufs/ufshcd.c 				UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
UIC_ARG_MIB_SEL  4352 drivers/scsi/ufs/ufshcd.c 				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
UIC_ARG_MIB_SEL  4357 drivers/scsi/ufs/ufshcd.c 				UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
UIC_ARG_MIB_SEL  6601 drivers/scsi/ufs/ufshcd.c 				  UIC_ARG_MIB_SEL(
UIC_ARG_MIB_SEL  6637 drivers/scsi/ufs/ufshcd.c 			     UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
UIC_ARG_MIB_SEL  6644 drivers/scsi/ufs/ufshcd.c 				  UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
UIC_ARG_MIB_SEL   260 drivers/scsi/ufs/ufshci.h #define UIC_ARG_MIB(attr)		UIC_ARG_MIB_SEL(attr, 0)