UI5               721 arch/powerpc/xmon/ppc-opc.c #define OIMM5 UI5 + 1
UI5              7060 arch/powerpc/xmon/ppc-opc.c {"se_cmpi",	SE_IM5(10,1),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7061 arch/powerpc/xmon/ppc-opc.c {"se_bmaski",	SE_IM5(11,0),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7062 arch/powerpc/xmon/ppc-opc.c {"se_andi",	SE_IM5(11,1),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7083 arch/powerpc/xmon/ppc-opc.c {"se_bclri",	SE_IM5(24,0),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7084 arch/powerpc/xmon/ppc-opc.c {"se_bgeni",	SE_IM5(24,1),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7085 arch/powerpc/xmon/ppc-opc.c {"se_bseti",	SE_IM5(25,0),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7086 arch/powerpc/xmon/ppc-opc.c {"se_btsti",	SE_IM5(25,1),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7087 arch/powerpc/xmon/ppc-opc.c {"se_srwi",	SE_IM5(26,0),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7088 arch/powerpc/xmon/ppc-opc.c {"se_srawi",	SE_IM5(26,1),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},
UI5              7089 arch/powerpc/xmon/ppc-opc.c {"se_slwi",	SE_IM5(27,0),	SE_IM5_MASK,	PPCVLE,	0,		{RX, UI5}},