UFS_QCOM_PHY_CAL_ENTRY 100 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_POWER_DOWN_CONTROL, 0x01), UFS_QCOM_PHY_CAL_ENTRY 101 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CMN_CONFIG, 0x0e), UFS_QCOM_PHY_CAL_ENTRY 102 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SYSCLK_EN_SEL, 0xd7), UFS_QCOM_PHY_CAL_ENTRY 103 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CLK_SELECT, 0x30), UFS_QCOM_PHY_CAL_ENTRY 104 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SYS_CLK_CTRL, 0x06), UFS_QCOM_PHY_CAL_ENTRY 105 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x08), UFS_QCOM_PHY_CAL_ENTRY 106 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_BG_TIMER, 0x0a), UFS_QCOM_PHY_CAL_ENTRY 107 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_HSCLK_SEL, 0x05), UFS_QCOM_PHY_CAL_ENTRY 108 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CORECLK_DIV, 0x0a), UFS_QCOM_PHY_CAL_ENTRY 109 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CORECLK_DIV_MODE1, 0x0a), UFS_QCOM_PHY_CAL_ENTRY 110 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP_EN, 0x01), UFS_QCOM_PHY_CAL_ENTRY 111 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE_CTRL, 0x10), UFS_QCOM_PHY_CAL_ENTRY 112 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RESETSM_CNTRL, 0x20), UFS_QCOM_PHY_CAL_ENTRY 113 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CORE_CLK_EN, 0x00), UFS_QCOM_PHY_CAL_ENTRY 114 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP_CFG, 0x00), UFS_QCOM_PHY_CAL_ENTRY 115 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE_TIMER1, 0xff), UFS_QCOM_PHY_CAL_ENTRY 116 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE_TIMER2, 0x3f), UFS_QCOM_PHY_CAL_ENTRY 117 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE_MAP, 0x14), UFS_QCOM_PHY_CAL_ENTRY 118 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SVS_MODE_CLK_SEL, 0x05), UFS_QCOM_PHY_CAL_ENTRY 119 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START_MODE0, 0x82), UFS_QCOM_PHY_CAL_ENTRY 120 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x00), UFS_QCOM_PHY_CAL_ENTRY 121 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x00), UFS_QCOM_PHY_CAL_ENTRY 122 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x00), UFS_QCOM_PHY_CAL_ENTRY 123 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CP_CTRL_MODE0, 0x0b), UFS_QCOM_PHY_CAL_ENTRY 124 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RCTRL_MODE0, 0x16), UFS_QCOM_PHY_CAL_ENTRY 125 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CCTRL_MODE0, 0x28), UFS_QCOM_PHY_CAL_ENTRY 126 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80), UFS_QCOM_PHY_CAL_ENTRY 127 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_INTEGLOOP_GAIN1_MODE0, 0x00), UFS_QCOM_PHY_CAL_ENTRY 128 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE1_MODE0, 0x28), UFS_QCOM_PHY_CAL_ENTRY 129 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE2_MODE0, 0x02), UFS_QCOM_PHY_CAL_ENTRY 130 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP1_MODE0, 0xff), UFS_QCOM_PHY_CAL_ENTRY 131 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP2_MODE0, 0x0c), UFS_QCOM_PHY_CAL_ENTRY 132 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP3_MODE0, 0x00), UFS_QCOM_PHY_CAL_ENTRY 133 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START_MODE1, 0x98), UFS_QCOM_PHY_CAL_ENTRY 134 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START1_MODE1, 0x00), UFS_QCOM_PHY_CAL_ENTRY 135 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START2_MODE1, 0x00), UFS_QCOM_PHY_CAL_ENTRY 136 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START3_MODE1, 0x00), UFS_QCOM_PHY_CAL_ENTRY 137 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_CP_CTRL_MODE1, 0x0b), UFS_QCOM_PHY_CAL_ENTRY 138 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RCTRL_MODE1, 0x16), UFS_QCOM_PHY_CAL_ENTRY 139 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CCTRL_MODE1, 0x28), UFS_QCOM_PHY_CAL_ENTRY 140 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_INTEGLOOP_GAIN0_MODE1, 0x80), UFS_QCOM_PHY_CAL_ENTRY 141 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_INTEGLOOP_GAIN1_MODE1, 0x00), UFS_QCOM_PHY_CAL_ENTRY 142 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE1_MODE1, 0xd6), UFS_QCOM_PHY_CAL_ENTRY 143 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE2_MODE1, 0x00), UFS_QCOM_PHY_CAL_ENTRY 144 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP1_MODE1, 0x32), UFS_QCOM_PHY_CAL_ENTRY 145 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP2_MODE1, 0x0f), UFS_QCOM_PHY_CAL_ENTRY 146 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_LOCK_CMP3_MODE1, 0x00), UFS_QCOM_PHY_CAL_ENTRY 148 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_HIGHZ_TRANSCEIVER_BIAS_DRVR_EN, 0x45), UFS_QCOM_PHY_CAL_ENTRY 149 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_LANE_MODE, 0x02), UFS_QCOM_PHY_CAL_ENTRY 151 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_SIGDET_LVL, 0x24), UFS_QCOM_PHY_CAL_ENTRY 152 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_SIGDET_CNTRL, 0x02), UFS_QCOM_PHY_CAL_ENTRY 153 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_INTERFACE_MODE, 0x00), UFS_QCOM_PHY_CAL_ENTRY 154 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_SIGDET_DEGLITCH_CNTRL, 0x18), UFS_QCOM_PHY_CAL_ENTRY 155 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_UCDR_FASTLOCK_FO_GAIN, 0x0B), UFS_QCOM_PHY_CAL_ENTRY 156 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_TERM_BW, 0x5B), UFS_QCOM_PHY_CAL_ENTRY 157 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_LSB, 0xFF), UFS_QCOM_PHY_CAL_ENTRY 158 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_MSB, 0x3F), UFS_QCOM_PHY_CAL_ENTRY 159 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_LSB, 0xFF), UFS_QCOM_PHY_CAL_ENTRY 160 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_MSB, 0x0F), UFS_QCOM_PHY_CAL_ENTRY 161 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0E), UFS_QCOM_PHY_CAL_ENTRY 165 drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_VCO_TUNE_MAP, 0x54), UFS_QCOM_PHY_CAL_ENTRY 126 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_POWER_DOWN_CONTROL, 0x01), UFS_QCOM_PHY_CAL_ENTRY 127 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_SIGDET_CTRL3, 0x0D), UFS_QCOM_PHY_CAL_ENTRY 128 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_VCOTAIL_EN, 0xe1), UFS_QCOM_PHY_CAL_ENTRY 129 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CRCTRL, 0xcc), UFS_QCOM_PHY_CAL_ENTRY 130 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SYSCLK_EN_SEL_TXBAND, 0x08), UFS_QCOM_PHY_CAL_ENTRY 131 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CLKEPDIV, 0x03), UFS_QCOM_PHY_CAL_ENTRY 132 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RXTXEPCLK_EN, 0x10), UFS_QCOM_PHY_CAL_ENTRY 133 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START1, 0x82), UFS_QCOM_PHY_CAL_ENTRY 134 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START2, 0x03), UFS_QCOM_PHY_CAL_ENTRY 135 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START1, 0x80), UFS_QCOM_PHY_CAL_ENTRY 136 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START2, 0x80), UFS_QCOM_PHY_CAL_ENTRY 137 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START3, 0x40), UFS_QCOM_PHY_CAL_ENTRY 138 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP1, 0xff), UFS_QCOM_PHY_CAL_ENTRY 139 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP2, 0x19), UFS_QCOM_PHY_CAL_ENTRY 140 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP3, 0x00), UFS_QCOM_PHY_CAL_ENTRY 141 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP_EN, 0x03), UFS_QCOM_PHY_CAL_ENTRY 142 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RESETSM_CNTRL, 0x90), UFS_QCOM_PHY_CAL_ENTRY 143 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RESETSM_CNTRL2, 0x03), UFS_QCOM_PHY_CAL_ENTRY 144 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL1(0), 0xf2), UFS_QCOM_PHY_CAL_ENTRY 145 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_HALF(0), 0x0c), UFS_QCOM_PHY_CAL_ENTRY 146 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_QUARTER(0), 0x12), UFS_QCOM_PHY_CAL_ENTRY 147 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL1(1), 0xf2), UFS_QCOM_PHY_CAL_ENTRY 148 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_HALF(1), 0x0c), UFS_QCOM_PHY_CAL_ENTRY 149 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_QUARTER(1), 0x12), UFS_QCOM_PHY_CAL_ENTRY 150 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_LSB(0), 0xff), UFS_QCOM_PHY_CAL_ENTRY 151 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_MSB(0), 0xff), UFS_QCOM_PHY_CAL_ENTRY 152 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_LSB(0), 0xff), UFS_QCOM_PHY_CAL_ENTRY 153 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_MSB(0), 0x00), UFS_QCOM_PHY_CAL_ENTRY 154 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_LSB(1), 0xff), UFS_QCOM_PHY_CAL_ENTRY 155 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_MSB(1), 0xff), UFS_QCOM_PHY_CAL_ENTRY 156 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_LSB(1), 0xff), UFS_QCOM_PHY_CAL_ENTRY 157 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_MSB(1), 0x00), UFS_QCOM_PHY_CAL_ENTRY 158 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETI, 0x3f), UFS_QCOM_PHY_CAL_ENTRY 159 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETP, 0x1b), UFS_QCOM_PHY_CAL_ENTRY 160 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETP, 0x0f), UFS_QCOM_PHY_CAL_ENTRY 161 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETI, 0x01), UFS_QCOM_PHY_CAL_ENTRY 162 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_EMP_POST1_LVL(0), 0x2F), UFS_QCOM_PHY_CAL_ENTRY 163 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_DRV_LVL(0), 0x20), UFS_QCOM_PHY_CAL_ENTRY 164 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_EMP_POST1_LVL(1), 0x2F), UFS_QCOM_PHY_CAL_ENTRY 165 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_DRV_LVL(1), 0x20), UFS_QCOM_PHY_CAL_ENTRY 166 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_LANE_MODE(0), 0x68), UFS_QCOM_PHY_CAL_ENTRY 167 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_LANE_MODE(1), 0x68), UFS_QCOM_PHY_CAL_ENTRY 168 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2(1), 0xdc), UFS_QCOM_PHY_CAL_ENTRY 169 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2(0), 0xdc), UFS_QCOM_PHY_CAL_ENTRY 170 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x3), UFS_QCOM_PHY_CAL_ENTRY 174 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_POWER_DOWN_CONTROL, 0x01), UFS_QCOM_PHY_CAL_ENTRY 175 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(UFS_PHY_RX_SIGDET_CTRL3, 0x0D), UFS_QCOM_PHY_CAL_ENTRY 176 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_VCOTAIL_EN, 0xe1), UFS_QCOM_PHY_CAL_ENTRY 177 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CRCTRL, 0xcc), UFS_QCOM_PHY_CAL_ENTRY 178 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_SYSCLK_EN_SEL_TXBAND, 0x08), UFS_QCOM_PHY_CAL_ENTRY 179 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CLKEPDIV, 0x03), UFS_QCOM_PHY_CAL_ENTRY 180 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RXTXEPCLK_EN, 0x10), UFS_QCOM_PHY_CAL_ENTRY 181 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START1, 0x82), UFS_QCOM_PHY_CAL_ENTRY 182 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START2, 0x03), UFS_QCOM_PHY_CAL_ENTRY 183 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START1, 0x80), UFS_QCOM_PHY_CAL_ENTRY 184 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START2, 0x80), UFS_QCOM_PHY_CAL_ENTRY 185 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DIV_FRAC_START3, 0x40), UFS_QCOM_PHY_CAL_ENTRY 186 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP1, 0xff), UFS_QCOM_PHY_CAL_ENTRY 187 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP2, 0x19), UFS_QCOM_PHY_CAL_ENTRY 188 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP3, 0x00), UFS_QCOM_PHY_CAL_ENTRY 189 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP_EN, 0x03), UFS_QCOM_PHY_CAL_ENTRY 190 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RESETSM_CNTRL, 0x90), UFS_QCOM_PHY_CAL_ENTRY 191 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RESETSM_CNTRL2, 0x03), UFS_QCOM_PHY_CAL_ENTRY 192 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL1(0), 0xf2), UFS_QCOM_PHY_CAL_ENTRY 193 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_HALF(0), 0x0c), UFS_QCOM_PHY_CAL_ENTRY 194 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_QUARTER(0), 0x12), UFS_QCOM_PHY_CAL_ENTRY 195 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL1(1), 0xf2), UFS_QCOM_PHY_CAL_ENTRY 196 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_HALF(1), 0x0c), UFS_QCOM_PHY_CAL_ENTRY 197 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_CDR_CONTROL_QUARTER(1), 0x12), UFS_QCOM_PHY_CAL_ENTRY 198 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_LSB(0), 0xff), UFS_QCOM_PHY_CAL_ENTRY 199 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_MSB(0), 0xff), UFS_QCOM_PHY_CAL_ENTRY 200 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_LSB(0), 0xff), UFS_QCOM_PHY_CAL_ENTRY 201 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_MSB(0), 0x00), UFS_QCOM_PHY_CAL_ENTRY 202 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_LSB(1), 0xff), UFS_QCOM_PHY_CAL_ENTRY 203 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN1_MSB(1), 0xff), UFS_QCOM_PHY_CAL_ENTRY 204 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_LSB(1), 0xff), UFS_QCOM_PHY_CAL_ENTRY 205 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQ_GAIN2_MSB(1), 0x00), UFS_QCOM_PHY_CAL_ENTRY 206 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETI, 0x2b), UFS_QCOM_PHY_CAL_ENTRY 207 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETP, 0x38), UFS_QCOM_PHY_CAL_ENTRY 208 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CP_SETP, 0x3c), UFS_QCOM_PHY_CAL_ENTRY 209 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RES_CODE_UP_OFFSET, 0x02), UFS_QCOM_PHY_CAL_ENTRY 210 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_RES_CODE_DN_OFFSET, 0x02), UFS_QCOM_PHY_CAL_ENTRY 211 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_IP_SETI, 0x01), UFS_QCOM_PHY_CAL_ENTRY 212 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CNTRL, 0x40), UFS_QCOM_PHY_CAL_ENTRY 213 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_LANE_MODE(0), 0x68), UFS_QCOM_PHY_CAL_ENTRY 214 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_LANE_MODE(1), 0x68), UFS_QCOM_PHY_CAL_ENTRY 215 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2(1), 0xdc), UFS_QCOM_PHY_CAL_ENTRY 216 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2(0), 0xdc), UFS_QCOM_PHY_CAL_ENTRY 217 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x3), UFS_QCOM_PHY_CAL_ENTRY 221 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_DEC_START1, 0x98), UFS_QCOM_PHY_CAL_ENTRY 222 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP1, 0x65), UFS_QCOM_PHY_CAL_ENTRY 223 drivers/phy/qualcomm/phy-qcom-ufs-qmp-20nm.h UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLLLOCK_CMP2, 0x1e),