BIT_ULL 1309 arch/csky/kernel/perf_event.c csky_pmu.max_period = BIT_ULL(csky_pmu.count_width) - 1; BIT_ULL 355 arch/mips/include/asm/cpu.h #define MIPS_CPU_TLB BIT_ULL( 0) /* CPU has TLB */ BIT_ULL 356 arch/mips/include/asm/cpu.h #define MIPS_CPU_4KEX BIT_ULL( 1) /* "R4K" exception model */ BIT_ULL 357 arch/mips/include/asm/cpu.h #define MIPS_CPU_3K_CACHE BIT_ULL( 2) /* R3000-style caches */ BIT_ULL 358 arch/mips/include/asm/cpu.h #define MIPS_CPU_4K_CACHE BIT_ULL( 3) /* R4000-style caches */ BIT_ULL 359 arch/mips/include/asm/cpu.h #define MIPS_CPU_TX39_CACHE BIT_ULL( 4) /* TX3900-style caches */ BIT_ULL 360 arch/mips/include/asm/cpu.h #define MIPS_CPU_FPU BIT_ULL( 5) /* CPU has FPU */ BIT_ULL 361 arch/mips/include/asm/cpu.h #define MIPS_CPU_32FPR BIT_ULL( 6) /* 32 dbl. prec. FP registers */ BIT_ULL 362 arch/mips/include/asm/cpu.h #define MIPS_CPU_COUNTER BIT_ULL( 7) /* Cycle count/compare */ BIT_ULL 363 arch/mips/include/asm/cpu.h #define MIPS_CPU_WATCH BIT_ULL( 8) /* watchpoint registers */ BIT_ULL 364 arch/mips/include/asm/cpu.h #define MIPS_CPU_DIVEC BIT_ULL( 9) /* dedicated interrupt vector */ BIT_ULL 365 arch/mips/include/asm/cpu.h #define MIPS_CPU_VCE BIT_ULL(10) /* virt. coherence conflict possible */ BIT_ULL 366 arch/mips/include/asm/cpu.h #define MIPS_CPU_CACHE_CDEX_P BIT_ULL(11) /* Create_Dirty_Exclusive CACHE op */ BIT_ULL 367 arch/mips/include/asm/cpu.h #define MIPS_CPU_CACHE_CDEX_S BIT_ULL(12) /* ... same for seconary cache ... */ BIT_ULL 368 arch/mips/include/asm/cpu.h #define MIPS_CPU_MCHECK BIT_ULL(13) /* Machine check exception */ BIT_ULL 369 arch/mips/include/asm/cpu.h #define MIPS_CPU_EJTAG BIT_ULL(14) /* EJTAG exception */ BIT_ULL 370 arch/mips/include/asm/cpu.h #define MIPS_CPU_NOFPUEX BIT_ULL(15) /* no FPU exception */ BIT_ULL 371 arch/mips/include/asm/cpu.h #define MIPS_CPU_LLSC BIT_ULL(16) /* CPU has ll/sc instructions */ BIT_ULL 372 arch/mips/include/asm/cpu.h #define MIPS_CPU_INCLUSIVE_CACHES BIT_ULL(17) /* P-cache subset enforced */ BIT_ULL 373 arch/mips/include/asm/cpu.h #define MIPS_CPU_PREFETCH BIT_ULL(18) /* CPU has usable prefetch */ BIT_ULL 374 arch/mips/include/asm/cpu.h #define MIPS_CPU_VINT BIT_ULL(19) /* CPU supports MIPSR2 vectored interrupts */ BIT_ULL 375 arch/mips/include/asm/cpu.h #define MIPS_CPU_VEIC BIT_ULL(20) /* CPU supports MIPSR2 external interrupt controller mode */ BIT_ULL 376 arch/mips/include/asm/cpu.h #define MIPS_CPU_ULRI BIT_ULL(21) /* CPU has ULRI feature */ BIT_ULL 377 arch/mips/include/asm/cpu.h #define MIPS_CPU_PCI BIT_ULL(22) /* CPU has Perf Ctr Int indicator */ BIT_ULL 378 arch/mips/include/asm/cpu.h #define MIPS_CPU_RIXI BIT_ULL(23) /* CPU has TLB Read/eXec Inhibit */ BIT_ULL 379 arch/mips/include/asm/cpu.h #define MIPS_CPU_MICROMIPS BIT_ULL(24) /* CPU has microMIPS capability */ BIT_ULL 380 arch/mips/include/asm/cpu.h #define MIPS_CPU_TLBINV BIT_ULL(25) /* CPU supports TLBINV/F */ BIT_ULL 381 arch/mips/include/asm/cpu.h #define MIPS_CPU_SEGMENTS BIT_ULL(26) /* CPU supports Segmentation Control registers */ BIT_ULL 382 arch/mips/include/asm/cpu.h #define MIPS_CPU_EVA BIT_ULL(27) /* CPU supports Enhanced Virtual Addressing */ BIT_ULL 383 arch/mips/include/asm/cpu.h #define MIPS_CPU_HTW BIT_ULL(28) /* CPU support Hardware Page Table Walker */ BIT_ULL 384 arch/mips/include/asm/cpu.h #define MIPS_CPU_RIXIEX BIT_ULL(29) /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */ BIT_ULL 385 arch/mips/include/asm/cpu.h #define MIPS_CPU_MAAR BIT_ULL(30) /* MAAR(I) registers are present */ BIT_ULL 386 arch/mips/include/asm/cpu.h #define MIPS_CPU_FRE BIT_ULL(31) /* FRE & UFE bits implemented */ BIT_ULL 387 arch/mips/include/asm/cpu.h #define MIPS_CPU_RW_LLB BIT_ULL(32) /* LLADDR/LLB writes are allowed */ BIT_ULL 388 arch/mips/include/asm/cpu.h #define MIPS_CPU_LPA BIT_ULL(33) /* CPU supports Large Physical Addressing */ BIT_ULL 389 arch/mips/include/asm/cpu.h #define MIPS_CPU_CDMM BIT_ULL(34) /* CPU has Common Device Memory Map */ BIT_ULL 390 arch/mips/include/asm/cpu.h #define MIPS_CPU_BP_GHIST BIT_ULL(35) /* R12K+ Branch Prediction Global History */ BIT_ULL 391 arch/mips/include/asm/cpu.h #define MIPS_CPU_SP BIT_ULL(36) /* Small (1KB) page support */ BIT_ULL 392 arch/mips/include/asm/cpu.h #define MIPS_CPU_FTLB BIT_ULL(37) /* CPU has Fixed-page-size TLB */ BIT_ULL 393 arch/mips/include/asm/cpu.h #define MIPS_CPU_NAN_LEGACY BIT_ULL(38) /* Legacy NaN implemented */ BIT_ULL 394 arch/mips/include/asm/cpu.h #define MIPS_CPU_NAN_2008 BIT_ULL(39) /* 2008 NaN implemented */ BIT_ULL 395 arch/mips/include/asm/cpu.h #define MIPS_CPU_VP BIT_ULL(40) /* MIPSr6 Virtual Processors (multi-threading) */ BIT_ULL 396 arch/mips/include/asm/cpu.h #define MIPS_CPU_LDPTE BIT_ULL(41) /* CPU has ldpte/lddir instructions */ BIT_ULL 397 arch/mips/include/asm/cpu.h #define MIPS_CPU_MVH BIT_ULL(42) /* CPU supports MFHC0/MTHC0 */ BIT_ULL 398 arch/mips/include/asm/cpu.h #define MIPS_CPU_EBASE_WG BIT_ULL(43) /* CPU has EBase.WG */ BIT_ULL 399 arch/mips/include/asm/cpu.h #define MIPS_CPU_BADINSTR BIT_ULL(44) /* CPU has BadInstr register */ BIT_ULL 400 arch/mips/include/asm/cpu.h #define MIPS_CPU_BADINSTRP BIT_ULL(45) /* CPU has BadInstrP register */ BIT_ULL 401 arch/mips/include/asm/cpu.h #define MIPS_CPU_CTXTC BIT_ULL(46) /* CPU has [X]ConfigContext registers */ BIT_ULL 402 arch/mips/include/asm/cpu.h #define MIPS_CPU_PERF BIT_ULL(47) /* CPU has MIPS performance counters */ BIT_ULL 403 arch/mips/include/asm/cpu.h #define MIPS_CPU_GUESTCTL0EXT BIT_ULL(48) /* CPU has VZ GuestCtl0Ext register */ BIT_ULL 404 arch/mips/include/asm/cpu.h #define MIPS_CPU_GUESTCTL1 BIT_ULL(49) /* CPU has VZ GuestCtl1 register */ BIT_ULL 405 arch/mips/include/asm/cpu.h #define MIPS_CPU_GUESTCTL2 BIT_ULL(50) /* CPU has VZ GuestCtl2 register */ BIT_ULL 406 arch/mips/include/asm/cpu.h #define MIPS_CPU_GUESTID BIT_ULL(51) /* CPU uses VZ ASE GuestID feature */ BIT_ULL 407 arch/mips/include/asm/cpu.h #define MIPS_CPU_DRG BIT_ULL(52) /* CPU has VZ Direct Root to Guest (DRG) */ BIT_ULL 408 arch/mips/include/asm/cpu.h #define MIPS_CPU_UFR BIT_ULL(53) /* CPU supports User mode FR switching */ BIT_ULL 410 arch/mips/include/asm/cpu.h BIT_ULL(54) /* CPU shares FTLB RAM with another */ BIT_ULL 412 arch/mips/include/asm/cpu.h BIT_ULL(55) /* CPU shares FTLB entries with another */ BIT_ULL 414 arch/mips/include/asm/cpu.h BIT_ULL(56) /* CPU has perf counters implemented per TC (MIPSMT ASE) */ BIT_ULL 415 arch/mips/include/asm/cpu.h #define MIPS_CPU_MMID BIT_ULL(57) /* CPU supports MemoryMapIDs */ BIT_ULL 131 arch/mips/include/asm/mips-cm.h #define CM_GCR_CONFIG_CLUSTER_COH_CAPABLE BIT_ULL(43) BIT_ULL 135 arch/mips/include/asm/mips-gic.h _val &= ~BIT_ULL(intr % 64); \ BIT_ULL 753 arch/mips/include/asm/mipsregs.h #define MIPS_MAAR_ADDR ((BIT_ULL(BITS_PER_LONG - 12) - 1) << 12) BIT_ULL 44 arch/mips/sgi-ip27/ip27-xtalk.c bd->intr_addr = BIT_ULL(47) + 0x01800000 + PI_INT_PEND_MOD; BIT_ULL 52 arch/powerpc/platforms/powernv/opal-irqchip.c e &= ~BIT_ULL(hwirq); BIT_ULL 23 arch/um/drivers/vhost_user.h #define VHOST_USER_SUPPORTED_F BIT_ULL(VHOST_USER_F_PROTOCOL_FEATURES) BIT_ULL 25 arch/um/drivers/vhost_user.h #define VHOST_USER_SUPPORTED_PROTOCOL_F (BIT_ULL(VHOST_USER_PROTOCOL_F_REPLY_ACK) | \ BIT_ULL 26 arch/um/drivers/vhost_user.h BIT_ULL(VHOST_USER_PROTOCOL_F_SLAVE_REQ) | \ BIT_ULL 27 arch/um/drivers/vhost_user.h BIT_ULL(VHOST_USER_PROTOCOL_F_CONFIG)) BIT_ULL 187 arch/um/drivers/virtio_uml.c BIT_ULL(VHOST_USER_PROTOCOL_F_REPLY_ACK))) BIT_ULL 387 arch/um/drivers/virtio_uml.c if (vu_dev->features & BIT_ULL(VHOST_USER_F_PROTOCOL_FEATURES)) { BIT_ULL 400 arch/um/drivers/virtio_uml.c BIT_ULL(VHOST_USER_PROTOCOL_F_SLAVE_REQ)) { BIT_ULL 419 arch/um/drivers/virtio_uml.c BIT_ULL(VHOST_USER_PROTOCOL_F_CONFIG))) BIT_ULL 469 arch/um/drivers/virtio_uml.c BIT_ULL(VHOST_USER_PROTOCOL_F_CONFIG))) BIT_ULL 654 arch/um/drivers/virtio_uml.c if (!(vu_dev->features & BIT_ULL(VHOST_USER_F_PROTOCOL_FEATURES))) BIT_ULL 168 arch/x86/events/amd/iommu.c if (piommu->cntr_assign_mask & BIT_ULL(shift)) { BIT_ULL 171 arch/x86/events/amd/iommu.c piommu->cntr_assign_mask |= BIT_ULL(shift); BIT_ULL 385 arch/x86/events/intel/core.c #define SKL_DEMAND_DATA_RD BIT_ULL(0) BIT_ULL 386 arch/x86/events/intel/core.c #define SKL_DEMAND_RFO BIT_ULL(1) BIT_ULL 387 arch/x86/events/intel/core.c #define SKL_ANY_RESPONSE BIT_ULL(16) BIT_ULL 388 arch/x86/events/intel/core.c #define SKL_SUPPLIER_NONE BIT_ULL(17) BIT_ULL 389 arch/x86/events/intel/core.c #define SKL_L3_MISS_LOCAL_DRAM BIT_ULL(26) BIT_ULL 390 arch/x86/events/intel/core.c #define SKL_L3_MISS_REMOTE_HOP0_DRAM BIT_ULL(27) BIT_ULL 391 arch/x86/events/intel/core.c #define SKL_L3_MISS_REMOTE_HOP1_DRAM BIT_ULL(28) BIT_ULL 392 arch/x86/events/intel/core.c #define SKL_L3_MISS_REMOTE_HOP2P_DRAM BIT_ULL(29) BIT_ULL 397 arch/x86/events/intel/core.c #define SKL_SPL_HIT BIT_ULL(30) BIT_ULL 398 arch/x86/events/intel/core.c #define SKL_SNOOP_NONE BIT_ULL(31) BIT_ULL 399 arch/x86/events/intel/core.c #define SKL_SNOOP_NOT_NEEDED BIT_ULL(32) BIT_ULL 400 arch/x86/events/intel/core.c #define SKL_SNOOP_MISS BIT_ULL(33) BIT_ULL 401 arch/x86/events/intel/core.c #define SKL_SNOOP_HIT_NO_FWD BIT_ULL(34) BIT_ULL 402 arch/x86/events/intel/core.c #define SKL_SNOOP_HIT_WITH_FWD BIT_ULL(35) BIT_ULL 403 arch/x86/events/intel/core.c #define SKL_SNOOP_HITM BIT_ULL(36) BIT_ULL 404 arch/x86/events/intel/core.c #define SKL_SNOOP_NON_DRAM BIT_ULL(37) BIT_ULL 769 arch/x86/events/intel/core.c #define HSW_DEMAND_DATA_RD BIT_ULL(0) BIT_ULL 770 arch/x86/events/intel/core.c #define HSW_DEMAND_RFO BIT_ULL(1) BIT_ULL 771 arch/x86/events/intel/core.c #define HSW_ANY_RESPONSE BIT_ULL(16) BIT_ULL 772 arch/x86/events/intel/core.c #define HSW_SUPPLIER_NONE BIT_ULL(17) BIT_ULL 773 arch/x86/events/intel/core.c #define HSW_L3_MISS_LOCAL_DRAM BIT_ULL(22) BIT_ULL 774 arch/x86/events/intel/core.c #define HSW_L3_MISS_REMOTE_HOP0 BIT_ULL(27) BIT_ULL 775 arch/x86/events/intel/core.c #define HSW_L3_MISS_REMOTE_HOP1 BIT_ULL(28) BIT_ULL 776 arch/x86/events/intel/core.c #define HSW_L3_MISS_REMOTE_HOP2P BIT_ULL(29) BIT_ULL 780 arch/x86/events/intel/core.c #define HSW_SNOOP_NONE BIT_ULL(31) BIT_ULL 781 arch/x86/events/intel/core.c #define HSW_SNOOP_NOT_NEEDED BIT_ULL(32) BIT_ULL 782 arch/x86/events/intel/core.c #define HSW_SNOOP_MISS BIT_ULL(33) BIT_ULL 783 arch/x86/events/intel/core.c #define HSW_SNOOP_HIT_NO_FWD BIT_ULL(34) BIT_ULL 784 arch/x86/events/intel/core.c #define HSW_SNOOP_HIT_WITH_FWD BIT_ULL(35) BIT_ULL 785 arch/x86/events/intel/core.c #define HSW_SNOOP_HITM BIT_ULL(36) BIT_ULL 786 arch/x86/events/intel/core.c #define HSW_SNOOP_NON_DRAM BIT_ULL(37) BIT_ULL 1620 arch/x86/events/intel/core.c #define GLM_DEMAND_DATA_RD BIT_ULL(0) BIT_ULL 1621 arch/x86/events/intel/core.c #define GLM_DEMAND_RFO BIT_ULL(1) BIT_ULL 1622 arch/x86/events/intel/core.c #define GLM_ANY_RESPONSE BIT_ULL(16) BIT_ULL 1623 arch/x86/events/intel/core.c #define GLM_SNP_NONE_OR_MISS BIT_ULL(33) BIT_ULL 1861 arch/x86/events/intel/core.c #define TNT_LOCAL_DRAM BIT_ULL(26) BIT_ULL 1900 arch/x86/events/intel/core.c #define KNL_OT_L2_HITE BIT_ULL(19) /* Other Tile L2 Hit */ BIT_ULL 1901 arch/x86/events/intel/core.c #define KNL_OT_L2_HITF BIT_ULL(20) /* Other Tile L2 Hit */ BIT_ULL 1902 arch/x86/events/intel/core.c #define KNL_MCDRAM_LOCAL BIT_ULL(21) BIT_ULL 1903 arch/x86/events/intel/core.c #define KNL_MCDRAM_FAR BIT_ULL(22) BIT_ULL 1904 arch/x86/events/intel/core.c #define KNL_DDR_LOCAL BIT_ULL(23) BIT_ULL 1905 arch/x86/events/intel/core.c #define KNL_DDR_FAR BIT_ULL(24) BIT_ULL 81 arch/x86/events/intel/lbr.c #define LBR_FROM_FLAG_MISPRED BIT_ULL(63) BIT_ULL 82 arch/x86/events/intel/lbr.c #define LBR_FROM_FLAG_IN_TX BIT_ULL(62) BIT_ULL 83 arch/x86/events/intel/lbr.c #define LBR_FROM_FLAG_ABORT BIT_ULL(61) BIT_ULL 85 arch/x86/events/intel/lbr.c #define LBR_FROM_SIGNEXT_2MSB (BIT_ULL(60) | BIT_ULL(59)) BIT_ULL 90 arch/x86/events/perf_event.h #define PEBS_PMI_AFTER_EACH_RECORD BIT_ULL(60) BIT_ULL 356 arch/x86/include/asm/hyperv-tlfs.h #define HV_CRASH_CTL_CRASH_NOTIFY_MSG BIT_ULL(62) BIT_ULL 357 arch/x86/include/asm/hyperv-tlfs.h #define HV_CRASH_CTL_CRASH_NOTIFY BIT_ULL(63) BIT_ULL 13 arch/x86/include/asm/mce.h #define MCG_CTL_P BIT_ULL(8) /* MCG_CTL register available */ BIT_ULL 14 arch/x86/include/asm/mce.h #define MCG_EXT_P BIT_ULL(9) /* Extended registers available */ BIT_ULL 15 arch/x86/include/asm/mce.h #define MCG_CMCI_P BIT_ULL(10) /* CMCI supported */ BIT_ULL 19 arch/x86/include/asm/mce.h #define MCG_SER_P BIT_ULL(24) /* MCA recovery/new status bits */ BIT_ULL 20 arch/x86/include/asm/mce.h #define MCG_ELOG_P BIT_ULL(26) /* Extended error log supported */ BIT_ULL 21 arch/x86/include/asm/mce.h #define MCG_LMCE_P BIT_ULL(27) /* Local machine check supported */ BIT_ULL 24 arch/x86/include/asm/mce.h #define MCG_STATUS_RIPV BIT_ULL(0) /* restart ip valid */ BIT_ULL 25 arch/x86/include/asm/mce.h #define MCG_STATUS_EIPV BIT_ULL(1) /* ip points to correct instruction */ BIT_ULL 26 arch/x86/include/asm/mce.h #define MCG_STATUS_MCIP BIT_ULL(2) /* machine check in progress */ BIT_ULL 27 arch/x86/include/asm/mce.h #define MCG_STATUS_LMCES BIT_ULL(3) /* LMCE signaled */ BIT_ULL 30 arch/x86/include/asm/mce.h #define MCG_EXT_CTL_LMCE_EN BIT_ULL(0) /* Enable LMCE */ BIT_ULL 33 arch/x86/include/asm/mce.h #define MCI_STATUS_VAL BIT_ULL(63) /* valid error */ BIT_ULL 34 arch/x86/include/asm/mce.h #define MCI_STATUS_OVER BIT_ULL(62) /* previous errors lost */ BIT_ULL 35 arch/x86/include/asm/mce.h #define MCI_STATUS_UC BIT_ULL(61) /* uncorrected error */ BIT_ULL 36 arch/x86/include/asm/mce.h #define MCI_STATUS_EN BIT_ULL(60) /* error enabled */ BIT_ULL 37 arch/x86/include/asm/mce.h #define MCI_STATUS_MISCV BIT_ULL(59) /* misc error reg. valid */ BIT_ULL 38 arch/x86/include/asm/mce.h #define MCI_STATUS_ADDRV BIT_ULL(58) /* addr reg. valid */ BIT_ULL 39 arch/x86/include/asm/mce.h #define MCI_STATUS_PCC BIT_ULL(57) /* processor context corrupt */ BIT_ULL 40 arch/x86/include/asm/mce.h #define MCI_STATUS_S BIT_ULL(56) /* Signaled machine check */ BIT_ULL 41 arch/x86/include/asm/mce.h #define MCI_STATUS_AR BIT_ULL(55) /* Action required */ BIT_ULL 47 arch/x86/include/asm/mce.h #define MCI_STATUS_TCC BIT_ULL(55) /* Task context corrupt */ BIT_ULL 48 arch/x86/include/asm/mce.h #define MCI_STATUS_SYNDV BIT_ULL(53) /* synd reg. valid */ BIT_ULL 49 arch/x86/include/asm/mce.h #define MCI_STATUS_DEFERRED BIT_ULL(44) /* uncorrected error, deferred exception */ BIT_ULL 50 arch/x86/include/asm/mce.h #define MCI_STATUS_POISON BIT_ULL(43) /* access poisonous data */ BIT_ULL 51 arch/x86/include/asm/mce.h #define MCI_STATUS_SCRUB BIT_ULL(40) /* Error detected during scrub operation */ BIT_ULL 91 arch/x86/include/asm/mce.h #define MCI_CTL2_CMCI_EN BIT_ULL(30) BIT_ULL 62 arch/x86/include/asm/msr-index.h #define MSR_PLATFORM_INFO_CPUID_FAULT BIT_ULL(MSR_PLATFORM_INFO_CPUID_FAULT_BIT) BIT_ULL 149 arch/x86/include/asm/msr-index.h #define LBR_INFO_MISPRED BIT_ULL(63) BIT_ULL 150 arch/x86/include/asm/msr-index.h #define LBR_INFO_IN_TX BIT_ULL(62) BIT_ULL 151 arch/x86/include/asm/msr-index.h #define LBR_INFO_ABORT BIT_ULL(61) BIT_ULL 439 arch/x86/include/asm/msr-index.h #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) BIT_ULL 487 arch/x86/include/asm/msr-index.h #define MSR_F10H_DECFG_LFENCE_SERIALIZE BIT_ULL(MSR_F10H_DECFG_LFENCE_SERIALIZE_BIT) BIT_ULL 494 arch/x86/include/asm/msr-index.h #define MSR_K8_SYSCFG_MEM_ENCRYPT BIT_ULL(MSR_K8_SYSCFG_MEM_ENCRYPT_BIT) BIT_ULL 516 arch/x86/include/asm/msr-index.h #define MSR_K7_HWCR_SMMLOCK BIT_ULL(MSR_K7_HWCR_SMMLOCK_BIT) BIT_ULL 518 arch/x86/include/asm/msr-index.h #define MSR_K7_HWCR_IRPERF_EN BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT) BIT_ULL 709 arch/x86/include/asm/msr-index.h #define MSR_MISC_FEATURES_ENABLES_CPUID_FAULT BIT_ULL(MSR_MISC_FEATURES_ENABLES_CPUID_FAULT_BIT) BIT_ULL 718 arch/x86/include/asm/msr-index.h #define MSR_TFA_RTM_FORCE_ABORT BIT_ULL(MSR_TFA_RTM_FORCE_ABORT_BIT) BIT_ULL 92 arch/x86/include/asm/perf_event.h #define PEBS_DATACFG_MEMINFO BIT_ULL(0) BIT_ULL 93 arch/x86/include/asm/perf_event.h #define PEBS_DATACFG_GP BIT_ULL(1) BIT_ULL 94 arch/x86/include/asm/perf_event.h #define PEBS_DATACFG_XMMS BIT_ULL(2) BIT_ULL 95 arch/x86/include/asm/perf_event.h #define PEBS_DATACFG_LBRS BIT_ULL(3) BIT_ULL 179 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_COND_CHG BIT_ULL(63) BIT_ULL 180 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_BUFFER_OVF BIT_ULL(62) BIT_ULL 181 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_UNC_OVF BIT_ULL(61) BIT_ULL 182 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_ASIF BIT_ULL(60) BIT_ULL 183 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_COUNTERS_FROZEN BIT_ULL(59) BIT_ULL 184 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_LBRS_FROZEN BIT_ULL(58) BIT_ULL 185 arch/x86/include/asm/perf_event.h #define GLOBAL_STATUS_TRACE_TOPAPMI BIT_ULL(55) BIT_ULL 40 arch/x86/include/asm/processor-flags.h #define CR3_NOFLUSH BIT_ULL(63) BIT_ULL 180 arch/x86/include/asm/processor.h return BIT_ULL(boot_cpu_data.x86_cache_bits - 1 - PAGE_SHIFT); BIT_ULL 131 arch/x86/include/asm/svm.h #define LBR_CTL_ENABLE_MASK BIT_ULL(0) BIT_ULL 132 arch/x86/include/asm/svm.h #define VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK BIT_ULL(1) BIT_ULL 833 arch/x86/kernel/cpu/mce/amd.c ret_addr += (BIT_ULL(32) - dram_hole_base); BIT_ULL 41 arch/x86/kernel/cpu/resctrl/internal.h #define RMID_VAL_ERROR BIT_ULL(63) BIT_ULL 42 arch/x86/kernel/cpu/resctrl/internal.h #define RMID_VAL_UNAVAIL BIT_ULL(62) BIT_ULL 441 arch/x86/kernel/fpu/xstate.c if (XFEATURE_MASK_SUPERVISOR & BIT_ULL(xfeature_nr)) { BIT_ULL 846 arch/x86/kernel/fpu/xstate.c WARN_ONCE(!(xfeatures_mask & BIT_ULL(xfeature_nr)), BIT_ULL 859 arch/x86/kernel/fpu/xstate.c if (!(xsave->header.xfeatures & BIT_ULL(xfeature_nr))) BIT_ULL 1374 arch/x86/kvm/hyperv.c valid_bank_mask = BIT_ULL(0); BIT_ULL 1485 arch/x86/kvm/hyperv.c valid_bank_mask = BIT_ULL(0); BIT_ULL 6258 arch/x86/kvm/mmu.c mask = BIT_ULL(51) | PT_PRESENT_MASK; BIT_ULL 1060 arch/x86/kvm/vmx/nested.c BIT_ULL(49) | BIT_ULL(54) | BIT_ULL(55) | BIT_ULL 1062 arch/x86/kvm/vmx/nested.c BIT_ULL(31) | GENMASK_ULL(47, 45) | GENMASK_ULL(63, 56); BIT_ULL 1072 arch/x86/kvm/vmx/nested.c if (data & BIT_ULL(48)) BIT_ULL 1136 arch/x86/kvm/vmx/nested.c BIT_ULL(5) | GENMASK_ULL(8, 6) | BIT_ULL(14) | BIT_ULL(15) | BIT_ULL 1137 arch/x86/kvm/vmx/nested.c BIT_ULL(28) | BIT_ULL(29) | BIT_ULL(30) | BIT_ULL 1139 arch/x86/kvm/vmx/nested.c GENMASK_ULL(13, 9) | BIT_ULL(31); BIT_ULL 1954 arch/x86/kvm/vmx/vmx.c if (data & (BIT_ULL(1) | GENMASK_ULL(63, 32))) BIT_ULL 2523 arch/x86/kvm/x86.c return !!(vcpu->arch.msr_hwcr & BIT_ULL(18)); BIT_ULL 2725 arch/x86/kvm/x86.c if (data == BIT_ULL(18)) { BIT_ULL 333 drivers/clk/clk-si5341.c while (!(n_num & BIT_ULL(43)) && !(n_den & BIT(31))) { BIT_ULL 432 drivers/crypto/cavium/nitrox/nitrox_hal.c nitrox_write_csr(ndev, POM_PERF_CTL, BIT_ULL(i)); BIT_ULL 139 drivers/crypto/cavium/nitrox/nitrox_mbx.c nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); BIT_ULL 162 drivers/crypto/cavium/nitrox/nitrox_mbx.c nitrox_write_csr(ndev, reg_addr, BIT_ULL(i)); BIT_ULL 110 drivers/dma/xgene-dma.c #define XGENE_DMA_DESC_NV_BIT BIT_ULL(50) BIT_ULL 111 drivers/dma/xgene-dma.c #define XGENE_DMA_DESC_IN_BIT BIT_ULL(55) BIT_ULL 112 drivers/dma/xgene-dma.c #define XGENE_DMA_DESC_C_BIT BIT_ULL(63) BIT_ULL 113 drivers/dma/xgene-dma.c #define XGENE_DMA_DESC_DR_BIT BIT_ULL(61) BIT_ULL 204 drivers/edac/i10nm_base.c m.status |= BIT_ULL(MCI_STATUS_CEC_SHIFT); BIT_ULL 973 drivers/edac/mce_amd.c (hwid->xec_bitmap & BIT_ULL(xec))) { BIT_ULL 596 drivers/edac/pnd2_edac.c slice_hash_mask |= BIT_ULL(slice_selector); BIT_ULL 603 drivers/edac/pnd2_edac.c chan_hash_mask |= BIT_ULL(chan_selector); BIT_ULL 225 drivers/edac/skx_base.c if (addr >= skx_tohm || (addr >= skx_tolm && addr < BIT_ULL(32))) { BIT_ULL 557 drivers/edac/skx_base.c m.status |= BIT_ULL(MCI_STATUS_CEC_SHIFT); BIT_ULL 106 drivers/edac/skx_common.c res->addr < BIT_ULL(32))) { BIT_ULL 127 drivers/extcon/extcon-fsa9480.c [DEV_USB_OTG] = BIT_ULL(EXTCON_USB_HOST), BIT_ULL 128 drivers/extcon/extcon-fsa9480.c [DEV_DEDICATED_CHG] = BIT_ULL(EXTCON_USB) | BIT_ULL(EXTCON_CHG_USB_DCP), BIT_ULL 129 drivers/extcon/extcon-fsa9480.c [DEV_USB_CHG] = BIT_ULL(EXTCON_USB) | BIT_ULL(EXTCON_CHG_USB_SDP), BIT_ULL 130 drivers/extcon/extcon-fsa9480.c [DEV_CAR_KIT] = BIT_ULL(EXTCON_USB) | BIT_ULL(EXTCON_CHG_USB_SDP) BIT_ULL 131 drivers/extcon/extcon-fsa9480.c | BIT_ULL(EXTCON_JACK_LINE_OUT), BIT_ULL 132 drivers/extcon/extcon-fsa9480.c [DEV_UART] = BIT_ULL(EXTCON_JIG), BIT_ULL 133 drivers/extcon/extcon-fsa9480.c [DEV_USB] = BIT_ULL(EXTCON_USB) | BIT_ULL(EXTCON_CHG_USB_SDP), BIT_ULL 134 drivers/extcon/extcon-fsa9480.c [DEV_AUDIO_2] = BIT_ULL(EXTCON_JACK_LINE_OUT), BIT_ULL 135 drivers/extcon/extcon-fsa9480.c [DEV_AUDIO_1] = BIT_ULL(EXTCON_JACK_LINE_OUT), BIT_ULL 136 drivers/extcon/extcon-fsa9480.c [DEV_AV] = BIT_ULL(EXTCON_JACK_LINE_OUT) BIT_ULL 137 drivers/extcon/extcon-fsa9480.c | BIT_ULL(EXTCON_JACK_VIDEO_OUT), BIT_ULL 138 drivers/extcon/extcon-fsa9480.c [DEV_TTY] = BIT_ULL(EXTCON_JIG), BIT_ULL 139 drivers/extcon/extcon-fsa9480.c [DEV_PPD] = BIT_ULL(EXTCON_JACK_LINE_OUT) | BIT_ULL(EXTCON_CHG_USB_ACA), BIT_ULL 140 drivers/extcon/extcon-fsa9480.c [DEV_JIG_UART_OFF] = BIT_ULL(EXTCON_JIG), BIT_ULL 141 drivers/extcon/extcon-fsa9480.c [DEV_JIG_UART_ON] = BIT_ULL(EXTCON_JIG), BIT_ULL 142 drivers/extcon/extcon-fsa9480.c [DEV_JIG_USB_OFF] = BIT_ULL(EXTCON_USB) | BIT_ULL(EXTCON_JIG), BIT_ULL 143 drivers/extcon/extcon-fsa9480.c [DEV_JIG_USB_ON] = BIT_ULL(EXTCON_USB) | BIT_ULL(EXTCON_JIG), BIT_ULL 213 drivers/extcon/extcon-fsa9480.c cables &= ~BIT_ULL(cable); BIT_ULL 216 drivers/extcon/extcon-fsa9480.c mask &= ~BIT_ULL(dev); BIT_ULL 10 drivers/firmware/efi/cper-x86.c #define VALID_LAPIC_ID BIT_ULL(0) BIT_ULL 11 drivers/firmware/efi/cper-x86.c #define VALID_CPUID_INFO BIT_ULL(1) BIT_ULL 28 drivers/firmware/efi/cper-x86.c #define INFO_VALID_CHECK_INFO BIT_ULL(0) BIT_ULL 29 drivers/firmware/efi/cper-x86.c #define INFO_VALID_TARGET_ID BIT_ULL(1) BIT_ULL 30 drivers/firmware/efi/cper-x86.c #define INFO_VALID_REQUESTOR_ID BIT_ULL(2) BIT_ULL 31 drivers/firmware/efi/cper-x86.c #define INFO_VALID_RESPONDER_ID BIT_ULL(3) BIT_ULL 32 drivers/firmware/efi/cper-x86.c #define INFO_VALID_IP BIT_ULL(4) BIT_ULL 34 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_TRANS_TYPE BIT_ULL(0) BIT_ULL 35 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_OPERATION BIT_ULL(1) BIT_ULL 36 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_LEVEL BIT_ULL(2) BIT_ULL 37 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_PCC BIT_ULL(3) BIT_ULL 38 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_UNCORRECTED BIT_ULL(4) BIT_ULL 39 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_PRECISE_IP BIT_ULL(5) BIT_ULL 40 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_RESTARTABLE_IP BIT_ULL(6) BIT_ULL 41 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_OVERFLOW BIT_ULL(7) BIT_ULL 43 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_BUS_PART_TYPE BIT_ULL(8) BIT_ULL 44 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_BUS_TIME_OUT BIT_ULL(9) BIT_ULL 45 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_BUS_ADDR_SPACE BIT_ULL(10) BIT_ULL 51 drivers/firmware/efi/cper-x86.c #define CHECK_PCC BIT_ULL(25) BIT_ULL 52 drivers/firmware/efi/cper-x86.c #define CHECK_UNCORRECTED BIT_ULL(26) BIT_ULL 53 drivers/firmware/efi/cper-x86.c #define CHECK_PRECISE_IP BIT_ULL(27) BIT_ULL 54 drivers/firmware/efi/cper-x86.c #define CHECK_RESTARTABLE_IP BIT_ULL(28) BIT_ULL 55 drivers/firmware/efi/cper-x86.c #define CHECK_OVERFLOW BIT_ULL(29) BIT_ULL 58 drivers/firmware/efi/cper-x86.c #define CHECK_BUS_TIME_OUT BIT_ULL(32) BIT_ULL 61 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_MS_ERR_TYPE BIT_ULL(0) BIT_ULL 62 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_MS_PCC BIT_ULL(1) BIT_ULL 63 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_MS_UNCORRECTED BIT_ULL(2) BIT_ULL 64 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_MS_PRECISE_IP BIT_ULL(3) BIT_ULL 65 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_MS_RESTARTABLE_IP BIT_ULL(4) BIT_ULL 66 drivers/firmware/efi/cper-x86.c #define CHECK_VALID_MS_OVERFLOW BIT_ULL(5) BIT_ULL 69 drivers/firmware/efi/cper-x86.c #define CHECK_MS_PCC BIT_ULL(19) BIT_ULL 70 drivers/firmware/efi/cper-x86.c #define CHECK_MS_UNCORRECTED BIT_ULL(20) BIT_ULL 71 drivers/firmware/efi/cper-x86.c #define CHECK_MS_PRECISE_IP BIT_ULL(21) BIT_ULL 72 drivers/firmware/efi/cper-x86.c #define CHECK_MS_RESTARTABLE_IP BIT_ULL(22) BIT_ULL 73 drivers/firmware/efi/cper-x86.c #define CHECK_MS_OVERFLOW BIT_ULL(23) BIT_ULL 25 drivers/fpga/dfl-fme-error.c #define MBP_ERROR BIT_ULL(6) BIT_ULL 37 drivers/fpga/dfl-fme-mgr.c #define FME_PR_CTRL_PR_RST BIT_ULL(0) /* Reset PR engine */ BIT_ULL 38 drivers/fpga/dfl-fme-mgr.c #define FME_PR_CTRL_PR_RSTACK BIT_ULL(4) /* Ack for PR engine reset */ BIT_ULL 40 drivers/fpga/dfl-fme-mgr.c #define FME_PR_CTRL_PR_START BIT_ULL(12) /* Start to request PR service */ BIT_ULL 41 drivers/fpga/dfl-fme-mgr.c #define FME_PR_CTRL_PR_COMPLETE BIT_ULL(13) /* PR data push completion */ BIT_ULL 46 drivers/fpga/dfl-fme-mgr.c #define FME_PR_STS_PR_STS BIT_ULL(16) /* PR operation status */ BIT_ULL 57 drivers/fpga/dfl-fme-mgr.c #define FME_PR_ERR_OPERATION_ERR BIT_ULL(0) BIT_ULL 59 drivers/fpga/dfl-fme-mgr.c #define FME_PR_ERR_CRC_ERR BIT_ULL(1) BIT_ULL 61 drivers/fpga/dfl-fme-mgr.c #define FME_PR_ERR_INCOMPATIBLE_BS BIT_ULL(2) BIT_ULL 63 drivers/fpga/dfl-fme-mgr.c #define FME_PR_ERR_PROTOCOL_ERR BIT_ULL(3) BIT_ULL 65 drivers/fpga/dfl-fme-mgr.c #define FME_PR_ERR_FIFO_OVERFLOW BIT_ULL(4) BIT_ULL 73 drivers/fpga/dfl.h #define DFH_EOL BIT_ULL(40) /* End of list */ BIT_ULL 94 drivers/fpga/dfl.h #define FME_CAP_SOCKET_ID BIT_ULL(8) /* Socket ID */ BIT_ULL 95 drivers/fpga/dfl.h #define FME_CAP_PCIE0_LINK_AVL BIT_ULL(12) /* PCIE0 Link */ BIT_ULL 96 drivers/fpga/dfl.h #define FME_CAP_PCIE1_LINK_AVL BIT_ULL(13) /* PCIE1 Link */ BIT_ULL 97 drivers/fpga/dfl.h #define FME_CAP_COHR_LINK_AVL BIT_ULL(14) /* Coherent Link */ BIT_ULL 98 drivers/fpga/dfl.h #define FME_CAP_IOMMU_AVL BIT_ULL(16) /* IOMMU available */ BIT_ULL 110 drivers/fpga/dfl.h #define FME_PORT_OFST_ACC_CTRL BIT_ULL(55) BIT_ULL 113 drivers/fpga/dfl.h #define FME_PORT_OFST_IMP BIT_ULL(60) BIT_ULL 134 drivers/fpga/dfl.h #define PORT_CTRL_SFTRST BIT_ULL(0) /* Port soft reset */ BIT_ULL 136 drivers/fpga/dfl.h #define PORT_CTRL_LATENCY BIT_ULL(2) BIT_ULL 137 drivers/fpga/dfl.h #define PORT_CTRL_SFTRST_ACK BIT_ULL(4) /* HW ack for reset */ BIT_ULL 140 drivers/fpga/dfl.h #define PORT_STS_AP2_EVT BIT_ULL(13) /* AP2 event detected */ BIT_ULL 141 drivers/fpga/dfl.h #define PORT_STS_AP1_EVT BIT_ULL(12) /* AP1 event detected */ BIT_ULL 46 drivers/fsi/fsi-scom.c #define XSCOM_ADDR_IND_FLAG BIT_ULL(63) BIT_ULL 47 drivers/fsi/fsi-scom.c #define XSCOM_ADDR_INF_FORM1 BIT_ULL(60) BIT_ULL 52 drivers/fsi/fsi-scom.c #define XSCOM_DATA_IND_READ BIT_ULL(63) BIT_ULL 53 drivers/fsi/fsi-scom.c #define XSCOM_DATA_IND_COMPLETE BIT_ULL(31) BIT_ULL 130 drivers/gpio/gpio-thunderx.c writeq(BIT_ULL(bank_bit), reg); BIT_ULL 262 drivers/gpio/gpio-thunderx.c u64 masked_bits = read_bits & BIT_ULL(bank_bit); BIT_ULL 3123 drivers/gpu/drm/amd/display/dc/core/dc_link.c link_bw_kbps = mul_u64_u32_shr(BIT_ULL(32) * 970LL / 1000, BIT_ULL 3185 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c min_fclk_required_by_uclk = mul_u64_u32_shr(BIT_ULL(32) * 1080 / 1000000, uclk_states[i], 32); BIT_ULL 16 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_VSYNC BIT_ULL(0) BIT_ULL 17 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_FLIP BIT_ULL(1) BIT_ULL 18 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_URUN BIT_ULL(2) BIT_ULL 19 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_IBSY BIT_ULL(3) BIT_ULL 20 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_OVR BIT_ULL(4) BIT_ULL 21 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_EOW BIT_ULL(5) BIT_ULL 22 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_EVENT_MODE BIT_ULL(6) BIT_ULL 24 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_TETO BIT_ULL(14) BIT_ULL 25 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_TEMR BIT_ULL(15) BIT_ULL 26 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_TITR BIT_ULL(16) BIT_ULL 27 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_CPE BIT_ULL(17) BIT_ULL 28 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_CFGE BIT_ULL(18) BIT_ULL 29 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_AXIE BIT_ULL(19) BIT_ULL 30 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_ACE0 BIT_ULL(20) BIT_ULL 31 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_ACE1 BIT_ULL(21) BIT_ULL 32 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_ACE2 BIT_ULL(22) BIT_ULL 33 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_ACE3 BIT_ULL(23) BIT_ULL 34 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_DRIFTTO BIT_ULL(24) BIT_ULL 35 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_FRAMETO BIT_ULL(25) BIT_ULL 36 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_CSCE BIT_ULL(26) BIT_ULL 37 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_ZME BIT_ULL(27) BIT_ULL 38 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_MERR BIT_ULL(28) BIT_ULL 39 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_TCF BIT_ULL(29) BIT_ULL 40 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_TTNG BIT_ULL(30) BIT_ULL 41 drivers/gpu/drm/arm/display/komeda/komeda_dev.h #define KOMEDA_ERR_TTF BIT_ULL(31) BIT_ULL 227 drivers/gpu/drm/arm/malidp_crtc.c u32 mag = ((((u64)val) & ~BIT_ULL(63)) >> 20) & BIT_ULL 237 drivers/gpu/drm/arm/malidp_crtc.c if (val & BIT_ULL(63)) BIT_ULL 239 drivers/gpu/drm/arm/malidp_crtc.c if (!!(val & BIT_ULL(63)) != !!(mag & BIT(14))) BIT_ULL 347 drivers/gpu/drm/drm_client_modeset.c const u64 mask = BIT_ULL(connector_count) - 1; BIT_ULL 357 drivers/gpu/drm/drm_client_modeset.c if (conn_configured & BIT_ULL(i)) BIT_ULL 361 drivers/gpu/drm/drm_client_modeset.c conn_configured |= BIT_ULL(i); BIT_ULL 404 drivers/gpu/drm/drm_client_modeset.c conn_configured |= BIT_ULL(i); BIT_ULL 6800 drivers/gpu/drm/i915/display/intel_display.c mask = BIT_ULL(POWER_DOMAIN_PIPE(pipe)); BIT_ULL 6801 drivers/gpu/drm/i915/display/intel_display.c mask |= BIT_ULL(POWER_DOMAIN_TRANSCODER(transcoder)); BIT_ULL 6804 drivers/gpu/drm/i915/display/intel_display.c mask |= BIT_ULL(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe)); BIT_ULL 6810 drivers/gpu/drm/i915/display/intel_display.c mask |= BIT_ULL(intel_encoder->power_domain); BIT_ULL 6814 drivers/gpu/drm/i915/display/intel_display.c mask |= BIT_ULL(POWER_DOMAIN_AUDIO); BIT_ULL 6817 drivers/gpu/drm/i915/display/intel_display.c mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE); BIT_ULL 10282 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(*power_domain_mask & BIT_ULL(power_domain)); BIT_ULL 10289 drivers/gpu/drm/i915/display/intel_display.c *power_domain_mask |= BIT_ULL(power_domain); BIT_ULL 10316 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(*power_domain_mask & BIT_ULL(power_domain)); BIT_ULL 10323 drivers/gpu/drm/i915/display/intel_display.c *power_domain_mask |= BIT_ULL(power_domain); BIT_ULL 10417 drivers/gpu/drm/i915/display/intel_display.c power_domain_mask = BIT_ULL(power_domain); BIT_ULL 10462 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(power_domain_mask & BIT_ULL(power_domain)); BIT_ULL 10467 drivers/gpu/drm/i915/display/intel_display.c power_domain_mask |= BIT_ULL(power_domain); BIT_ULL 232 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain_well_reverse(dev_priv, power_well, BIT_ULL(domain)) { BIT_ULL 1779 drivers/gpu/drm/i915/display/intel_display_power.c power_domains->async_put_domains[0] &= ~BIT_ULL(domain); BIT_ULL 1780 drivers/gpu/drm/i915/display/intel_display_power.c power_domains->async_put_domains[1] &= ~BIT_ULL(domain); BIT_ULL 1790 drivers/gpu/drm/i915/display/intel_display_power.c if (!(async_put_domains_mask(power_domains) & BIT_ULL(domain))) BIT_ULL 1819 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain)) BIT_ULL 1906 drivers/gpu/drm/i915/display/intel_display_power.c WARN(async_put_domains_mask(power_domains) & BIT_ULL(domain), BIT_ULL 1912 drivers/gpu/drm/i915/display/intel_display_power.c for_each_power_domain_well_reverse(dev_priv, power_well, BIT_ULL(domain)) BIT_ULL 2057 drivers/gpu/drm/i915/display/intel_display_power.c power_domains->async_put_domains[1] |= BIT_ULL(domain); BIT_ULL 2059 drivers/gpu/drm/i915/display/intel_display_power.c power_domains->async_put_domains[0] |= BIT_ULL(domain); BIT_ULL 2152 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A) | \ BIT_ULL 2153 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2154 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A_PANEL_FITTER) | \ BIT_ULL 2155 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2156 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2157 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2158 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2161 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_DISPLAY_CORE) | \ BIT_ULL 2162 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A) | \ BIT_ULL 2163 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2164 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A_PANEL_FITTER) | \ BIT_ULL 2165 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2166 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2167 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2168 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2169 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2170 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DSI) | \ BIT_ULL 2171 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_CRT) | \ BIT_ULL 2172 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2173 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2174 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2175 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2176 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GMBUS) | \ BIT_ULL 2177 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2180 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2181 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2182 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_CRT) | \ BIT_ULL 2183 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2184 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2185 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2188 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2189 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2190 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2193 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2194 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2195 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2198 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2199 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2200 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2203 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2204 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2205 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2208 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_DISPLAY_CORE) | \ BIT_ULL 2209 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A) | \ BIT_ULL 2210 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2211 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2212 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A_PANEL_FITTER) | \ BIT_ULL 2213 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2214 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2215 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2216 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2217 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2218 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2219 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2220 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2221 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DSI) | \ BIT_ULL 2222 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2223 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2224 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2225 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2226 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL 2227 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GMBUS) | \ BIT_ULL 2228 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2231 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2232 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2233 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2234 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2235 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2238 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2239 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL 2240 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2243 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2244 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2245 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_A_PANEL_FITTER) | \ BIT_ULL 2246 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2247 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2248 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2249 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2250 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2251 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2252 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2253 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2254 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_CRT) | /* DDI E */ \ BIT_ULL 2255 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2256 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2257 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2260 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2261 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2262 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2263 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2264 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2265 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2266 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2267 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2268 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2269 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2270 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_CRT) | /* DDI E */ \ BIT_ULL 2271 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2272 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2273 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2276 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2277 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2278 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2279 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2280 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2281 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2282 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2283 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2284 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2285 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2286 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ BIT_ULL 2287 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2288 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2289 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL 2290 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2291 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2292 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2294 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_A_IO) | \ BIT_ULL 2295 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO) | \ BIT_ULL 2296 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2298 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO) | \ BIT_ULL 2299 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2301 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO) | \ BIT_ULL 2302 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2304 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) | \ BIT_ULL 2305 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2308 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ BIT_ULL 2309 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL 2310 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2311 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2314 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2315 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2316 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2317 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2318 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2319 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2320 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2321 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2322 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2323 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2324 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2325 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2326 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2327 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2330 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ BIT_ULL 2331 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL 2332 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2333 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GMBUS) | \ BIT_ULL 2334 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2336 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) | \ BIT_ULL 2337 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2338 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2340 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2341 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2342 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2343 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2344 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2347 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2348 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2349 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2350 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2351 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2352 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2353 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2354 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2355 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2356 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2357 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2358 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2359 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2360 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2362 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_A_IO)) BIT_ULL 2364 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO)) BIT_ULL 2366 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO)) BIT_ULL 2368 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) | \ BIT_ULL 2369 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2370 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2372 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2373 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2374 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2376 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2377 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2378 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2380 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2381 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL 2382 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2384 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2385 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2387 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2388 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2391 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ BIT_ULL 2392 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL 2393 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2394 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GMBUS) | \ BIT_ULL 2395 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2398 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2399 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2400 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2401 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2402 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2403 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2404 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2405 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2406 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2407 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2408 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ BIT_ULL 2409 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2410 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2411 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL 2412 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_F) | \ BIT_ULL 2413 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2414 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2415 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2417 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_A_IO) | \ BIT_ULL 2418 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2420 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO) | \ BIT_ULL 2421 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2423 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO) | \ BIT_ULL 2424 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2426 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) | \ BIT_ULL 2427 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2429 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2430 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL 2431 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2433 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2434 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2436 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2437 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2439 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL 2440 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2442 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_F) | \ BIT_ULL 2443 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2445 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \ BIT_ULL 2446 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2449 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ BIT_ULL 2450 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL 2451 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2452 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2469 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2470 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2471 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2475 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2476 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \ BIT_ULL 2477 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2478 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2479 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2480 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL 2481 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL 2482 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ BIT_ULL 2483 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) | \ BIT_ULL 2484 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ BIT_ULL 2485 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL 2486 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL 2487 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D) | \ BIT_ULL 2488 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_E) | \ BIT_ULL 2489 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_F) | \ BIT_ULL 2490 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ BIT_ULL 2491 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ BIT_ULL 2492 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ BIT_ULL 2493 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ BIT_ULL 2494 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2495 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2496 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2503 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_VDSC_PW2) | \ BIT_ULL 2504 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2510 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL 2511 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2512 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_DPLL_DC_OFF) | \ BIT_ULL 2513 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2516 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_A_IO)) BIT_ULL 2518 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO)) BIT_ULL 2520 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO)) BIT_ULL 2522 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO)) BIT_ULL 2524 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO)) BIT_ULL 2526 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) BIT_ULL 2529 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL 2530 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A)) BIT_ULL 2532 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_B)) BIT_ULL 2534 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_C)) BIT_ULL 2536 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_D)) BIT_ULL 2538 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_E)) BIT_ULL 2540 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_F)) BIT_ULL 2542 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT1)) BIT_ULL 2544 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT2)) BIT_ULL 2546 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT3)) BIT_ULL 2548 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT4)) BIT_ULL 2551 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_D) | \ BIT_ULL 2552 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_D) | \ BIT_ULL 2553 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_D_PANEL_FITTER) | \ BIT_ULL 2554 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2558 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C) | \ BIT_ULL 2559 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_C) | \ BIT_ULL 2560 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_C_PANEL_FITTER) | \ BIT_ULL 2561 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2565 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B) | \ BIT_ULL 2566 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_B) | \ BIT_ULL 2567 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) | \ BIT_ULL 2568 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC1_LANES) | \ BIT_ULL 2569 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC2_LANES) | \ BIT_ULL 2570 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC3_LANES) | \ BIT_ULL 2571 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC4_LANES) | \ BIT_ULL 2572 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC5_LANES) | \ BIT_ULL 2573 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC6_LANES) | \ BIT_ULL 2574 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC1) | \ BIT_ULL 2575 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC2) | \ BIT_ULL 2576 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC3) | \ BIT_ULL 2577 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC4) | \ BIT_ULL 2578 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC5) | \ BIT_ULL 2579 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC6) | \ BIT_ULL 2580 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT1) | \ BIT_ULL 2581 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT2) | \ BIT_ULL 2582 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT3) | \ BIT_ULL 2583 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT4) | \ BIT_ULL 2584 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT5) | \ BIT_ULL 2585 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT6) | \ BIT_ULL 2586 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_VGA) | \ BIT_ULL 2587 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUDIO) | \ BIT_ULL 2588 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2592 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_TRANSCODER_VDSC_PW2) | \ BIT_ULL 2593 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2597 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_MODESET) | \ BIT_ULL 2598 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_A) | \ BIT_ULL 2599 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_INIT)) BIT_ULL 2602 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC1_IO)) BIT_ULL 2604 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC2_IO)) BIT_ULL 2606 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC3_IO)) BIT_ULL 2608 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC4_IO)) BIT_ULL 2610 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC5_IO)) BIT_ULL 2612 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_PORT_DDI_TC6_IO)) BIT_ULL 2615 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC1)) BIT_ULL 2617 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC2)) BIT_ULL 2619 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC3)) BIT_ULL 2621 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC4)) BIT_ULL 2623 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC5)) BIT_ULL 2625 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TC6)) BIT_ULL 2627 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT5)) BIT_ULL 2629 drivers/gpu/drm/i915/display/intel_display_power.c BIT_ULL(POWER_DOMAIN_AUX_TBT6)) BIT_ULL 4004 drivers/gpu/drm/i915/display/intel_display_power.c WARN_ON(power_well_ids & BIT_ULL(id)); BIT_ULL 4005 drivers/gpu/drm/i915/display/intel_display_power.c power_well_ids |= BIT_ULL(id); BIT_ULL 234 drivers/gpu/drm/i915/display/intel_display_power.h for_each_if(BIT_ULL(domain) & (mask)) BIT_ULL 1613 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c min_t(u64, BIT_ULL(31), size - copied); BIT_ULL 26 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c return (offset & BIT_ULL(bit)) >> (bit - 6); BIT_ULL 167 drivers/gpu/drm/i915/gt/intel_lrc.c #define CTX_DESC_FORCE_RESTORE BIT_ULL(2) BIT_ULL 93 drivers/gpu/drm/i915/gt/intel_timeline.c hwsp->free_bitmap &= ~BIT_ULL(*cacheline); BIT_ULL 115 drivers/gpu/drm/i915/gt/intel_timeline.c hwsp->free_bitmap |= BIT_ULL(cacheline); BIT_ULL 216 drivers/gpu/drm/i915/gt/selftest_timeline.c u64 ctx = BIT_ULL(order) + offset; BIT_ULL 229 drivers/gpu/drm/i915/gt/selftest_timeline.c u64 ctx = BIT_ULL(order) + offset; BIT_ULL 1025 drivers/gpu/drm/i915/i915_gem_gtt.c GEM_BUG_ON(!IS_ALIGNED(start, BIT_ULL(GEN8_PTE_SHIFT))); BIT_ULL 1026 drivers/gpu/drm/i915/i915_gem_gtt.c GEM_BUG_ON(!IS_ALIGNED(length, BIT_ULL(GEN8_PTE_SHIFT))); BIT_ULL 1139 drivers/gpu/drm/i915/i915_gem_gtt.c GEM_BUG_ON(!IS_ALIGNED(start, BIT_ULL(GEN8_PTE_SHIFT))); BIT_ULL 1140 drivers/gpu/drm/i915/i915_gem_gtt.c GEM_BUG_ON(!IS_ALIGNED(length, BIT_ULL(GEN8_PTE_SHIFT))); BIT_ULL 1437 drivers/gpu/drm/i915/i915_gem_gtt.c ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); BIT_ULL 52 drivers/gpu/drm/i915/i915_gem_gtt.h #define I915_GTT_PAGE_SIZE_4K BIT_ULL(12) BIT_ULL 53 drivers/gpu/drm/i915/i915_gem_gtt.h #define I915_GTT_PAGE_SIZE_64K BIT_ULL(16) BIT_ULL 54 drivers/gpu/drm/i915/i915_gem_gtt.h #define I915_GTT_PAGE_SIZE_2M BIT_ULL(21) BIT_ULL 603 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_NOEVICT BIT_ULL(0) BIT_ULL 604 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_NOSEARCH BIT_ULL(1) BIT_ULL 605 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_NONBLOCK BIT_ULL(2) BIT_ULL 606 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_MAPPABLE BIT_ULL(3) BIT_ULL 607 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_ZONE_4G BIT_ULL(4) BIT_ULL 608 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_HIGH BIT_ULL(5) BIT_ULL 609 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_OFFSET_BIAS BIT_ULL(6) BIT_ULL 610 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_OFFSET_FIXED BIT_ULL(7) BIT_ULL 612 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_MBZ BIT_ULL(8) /* I915_VMA_PIN_OVERFLOW */ BIT_ULL 613 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_GLOBAL BIT_ULL(9) /* I915_VMA_GLOBAL_BIND */ BIT_ULL 614 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_USER BIT_ULL(10) /* I915_VMA_LOCAL_BIND */ BIT_ULL 615 drivers/gpu/drm/i915/i915_gem_gtt.h #define PIN_UPDATE BIT_ULL(11) BIT_ULL 67 drivers/gpu/drm/i915/i915_pmu.c return BIT_ULL(config_enabled_bit(config)); BIT_ULL 606 drivers/gpu/drm/i915/i915_pmu.c pmu->enable |= BIT_ULL(bit); BIT_ULL 685 drivers/gpu/drm/i915/i915_pmu.c pmu->enable &= ~BIT_ULL(bit); BIT_ULL 10010 drivers/gpu/drm/i915/intel_pm.c overflow_hw = BIT_ULL(40); BIT_ULL 10022 drivers/gpu/drm/i915/intel_pm.c overflow_hw = BIT_ULL(32); BIT_ULL 291 drivers/gpu/drm/i915/selftests/i915_buddy.c ms = BIT_ULL(12 + (prandom_u32_state(&prng) % ilog2(s >> 12))); BIT_ULL 252 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(count * BIT_ULL(size) > vm->total); BIT_ULL 253 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(hole_start + count * BIT_ULL(size) > hole_end); BIT_ULL 261 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, BIT_ULL(size)); BIT_ULL 267 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(obj->base.size != BIT_ULL(size)); BIT_ULL 276 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c u64 addr = hole_start + order[n] * BIT_ULL(size); BIT_ULL 279 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(addr + BIT_ULL(size) > vm->total); BIT_ULL 289 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c vm->allocate_va_range(vm, addr, BIT_ULL(size))) BIT_ULL 293 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c mock_vma.node.size = BIT_ULL(size); BIT_ULL 304 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c u64 addr = hole_start + order[n] * BIT_ULL(size); BIT_ULL 306 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(addr + BIT_ULL(size) > vm->total); BIT_ULL 307 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c vm->clear_range(vm, addr, BIT_ULL(size)); BIT_ULL 667 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c u64 step = BIT_ULL(pot); BIT_ULL 760 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c obj = fake_dma_object(i915, BIT_ULL(size)); BIT_ULL 772 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c GEM_BUG_ON(vma->size != BIT_ULL(size)); BIT_ULL 775 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c u64 addr = hole_start + order[n] * BIT_ULL(size); BIT_ULL 781 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c addr, BIT_ULL(size), BIT_ULL 790 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c __func__, addr, BIT_ULL(size)); BIT_ULL 839 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c u64 size = BIT_ULL(order++); BIT_ULL 297 drivers/gpu/drm/i915/selftests/i915_syncmap.c u64 context = BIT_ULL(order); BIT_ULL 346 drivers/gpu/drm/i915/selftests/i915_syncmap.c u64 context = step * BIT_ULL(order); BIT_ULL 363 drivers/gpu/drm/i915/selftests/i915_syncmap.c u64 context = step * BIT_ULL(order); BIT_ULL 385 drivers/gpu/drm/i915/selftests/i915_syncmap.c u64 context = step * BIT_ULL(order); BIT_ULL 469 drivers/gpu/drm/i915/selftests/i915_syncmap.c u64 context = idx * BIT_ULL(order) + idx; BIT_ULL 90 drivers/gpu/drm/nouveau/dispnv50/base907c.c bool sign = in & BIT_ULL(63); BIT_ULL 61 drivers/gpu/drm/nouveau/nvif/fifo.c if (a->v.runlists.data & BIT_ULL(i)) BIT_ULL 94 drivers/gpu/drm/nouveau/nvif/fifo.c runm |= BIT_ULL(i); BIT_ULL 74 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c args->data |= BIT_ULL(_i); \ BIT_ULL 159 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c for (todo = mask; engn = __ffs64(todo), todo; todo &= ~BIT_ULL(engn)) BIT_ULL 163 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c for (todo = mask; engn = __ffs64(todo), todo; todo &= ~BIT_ULL(engn)) { BIT_ULL 891 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c *data |= BIT_ULL(engine->subdev.index); BIT_ULL 256 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c *runlists = BIT_ULL(runlist); BIT_ULL 261 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c subdevs |= BIT_ULL(fifo->engine[i].engine->subdev.index); BIT_ULL 264 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c if (subdevs & BIT_ULL(NVKM_ENGINE_GR)) BIT_ULL 265 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c subdevs |= BIT_ULL(NVKM_ENGINE_SW); BIT_ULL 139 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c *runlists = BIT_ULL(runlist); BIT_ULL 144 drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogv100.c subdevs |= BIT_ULL(fifo->engine[i].engine->subdev.index); BIT_ULL 96 drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c subdevs &= ~BIT_ULL(subidx); BIT_ULL 42 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c data |= BIT_ULL(60); BIT_ULL 117 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c data |= BIT_ULL(35); /* VOL */ BIT_ULL 131 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c data |= BIT_ULL(34); /* VOL */ BIT_ULL 348 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c base |= BIT_ULL(2) /* VOL. */; BIT_ULL 29 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk104.c VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(1) /* PRIV. */, ptes); BIT_ULL 32 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(32) /* VOL. */, ptes); BIT_ULL 57 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c VMM_FO064(pt, vmm, pdei * 8, BIT_ULL(35) /* VOL_BIG. */, pdes); BIT_ULL 99 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c base |= BIT_ULL(11); BIT_ULL 64 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c if ((data & BIT_ULL(0)) && (data & (3ULL << 1)) != 0) { BIT_ULL 65 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c VMM_WO064(pt, vmm, ptei * 8, data & ~BIT_ULL(0)); BIT_ULL 85 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c data |= BIT_ULL(6); /* RO. */ BIT_ULL 94 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c data |= BIT_ULL(3); /* VOL. */ BIT_ULL 95 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c data |= BIT_ULL(0); /* VALID. */ BIT_ULL 99 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c data |= BIT_ULL(0); /* VALID. */ BIT_ULL 160 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(3) /* VOL. */, ptes); BIT_ULL 180 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(5) /* PRIV. */, ptes); BIT_ULL 218 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c *data |= BIT_ULL(3); /* VOL. */ BIT_ULL 251 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c VMM_FO128(pt, vmm, pdei * 0x10, BIT_ULL(3) /* VOL_BIG. */, 0ULL, pdes); BIT_ULL 479 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c u64 base = BIT_ULL(10) /* VER2 */ | BIT_ULL(11) /* 64KiB */; BIT_ULL 481 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c base |= BIT_ULL(4); /* FAULT_REPLAY_TEX */ BIT_ULL 482 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c base |= BIT_ULL(5); /* FAULT_REPLAY_GCC */ BIT_ULL 41 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c mask = BIT_ULL(0); BIT_ULL 46 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.c if (mask & BIT_ULL(i)) { BIT_ULL 103 drivers/gpu/drm/nouveau/nvkm/subdev/top/base.c subdevs |= BIT_ULL(info->index); BIT_ULL 45 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 46 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 47 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 48 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_V4)) BIT_ULL 51 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 52 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 53 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 54 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 55 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_V4)) BIT_ULL 58 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 59 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 60 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 61 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OPTIMIZED_COVERAGE_MASK) | \ BIT_ULL 62 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 63 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 64 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4) | \ BIT_ULL 65 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 66 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_V4)) BIT_ULL 70 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 71 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 72 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 73 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 74 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 75 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 76 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 77 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 78 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 79 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 80 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 81 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 82 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 83 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 84 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT)) BIT_ULL 88 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 89 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 90 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 91 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 92 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 93 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 94 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 95 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 96 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 97 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 98 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 99 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 100 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 101 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 102 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 103 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 104 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT)) BIT_ULL 109 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 110 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 111 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 112 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 113 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 114 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 115 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 116 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 117 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 118 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 119 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 120 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 121 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 122 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 123 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 124 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 125 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 126 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT)) BIT_ULL 129 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 130 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 131 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 132 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 133 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 134 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 135 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 136 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 137 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 138 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 139 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 140 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 141 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 142 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 143 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 144 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 145 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 146 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT)) BIT_ULL 149 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 150 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 151 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 152 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 153 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 154 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 155 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 156 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 157 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 158 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 159 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 160 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 161 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 162 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 163 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 164 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 165 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 166 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 167 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 168 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ BIT_ULL 169 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ BIT_ULL 170 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_COHERENCY_REG)) BIT_ULL 173 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 174 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 175 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 176 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 177 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 178 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 179 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 180 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 181 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 182 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 183 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 184 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 185 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 186 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 187 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 188 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 189 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 190 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 191 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 192 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ BIT_ULL 193 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ BIT_ULL 194 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ BIT_ULL 195 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_COHERENCY_REG)) BIT_ULL 198 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 199 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 200 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 201 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 202 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 203 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 204 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 205 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 206 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 207 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 208 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 209 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 210 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 211 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 212 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 213 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 214 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 215 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 216 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 217 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ BIT_ULL 218 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ BIT_ULL 219 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ BIT_ULL 220 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_COHERENCY_REG)) BIT_ULL 223 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 224 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 225 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 226 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 227 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 228 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 229 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 230 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 231 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 232 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 233 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 234 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 235 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 236 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 237 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 238 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 239 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 240 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 241 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 242 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ BIT_ULL 243 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ BIT_ULL 244 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ BIT_ULL 245 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_COHERENCY_REG)) BIT_ULL 248 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 249 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 250 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 251 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 252 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 253 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 254 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 255 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 256 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 257 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 258 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 259 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 260 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 261 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 262 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 263 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 264 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 265 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 266 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 267 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ BIT_ULL 268 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ BIT_ULL 269 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ BIT_ULL 270 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_COHERENCY_REG) | \ BIT_ULL 271 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_AARCH64_MMU) | \ BIT_ULL 272 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TLS_HASHING) | \ BIT_ULL 273 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) BIT_ULL 276 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ BIT_ULL 277 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ BIT_ULL 278 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_XAFFINITY) | \ BIT_ULL 279 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_WARPING) | \ BIT_ULL 280 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_INTERPIPE_REG_ALIASING) | \ BIT_ULL 281 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_32_BIT_UNIFORM_ADDRESS) | \ BIT_ULL 282 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL) | \ BIT_ULL 283 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_CC) | \ BIT_ULL 284 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_BRNDOUT_KILL) | \ BIT_ULL 285 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_LEA_TEX) | \ BIT_ULL 286 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LD_ST_TILEBUFFER) | \ BIT_ULL 287 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_LINEAR_FILTER_FLOAT) | \ BIT_ULL 288 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MRT) | \ BIT_ULL 289 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_MSAA_16X) | \ BIT_ULL 290 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_NEXT_INSTRUCTION_TYPE) | \ BIT_ULL 291 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_OUT_OF_ORDER_EXEC) | \ BIT_ULL 292 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_T7XX_PAIRING_RULES) | \ BIT_ULL 293 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TEST4_DATUM_MODE) | \ BIT_ULL 294 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \ BIT_ULL 295 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ BIT_ULL 296 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ BIT_ULL 297 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ BIT_ULL 298 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_COHERENCY_REG) | \ BIT_ULL 299 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_AARCH64_MMU) | \ BIT_ULL 300 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_TLS_HASHING) | \ BIT_ULL 301 drivers/gpu/drm/panfrost/panfrost_features.h BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) BIT_ULL 51 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_9435)) BIT_ULL 54 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_6367) | \ BIT_ULL 55 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_6787) | \ BIT_ULL 56 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8408) | \ BIT_ULL 57 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_9510) | \ BIT_ULL 58 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10649) | \ BIT_ULL 59 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10676) | \ BIT_ULL 60 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 61 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11020) | \ BIT_ULL 62 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11035) | \ BIT_ULL 63 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11056) | \ BIT_ULL 64 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 67 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8186) | \ BIT_ULL 68 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8245) | \ BIT_ULL 69 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8316) | \ BIT_ULL 70 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8394) | \ BIT_ULL 71 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8401) | \ BIT_ULL 72 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8443) | \ BIT_ULL 73 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_8987) | \ BIT_ULL 74 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_9630) | \ BIT_ULL 75 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10969) | \ BIT_ULL 76 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(GPUCORE_1619)) BIT_ULL 79 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10649) | \ BIT_ULL 80 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 81 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10959) | \ BIT_ULL 82 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11056) | \ BIT_ULL 83 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 86 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10327) | \ BIT_ULL 87 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10676) | \ BIT_ULL 88 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10817) | \ BIT_ULL 89 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11020) | \ BIT_ULL 90 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11024) | \ BIT_ULL 91 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11035)) BIT_ULL 94 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11020) | \ BIT_ULL 95 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11024)) BIT_ULL 98 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10649) | \ BIT_ULL 99 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10797) | \ BIT_ULL 100 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 101 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11056) | \ BIT_ULL 102 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 105 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 106 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3953) | \ BIT_ULL 107 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 110 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11020) | \ BIT_ULL 111 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11024) | \ BIT_ULL 112 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3542)) BIT_ULL 115 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11020) | \ BIT_ULL 116 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11024) | \ BIT_ULL 117 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3542)) BIT_ULL 120 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3542)) BIT_ULL 123 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11020) | \ BIT_ULL 124 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_11024) | \ BIT_ULL 125 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3542)) BIT_ULL 128 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3542)) BIT_ULL 131 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 132 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3953) | \ BIT_ULL 133 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 136 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 137 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3953) | \ BIT_ULL 138 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 141 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 142 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3953) | \ BIT_ULL 143 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 146 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_10883) | \ BIT_ULL 147 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3953) | \ BIT_ULL 148 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 153 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TGOX_R1_1234)) BIT_ULL 160 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8463) | \ BIT_ULL 161 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_TMIX_8438)) BIT_ULL 164 drivers/gpu/drm/panfrost/panfrost_issues.h BIT_ULL(HW_ISSUE_T76X_3953)) BIT_ULL 505 drivers/gpu/drm/selftests/test-drm_mm.c u64 size = BIT_ULL(n); BIT_ULL 709 drivers/gpu/drm/selftests/test-drm_mm.c u64 size = BIT_ULL(n); BIT_ULL 742 drivers/gpu/drm/selftests/test-drm_mm.c u64 size = BIT_ULL(n); BIT_ULL 1003 drivers/gpu/drm/selftests/test-drm_mm.c const u64 size = BIT_ULL(n); BIT_ULL 1110 drivers/gpu/drm/selftests/test-drm_mm.c align = BIT_ULL(bit); BIT_ULL 1111 drivers/gpu/drm/selftests/test-drm_mm.c size = BIT_ULL(bit-1) + 1; BIT_ULL 100 drivers/gpu/drm/vc4/vc4_kms.c r = in & BIT_ULL(63) ? BIT(9) : 0; BIT_ULL 396 drivers/gpu/drm/vc4/vc4_kms.c val &= ~BIT_ULL(63); BIT_ULL 397 drivers/gpu/drm/vc4/vc4_kms.c if (val > BIT_ULL(32)) BIT_ULL 90 drivers/hid/hid-logitech-dj.c #define HIDPP BIT_ULL(63) BIT_ULL 558 drivers/i2c/busses/i2c-mt65xx.c return (addr & BIT_ULL(32)) ? I2C_DMA_4G_MODE : I2C_DMA_CLR_FLAG; BIT_ULL 12 drivers/i2c/busses/i2c-octeon-core.h #define SW_TWSI_V BIT_ULL(63) /* Valid bit */ BIT_ULL 13 drivers/i2c/busses/i2c-octeon-core.h #define SW_TWSI_EIA BIT_ULL(61) /* Extended internal address */ BIT_ULL 14 drivers/i2c/busses/i2c-octeon-core.h #define SW_TWSI_R BIT_ULL(56) /* Result or read bit */ BIT_ULL 15 drivers/i2c/busses/i2c-octeon-core.h #define SW_TWSI_SOVR BIT_ULL(55) /* Size override */ BIT_ULL 77 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_ST_INT BIT_ULL(0) BIT_ULL 78 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_TS_INT BIT_ULL(1) BIT_ULL 79 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_CORE_INT BIT_ULL(2) BIT_ULL 80 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_ST_EN BIT_ULL(4) BIT_ULL 81 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_TS_EN BIT_ULL(5) BIT_ULL 82 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_CORE_EN BIT_ULL(6) BIT_ULL 83 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_SDA_OVR BIT_ULL(8) BIT_ULL 84 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_SCL_OVR BIT_ULL(9) BIT_ULL 85 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_SDA BIT_ULL(10) BIT_ULL 86 drivers/i2c/busses/i2c-octeon-core.h #define TWSI_INT_SCL BIT_ULL(11) BIT_ULL 180 drivers/infiniband/core/umem.c return BIT_ULL(best_pg_bit); BIT_ULL 84 drivers/infiniband/core/uverbs_uapi.c BIT_ULL(def->write.command_num)); BIT_ULL 87 drivers/infiniband/core/uverbs_uapi.c BIT_ULL(def->write.command_num)); BIT_ULL 2848 drivers/infiniband/core/verbs.c block_offset = biter->__dma_addr & (BIT_ULL(biter->__pg_bit) - 1); BIT_ULL 2849 drivers/infiniband/core/verbs.c biter->__sg_advance += BIT_ULL(biter->__pg_bit) - block_offset; BIT_ULL 59 drivers/infiniband/hw/bnxt_re/bnxt_re.h #define BNXT_RE_MAX_MR_SIZE_LOW BIT_ULL(BNXT_RE_PAGE_SHIFT_1G) BIT_ULL 60 drivers/infiniband/hw/bnxt_re/bnxt_re.h #define BNXT_RE_MAX_MR_SIZE_HIGH BIT_ULL(39) BIT_ULL 3491 drivers/infiniband/hw/bnxt_re/ib_verbs.c u64 page_size = BIT_ULL(page_shift); BIT_ULL 5251 drivers/infiniband/hw/hfi1/chip.c return !(mask & BIT_ULL(bit)); BIT_ULL 13108 drivers/infiniband/hw/hfi1/chip.c bits |= BIT_ULL(bit); BIT_ULL 93 drivers/infiniband/hw/hfi1/chip.h #define PBC_INTR BIT_ULL(31) BIT_ULL 95 drivers/infiniband/hw/hfi1/chip.h #define PBC_DC_INFO BIT_ULL(PBC_DC_INFO_SHIFT) BIT_ULL 96 drivers/infiniband/hw/hfi1/chip.h #define PBC_TEST_EBP BIT_ULL(29) BIT_ULL 97 drivers/infiniband/hw/hfi1/chip.h #define PBC_PACKET_BYPASS BIT_ULL(28) BIT_ULL 98 drivers/infiniband/hw/hfi1/chip.h #define PBC_CREDIT_RETURN BIT_ULL(25) BIT_ULL 99 drivers/infiniband/hw/hfi1/chip.h #define PBC_INSERT_BYPASS_ICRC BIT_ULL(24) BIT_ULL 100 drivers/infiniband/hw/hfi1/chip.h #define PBC_TEST_BAD_ICRC BIT_ULL(23) BIT_ULL 101 drivers/infiniband/hw/hfi1/chip.h #define PBC_FECN BIT_ULL(22) BIT_ULL 100 drivers/infiniband/hw/hfi1/chip_registers.h #define DCC_CFG_RESET_RESET_LCB BIT_ULL(0) BIT_ULL 101 drivers/infiniband/hw/hfi1/chip_registers.h #define DCC_CFG_RESET_RESET_TX_FPE BIT_ULL(1) BIT_ULL 102 drivers/infiniband/hw/hfi1/chip_registers.h #define DCC_CFG_RESET_RESET_RX_FPE BIT_ULL(2) BIT_ULL 103 drivers/infiniband/hw/hfi1/chip_registers.h #define DCC_CFG_RESET_RESET_8051 BIT_ULL(3) BIT_ULL 104 drivers/infiniband/hw/hfi1/chip_registers.h #define DCC_CFG_RESET_ENABLE_CCLK_BCC BIT_ULL(4) BIT_ULL 1080 drivers/infiniband/hw/hfi1/debugfs.c #define EXPROM_WRITE_ENABLE BIT_ULL(14) BIT_ULL 94 drivers/infiniband/hw/hfi1/pio.c mask |= BIT_ULL(i); BIT_ULL 97 drivers/infiniband/hw/hfi1/sdma.h #define SDMA_DESC0_FIRST_DESC_FLAG BIT_ULL(63) BIT_ULL 98 drivers/infiniband/hw/hfi1/sdma.h #define SDMA_DESC0_LAST_DESC_FLAG BIT_ULL(62) BIT_ULL 142 drivers/infiniband/hw/hfi1/sdma.h #define SDMA_DESC1_INT_REQ_FLAG BIT_ULL(1) BIT_ULL 143 drivers/infiniband/hw/hfi1/sdma.h #define SDMA_DESC1_HEAD_TO_HOST_FLAG BIT_ULL(0) BIT_ULL 30 drivers/infiniband/hw/hfi1/tid_rdma.c #define RCV_TID_FLOW_TABLE_CTRL_FLOW_VALID_SMASK BIT_ULL(32) BIT_ULL 31 drivers/infiniband/hw/hfi1/tid_rdma.c #define RCV_TID_FLOW_TABLE_CTRL_HDR_SUPP_EN_SMASK BIT_ULL(33) BIT_ULL 32 drivers/infiniband/hw/hfi1/tid_rdma.c #define RCV_TID_FLOW_TABLE_CTRL_KEEP_AFTER_SEQ_ERR_SMASK BIT_ULL(34) BIT_ULL 33 drivers/infiniband/hw/hfi1/tid_rdma.c #define RCV_TID_FLOW_TABLE_CTRL_KEEP_ON_GEN_ERR_SMASK BIT_ULL(35) BIT_ULL 34 drivers/infiniband/hw/hfi1/tid_rdma.c #define RCV_TID_FLOW_TABLE_STATUS_SEQ_MISMATCH_SMASK BIT_ULL(37) BIT_ULL 35 drivers/infiniband/hw/hfi1/tid_rdma.c #define RCV_TID_FLOW_TABLE_STATUS_GEN_MISMATCH_SMASK BIT_ULL(38) BIT_ULL 88 drivers/infiniband/hw/mlx5/odp.c #define MLX5_IMR_MTT_ENTRIES BIT_ULL(MLX5_IMR_MTT_BITS) BIT_ULL 89 drivers/infiniband/hw/mlx5/odp.c #define MLX5_IMR_MTT_SIZE BIT_ULL(MLX5_IMR_MTT_SHIFT) BIT_ULL 344 drivers/infiniband/hw/mlx5/odp.c dev->odp_max_size = BIT_ULL(MLX5_MAX_UMR_SHIFT + PAGE_SHIFT); BIT_ULL 1619 drivers/infiniband/hw/mlx5/odp.c mlx5_imr_ksm_entries = BIT_ULL(get_order(TASK_SIZE) - BIT_ULL 1177 drivers/infiniband/sw/rxe/rxe_verbs.c dev->uverbs_cmd_mask = BIT_ULL(IB_USER_VERBS_CMD_GET_CONTEXT) BIT_ULL 1178 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) BIT_ULL 1179 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_QUERY_DEVICE) BIT_ULL 1180 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_QUERY_PORT) BIT_ULL 1181 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_ALLOC_PD) BIT_ULL 1182 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DEALLOC_PD) BIT_ULL 1183 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_CREATE_SRQ) BIT_ULL 1184 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_MODIFY_SRQ) BIT_ULL 1185 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_QUERY_SRQ) BIT_ULL 1186 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_SRQ) BIT_ULL 1187 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_POST_SRQ_RECV) BIT_ULL 1188 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_CREATE_QP) BIT_ULL 1189 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_MODIFY_QP) BIT_ULL 1190 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_QUERY_QP) BIT_ULL 1191 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_QP) BIT_ULL 1192 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_POST_SEND) BIT_ULL 1193 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_POST_RECV) BIT_ULL 1194 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_CREATE_CQ) BIT_ULL 1195 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_RESIZE_CQ) BIT_ULL 1196 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_CQ) BIT_ULL 1197 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_POLL_CQ) BIT_ULL 1198 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_PEEK_CQ) BIT_ULL 1199 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) BIT_ULL 1200 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_REG_MR) BIT_ULL 1201 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DEREG_MR) BIT_ULL 1202 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_CREATE_AH) BIT_ULL 1203 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_MODIFY_AH) BIT_ULL 1204 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_QUERY_AH) BIT_ULL 1205 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_AH) BIT_ULL 1206 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_ATTACH_MCAST) BIT_ULL 1207 drivers/infiniband/sw/rxe/rxe_verbs.c | BIT_ULL(IB_USER_VERBS_CMD_DETACH_MCAST) BIT_ULL 792 drivers/iommu/amd_iommu_init.c (BIT_ULL(52)-1)) & ~7ULL; BIT_ULL 195 drivers/iommu/io-pgtable-arm-v7s.c if (paddr & BIT_ULL(32)) BIT_ULL 197 drivers/iommu/io-pgtable-arm-v7s.c if (paddr & BIT_ULL(33)) BIT_ULL 220 drivers/iommu/io-pgtable-arm-v7s.c paddr |= BIT_ULL(32); BIT_ULL 222 drivers/iommu/io-pgtable-arm-v7s.c paddr |= BIT_ULL(33); BIT_ULL 439 drivers/iommu/mtk_iommu.c paddr |= BIT_ULL(32); BIT_ULL 492 drivers/iommu/mtk_iommu.c pa &= ~BIT_ULL(32); BIT_ULL 684 drivers/iommu/mtk_iommu.c data->enable_4GB = !!(max_pfn > (BIT_ULL(32) >> PAGE_SHIFT)); BIT_ULL 143 drivers/media/pci/ddbridge/ddbridge-regs.h #define LNB_BUSY BIT_ULL(4) BIT_ULL 144 drivers/media/pci/ddbridge/ddbridge-regs.h #define LNB_TONE BIT_ULL(15) BIT_ULL 60 drivers/media/rc/imon_raw.c bit = fls64(data & (BIT_ULL(offset) - 1)); BIT_ULL 78 drivers/media/rc/imon_raw.c bit = fls64(~data & (BIT_ULL(offset) - 1)); BIT_ULL 326 drivers/media/rc/rc-ir-raw.c i = BIT_ULL(n - 1); BIT_ULL 596 drivers/media/rc/rc-ir-raw.c u64 mask = BIT_ULL(protocol); BIT_ULL 1754 drivers/media/rc/rc-main.c rc_proto = BIT_ULL(rc_map->rc_proto); BIT_ULL 64 drivers/misc/mic/scif/scif_rma.h #define SCIF_REMOTE_FENCE BIT_ULL(SCIF_REMOTE_FENCE_BIT) BIT_ULL 114 drivers/misc/mic/vop/vop_main.c features |= BIT_ULL(i); BIT_ULL 121 drivers/mmc/host/cavium-thunderx.c writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host)); BIT_ULL 396 drivers/mmc/host/cavium.c writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); BIT_ULL 614 drivers/mmc/host/cavium.c writeq(BIT_ULL(16), host->dma_base + MIO_EMM_DMA_FIFO_CFG(host)); BIT_ULL 120 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CFG_CLR BIT_ULL(16) BIT_ULL 124 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD_RW BIT_ULL(62) BIT_ULL 125 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD_INTDIS BIT_ULL(60) BIT_ULL 126 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD_SWAP32 BIT_ULL(59) BIT_ULL 127 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD_SWAP16 BIT_ULL(58) BIT_ULL 128 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD_SWAP8 BIT_ULL(57) BIT_ULL 129 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_FIFO_CMD_ENDIAN BIT_ULL(56) BIT_ULL 132 drivers/mmc/host/cavium.h #define MIO_EMM_CMD_SKIP_BUSY BIT_ULL(62) BIT_ULL 134 drivers/mmc/host/cavium.h #define MIO_EMM_CMD_VAL BIT_ULL(59) BIT_ULL 135 drivers/mmc/host/cavium.h #define MIO_EMM_CMD_DBUF BIT_ULL(55) BIT_ULL 142 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_SKIP_BUSY BIT_ULL(62) BIT_ULL 144 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_VAL BIT_ULL(59) BIT_ULL 145 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_SECTOR BIT_ULL(58) BIT_ULL 146 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_DAT_NULL BIT_ULL(57) BIT_ULL 148 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_REL_WR BIT_ULL(50) BIT_ULL 149 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_RW BIT_ULL(49) BIT_ULL 150 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_MULTI BIT_ULL(48) BIT_ULL 154 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_EN BIT_ULL(63) BIT_ULL 155 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_RW BIT_ULL(62) BIT_ULL 156 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_CLR BIT_ULL(61) BIT_ULL 157 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_SWAP32 BIT_ULL(59) BIT_ULL 158 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_SWAP16 BIT_ULL(58) BIT_ULL 159 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_SWAP8 BIT_ULL(57) BIT_ULL 160 drivers/mmc/host/cavium.h #define MIO_EMM_DMA_CFG_ENDIAN BIT_ULL(56) BIT_ULL 164 drivers/mmc/host/cavium.h #define MIO_EMM_INT_SWITCH_ERR BIT_ULL(6) BIT_ULL 165 drivers/mmc/host/cavium.h #define MIO_EMM_INT_SWITCH_DONE BIT_ULL(5) BIT_ULL 166 drivers/mmc/host/cavium.h #define MIO_EMM_INT_DMA_ERR BIT_ULL(4) BIT_ULL 167 drivers/mmc/host/cavium.h #define MIO_EMM_INT_CMD_ERR BIT_ULL(3) BIT_ULL 168 drivers/mmc/host/cavium.h #define MIO_EMM_INT_DMA_DONE BIT_ULL(2) BIT_ULL 169 drivers/mmc/host/cavium.h #define MIO_EMM_INT_CMD_DONE BIT_ULL(1) BIT_ULL 170 drivers/mmc/host/cavium.h #define MIO_EMM_INT_BUF_DONE BIT_ULL(0) BIT_ULL 173 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_CMD_VAL BIT_ULL(59) BIT_ULL 174 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_SWITCH_VAL BIT_ULL(58) BIT_ULL 175 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_DMA_VAL BIT_ULL(57) BIT_ULL 176 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_DMA_PEND BIT_ULL(56) BIT_ULL 177 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_DBUF_ERR BIT_ULL(28) BIT_ULL 178 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_DBUF BIT_ULL(23) BIT_ULL 179 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_BLK_TIMEOUT BIT_ULL(22) BIT_ULL 180 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_BLK_CRC_ERR BIT_ULL(21) BIT_ULL 181 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_RSP_BUSYBIT BIT_ULL(20) BIT_ULL 182 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_STP_TIMEOUT BIT_ULL(19) BIT_ULL 183 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_STP_CRC_ERR BIT_ULL(18) BIT_ULL 184 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_STP_BAD_STS BIT_ULL(17) BIT_ULL 185 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_STP_VAL BIT_ULL(16) BIT_ULL 186 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_RSP_TIMEOUT BIT_ULL(15) BIT_ULL 187 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_RSP_CRC_ERR BIT_ULL(14) BIT_ULL 188 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_RSP_BAD_STS BIT_ULL(13) BIT_ULL 189 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_RSP_VAL BIT_ULL(12) BIT_ULL 193 drivers/mmc/host/cavium.h #define MIO_EMM_RSP_STS_CMD_DONE BIT_ULL(0) BIT_ULL 199 drivers/mmc/host/cavium.h #define MIO_EMM_SWITCH_EXE BIT_ULL(59) BIT_ULL 200 drivers/mmc/host/cavium.h #define MIO_EMM_SWITCH_ERR0 BIT_ULL(58) BIT_ULL 201 drivers/mmc/host/cavium.h #define MIO_EMM_SWITCH_ERR1 BIT_ULL(57) BIT_ULL 202 drivers/mmc/host/cavium.h #define MIO_EMM_SWITCH_ERR2 BIT_ULL(56) BIT_ULL 203 drivers/mmc/host/cavium.h #define MIO_EMM_SWITCH_HS_TIMING BIT_ULL(48) BIT_ULL 214 drivers/net/can/rx-offload.c if (!(pending & BIT_ULL(i))) BIT_ULL 801 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c if (oct->io_qmask.iq64B & BIT_ULL(q_no - srn)) { BIT_ULL 810 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c if (oct->io_qmask.iq & BIT_ULL(q_no - srn)) { BIT_ULL 856 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c if (oct->io_qmask.oq & BIT_ULL(q_no - srn)) { BIT_ULL 895 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c while (!(READ_ONCE(d64) & BIT_ULL(q_no)) && loop--) { BIT_ULL 919 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c while (!(READ_ONCE(d64) & BIT_ULL(q_no)) && loop--) { BIT_ULL 995 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c if (mbox_int_val & BIT_ULL(q_no)) { BIT_ULL 996 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c writeq(BIT_ULL(q_no), BIT_ULL 1442 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vfidx)) { BIT_ULL 137 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_PKT_MAC_CTL_RINFO_TRS BIT_ULL(16) BIT_ULL 186 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_PKT_INPUT_CTL_VF_NUM BIT_ULL(32) BIT_ULL 233 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_IN_DONE_CNTS_PI_INT BIT_ULL(62) BIT_ULL 234 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_IN_DONE_CNTS_CINT_ENB BIT_ULL(48) BIT_ULL 389 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_MSIX_ENTRY_VECTOR_CTL BIT_ULL(32) BIT_ULL 425 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_PO_INT BIT_ULL(63) BIT_ULL 426 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_PI_INT BIT_ULL(62) BIT_ULL 427 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_MBOX_INT BIT_ULL(61) BIT_ULL 428 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_RESEND BIT_ULL(60) BIT_ULL 430 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_CINT_ENB BIT_ULL(48) BIT_ULL 451 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMA0_FORCE BIT_ULL(32) BIT_ULL 452 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMA1_FORCE BIT_ULL(33) BIT_ULL 454 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMA0_COUNT BIT_ULL(34) BIT_ULL 455 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMA1_COUNT BIT_ULL(35) BIT_ULL 457 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMA0_TIME BIT_ULL(36) BIT_ULL 458 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMA1_TIME BIT_ULL(37) BIT_ULL 462 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_VF_MBOX BIT_ULL(57) BIT_ULL 463 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMAVF_ERR BIT_ULL(58) BIT_ULL 464 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_DMAPF_ERR BIT_ULL(59) BIT_ULL 466 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_PKTVF_ERR BIT_ULL(60) BIT_ULL 467 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_PKTPF_ERR BIT_ULL(61) BIT_ULL 468 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_PPVF_ERR BIT_ULL(62) BIT_ULL 469 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_INTR_PPPF_ERR BIT_ULL(63) BIT_ULL 574 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_DPI_DMA_COMMIT_MODE BIT_ULL(58) BIT_ULL 575 drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h #define CN23XX_DPI_DMA_PKT_EN BIT_ULL(56) BIT_ULL 326 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c if (oct->io_qmask.iq64B & BIT_ULL(q_no)) { BIT_ULL 335 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c if (oct->io_qmask.iq & BIT_ULL(q_no)) { BIT_ULL 347 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c if (oct->io_qmask.oq & BIT_ULL(q_no)) { BIT_ULL 86 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_PKT_INPUT_CTL_VF_NUM BIT_ULL(32) BIT_ULL 133 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_IN_DONE_CNTS_PI_INT BIT_ULL(62) BIT_ULL 134 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_IN_DONE_CNTS_CINT_ENB BIT_ULL(48) BIT_ULL 231 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_INTR_PO_INT BIT_ULL(63) BIT_ULL 232 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_INTR_PI_INT BIT_ULL(62) BIT_ULL 233 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_INTR_MBOX_INT BIT_ULL(61) BIT_ULL 234 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_INTR_RESEND BIT_ULL(60) BIT_ULL 236 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_INTR_CINT_ENB BIT_ULL(48) BIT_ULL 266 drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h #define CN23XX_MSIX_ENTRY_VECTOR_CTL BIT_ULL(32) BIT_ULL 370 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 393 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c if (!(oct->io_qmask.oq & BIT_ULL(i))) BIT_ULL 526 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c if (!(droq_mask & BIT_ULL(oq_no))) BIT_ULL 532 drivers/net/ethernet/cavium/liquidio/cn66xx_device.c oct->droq_intr |= BIT_ULL(oq_no); BIT_ULL 367 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_DMA0_FORCE BIT_ULL(32) BIT_ULL 368 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_DMA1_FORCE BIT_ULL(33) BIT_ULL 369 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_DMA0_COUNT BIT_ULL(34) BIT_ULL 370 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_DMA1_COUNT BIT_ULL(35) BIT_ULL 371 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_DMA0_TIME BIT_ULL(36) BIT_ULL 372 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_DMA1_TIME BIT_ULL(37) BIT_ULL 373 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_INSTR_DB_OF_ERR BIT_ULL(48) BIT_ULL 374 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_SLIST_DB_OF_ERR BIT_ULL(49) BIT_ULL 375 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_POUT_ERR BIT_ULL(50) BIT_ULL 376 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_PIN_BP_ERR BIT_ULL(51) BIT_ULL 377 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_PGL_ERR BIT_ULL(52) BIT_ULL 378 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_PDI_ERR BIT_ULL(53) BIT_ULL 379 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_POP_ERR BIT_ULL(54) BIT_ULL 380 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_PINS_ERR BIT_ULL(55) BIT_ULL 381 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_SPRT0_ERR BIT_ULL(56) BIT_ULL 382 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_SPRT1_ERR BIT_ULL(57) BIT_ULL 383 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_INTR_ILL_PAD_ERR BIT_ULL(60) BIT_ULL 486 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_DPI_DMA_COMMIT_MODE BIT_ULL(58) BIT_ULL 487 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_DPI_DMA_PKT_HP BIT_ULL(57) BIT_ULL 488 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_DPI_DMA_PKT_EN BIT_ULL(56) BIT_ULL 489 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_DPI_DMA_O_ES BIT_ULL(15) BIT_ULL 490 drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h #define CN6XXX_DPI_DMA_O_MODE BIT_ULL(14) BIT_ULL 43 drivers/net/ethernet/cavium/liquidio/cn68xx_regs.h #define CN68XX_INTR_PIPE_ERR BIT_ULL(61) BIT_ULL 960 drivers/net/ethernet/cavium/liquidio/lio_core.c if (!(oct->droq_intr & BIT_ULL(oq_no))) BIT_ULL 967 drivers/net/ethernet/cavium/liquidio/lio_core.c oct_priv->napi_mask |= BIT_ULL(oq_no); BIT_ULL 1270 drivers/net/ethernet/cavium/liquidio/lio_core.c if (!(oct->io_qmask.oq & BIT_ULL(idx))) BIT_ULL 1151 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct->io_qmask.oq & BIT_ULL(i))) BIT_ULL 1157 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 1634 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct_dev->io_qmask.iq & BIT_ULL(j))) BIT_ULL 1677 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct_dev->io_qmask.oq & BIT_ULL(j))) BIT_ULL 1865 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct_dev->io_qmask.iq & BIT_ULL(i))) BIT_ULL 1876 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct_dev->io_qmask.oq & BIT_ULL(i))) BIT_ULL 1913 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct_dev->io_qmask.iq & BIT_ULL(i))) BIT_ULL 1924 drivers/net/ethernet/cavium/liquidio/lio_ethtool.c if (!(oct_dev->io_qmask.oq & BIT_ULL(i))) BIT_ULL 174 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->io_qmask.oq & BIT_ULL(q_no))) BIT_ULL 209 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->io_qmask.oq & BIT_ULL(i))) BIT_ULL 265 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 1033 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 1103 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->io_qmask.oq & BIT_ULL(i))) BIT_ULL 1127 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 4022 drivers/net/ethernet/cavium/liquidio/lio_main.c if (!(oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx))) { BIT_ULL 4023 drivers/net/ethernet/cavium/liquidio/lio_main.c oct->sriov_info.vf_drv_loaded_mask |= BIT_ULL(vf_idx); BIT_ULL 4030 drivers/net/ethernet/cavium/liquidio/lio_main.c if (oct->sriov_info.vf_drv_loaded_mask & BIT_ULL(vf_idx)) { BIT_ULL 4031 drivers/net/ethernet/cavium/liquidio/lio_main.c oct->sriov_info.vf_drv_loaded_mask &= ~BIT_ULL(vf_idx); BIT_ULL 86 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c if (!(oct->io_qmask.oq & BIT_ULL(i))) BIT_ULL 125 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 489 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 550 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c if (!(oct->io_qmask.oq & BIT_ULL(i))) BIT_ULL 562 drivers/net/ethernet/cavium/liquidio/lio_vf_main.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 650 drivers/net/ethernet/cavium/liquidio/octeon_device.c if (oct->io_qmask.oq & BIT_ULL(i)) BIT_ULL 655 drivers/net/ethernet/cavium/liquidio/octeon_device.c if (oct->io_qmask.iq & BIT_ULL(i)) BIT_ULL 1274 drivers/net/ethernet/cavium/liquidio/octeon_device.c (oct->io_qmask.iq & BIT_ULL(q_no))) BIT_ULL 1283 drivers/net/ethernet/cavium/liquidio/octeon_device.c (oct->io_qmask.oq & BIT_ULL(q_no))) BIT_ULL 309 drivers/net/ethernet/cavium/liquidio/octeon_droq.c oct->io_qmask.oq |= BIT_ULL(q_no); BIT_ULL 139 drivers/net/ethernet/cavium/liquidio/request_manager.c oct->io_qmask.iq |= BIT_ULL(iq_no); BIT_ULL 256 drivers/net/ethernet/cavium/liquidio/request_manager.c if (!(oct->io_qmask.iq & BIT_ULL(i))) BIT_ULL 103 drivers/net/ethernet/cavium/thunder/nic_main.c #define INTR_MASK(vfs) ((vfs < 64) ? (BIT_ULL(vfs) - 1) : (~0ull)) BIT_ULL 121 drivers/net/ethernet/cavium/thunder/nic_main.c nic_reg_write(nic, NIC_PF_MAILBOX_INT + (mbx_reg << 3), BIT_ULL(vf)); BIT_ULL 777 drivers/net/ethernet/cavium/thunder/nic_main.c (BIT_ULL(20) | 0x2ull << 14 | 0x1)); BIT_ULL 779 drivers/net/ethernet/cavium/thunder/nic_main.c (BIT_ULL(20) | 0x3ull << 14 | 0x1)); BIT_ULL 786 drivers/net/ethernet/cavium/thunder/nicvf_queues.c mbx.rq.cfg = BIT_ULL(63) | BIT_ULL(62) | BIT_ULL 795 drivers/net/ethernet/cavium/thunder/nicvf_queues.c mbx.rq.cfg = BIT_ULL(63) | BIT_ULL(62) | BIT_ULL 129 drivers/net/ethernet/cavium/thunder/nicvf_queues.h #define NICVF_SQ_EN BIT_ULL(19) BIT_ULL 132 drivers/net/ethernet/cavium/thunder/nicvf_queues.h #define NICVF_CQ_RESET BIT_ULL(41) BIT_ULL 133 drivers/net/ethernet/cavium/thunder/nicvf_queues.h #define NICVF_SQ_RESET BIT_ULL(17) BIT_ULL 134 drivers/net/ethernet/cavium/thunder/nicvf_queues.h #define NICVF_RBDR_RESET BIT_ULL(43) BIT_ULL 271 drivers/net/ethernet/cavium/thunder/thunder_bgx.c lmac->dmacs[i].vf_map &= ~BIT_ULL(vf_id); BIT_ULL 296 drivers/net/ethernet/cavium/thunder/thunder_bgx.c lmac->dmacs[i].vf_map |= BIT_ULL(vf_id); BIT_ULL 306 drivers/net/ethernet/cavium/thunder/thunder_bgx.c lmac->dmacs[lmac->dmacs_cfg].vf_map = BIT_ULL(vf_id); BIT_ULL 36 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define CMR_PKT_TX_EN BIT_ULL(13) BIT_ULL 37 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define CMR_PKT_RX_EN BIT_ULL(14) BIT_ULL 38 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define CMR_EN BIT_ULL(15) BIT_ULL 40 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define CMR_GLOBAL_CFG_FCS_STRIP BIT_ULL(6) BIT_ULL 57 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define RX_DMACX_CAM_EN BIT_ULL(48) BIT_ULL 87 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_CTL_LOW_POWER BIT_ULL(11) BIT_ULL 88 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_CTL_LOOPBACK BIT_ULL(14) BIT_ULL 89 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_CTL_RESET BIT_ULL(15) BIT_ULL 91 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_STATUS1_RCV_LNK BIT_ULL(2) BIT_ULL 93 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_STATUS2_RCVFLT BIT_ULL(10) BIT_ULL 95 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_BX_STATUS_RX_ALIGN BIT_ULL(12) BIT_ULL 97 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_BR_STATUS_BLK_LOCK BIT_ULL(0) BIT_ULL 98 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_BR_STATUS_RCV_LNK BIT_ULL(12) BIT_ULL 100 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_PMD_CRTL_TRAIN_EN BIT_ULL(1) BIT_ULL 105 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_FEC_CTL_FEC_EN BIT_ULL(0) BIT_ULL 106 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_FEC_CTL_ERR_EN BIT_ULL(1) BIT_ULL 108 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_AN_CTL_AN_EN BIT_ULL(12) BIT_ULL 109 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_AN_CTL_XNP_EN BIT_ULL(13) BIT_ULL 112 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_MISC_CTL_INTLV_RDISP BIT_ULL(10) BIT_ULL 113 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_MISC_CTL_RX_DIS BIT_ULL(12) BIT_ULL 119 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_DBG_CTL_AN_ARB_LINK_CHK_EN BIT_ULL(18) BIT_ULL 120 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SPU_DBG_CTL_AN_NONCE_MCT_DIS BIT_ULL(29) BIT_ULL 124 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define BGX_PKT_RX_PTP_EN BIT_ULL(12) BIT_ULL 129 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SMU_TX_APPEND_FCS_D BIT_ULL(2) BIT_ULL 136 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SMU_TX_CTL_DIC_EN BIT_ULL(0) BIT_ULL 137 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SMU_TX_CTL_UNI_EN BIT_ULL(1) BIT_ULL 141 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SMU_CTL_RX_IDLE BIT_ULL(0) BIT_ULL 142 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define SMU_CTL_TX_IDLE BIT_ULL(1) BIT_ULL 144 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define RX_EN BIT_ULL(0) BIT_ULL 145 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define TX_EN BIT_ULL(1) BIT_ULL 146 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define BCK_EN BIT_ULL(2) BIT_ULL 147 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define DRP_EN BIT_ULL(3) BIT_ULL 150 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_CTL_RST_AN BIT_ULL(9) BIT_ULL 151 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_CTL_PWR_DN BIT_ULL(11) BIT_ULL 152 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_CTL_AN_EN BIT_ULL(12) BIT_ULL 153 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_CTL_LOOPBACK1 BIT_ULL(14) BIT_ULL 154 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_CTL_RESET BIT_ULL(15) BIT_ULL 156 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_STATUS_LINK BIT_ULL(2) BIT_ULL 157 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MRX_STATUS_AN_CPT BIT_ULL(5) BIT_ULL 164 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MISC_CTL_MODE BIT_ULL(8) BIT_ULL 165 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MISC_CTL_DISP_EN BIT_ULL(13) BIT_ULL 166 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define PCS_MISC_CTL_GMX_ENO BIT_ULL(11) BIT_ULL 169 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_PORT_CFG_SPEED BIT_ULL(1) BIT_ULL 170 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_PORT_CFG_DUPLEX BIT_ULL(2) BIT_ULL 171 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_PORT_CFG_SLOT_TIME BIT_ULL(3) BIT_ULL 172 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_PORT_CFG_SPEED_MSB BIT_ULL(8) BIT_ULL 173 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_PORT_CFG_RX_IDLE BIT_ULL(12) BIT_ULL 174 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_PORT_CFG_TX_IDLE BIT_ULL(13) BIT_ULL 187 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_TXX_INT_PTP_LOST BIT_ULL(4) BIT_ULL 188 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_TXX_INT_LATE_COL BIT_ULL(3) BIT_ULL 189 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_TXX_INT_XSDEF BIT_ULL(2) BIT_ULL 190 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_TXX_INT_XSCOL BIT_ULL(1) BIT_ULL 191 drivers/net/ethernet/cavium/thunder/thunder_bgx.h #define GMI_TXX_INT_UNDFLW BIT_ULL(0) BIT_ULL 25 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define PORT_EN BIT_ULL(63) BIT_ULL 26 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define CLK_RESET BIT_ULL(15) BIT_ULL 27 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define DLL_RESET BIT_ULL(11) BIT_ULL 28 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define COMP_EN BIT_ULL(7) BIT_ULL 29 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define TX_PKT_RESET BIT_ULL(3) BIT_ULL 30 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define TX_DATA_RESET BIT_ULL(2) BIT_ULL 31 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define RX_PKT_RESET BIT_ULL(1) BIT_ULL 32 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define RX_DATA_RESET BIT_ULL(0) BIT_ULL 34 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define CLKRX_BYP BIT_ULL(23) BIT_ULL 35 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define CLKTX_BYP BIT_ULL(15) BIT_ULL 37 drivers/net/ethernet/cavium/thunder/thunder_xcv.c #define DRV_BYP BIT_ULL(63) BIT_ULL 2964 drivers/net/ethernet/cisco/enic/enic_main.c patch_level &= BIT_ULL(0) | BIT_ULL(2); BIT_ULL 104 drivers/net/ethernet/freescale/enetc/enetc_pf.c mask |= BIT_ULL(i * 6); BIT_ULL 191 drivers/net/ethernet/hisilicon/hns3/hns3_enet.h #define HNS3_VECTOR_TX_IRQ BIT_ULL(0) BIT_ULL 192 drivers/net/ethernet/hisilicon/hns3/hns3_enet.h #define HNS3_VECTOR_RX_IRQ BIT_ULL(1) BIT_ULL 157 drivers/net/ethernet/intel/i40e/i40e.h #define I40E_PF_RESET_FLAG BIT_ULL(__I40E_PF_RESET_REQUESTED) BIT_ULL 1904 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h #define I40E_PHY_TYPES_BITMASK (BIT_ULL(I40E_PHY_TYPE_SGMII) | \ BIT_ULL 1905 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_1000BASE_KX) | \ BIT_ULL 1906 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_KX4) | \ BIT_ULL 1907 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_KR) | \ BIT_ULL 1908 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_40GBASE_KR4) | \ BIT_ULL 1909 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_XAUI) | \ BIT_ULL 1910 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_XFI) | \ BIT_ULL 1911 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_SFI) | \ BIT_ULL 1912 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_XLAUI) | \ BIT_ULL 1913 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_XLPPI) | \ BIT_ULL 1914 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4_CU) | \ BIT_ULL 1915 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1_CU) | \ BIT_ULL 1916 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_AOC) | \ BIT_ULL 1917 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_40GBASE_AOC) | \ BIT_ULL 1918 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_UNRECOGNIZED) | \ BIT_ULL 1919 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_UNSUPPORTED) | \ BIT_ULL 1920 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_100BASE_TX) | \ BIT_ULL 1921 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_1000BASE_T) | \ BIT_ULL 1922 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_T) | \ BIT_ULL 1923 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_SR) | \ BIT_ULL 1924 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_LR) | \ BIT_ULL 1925 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_SFPP_CU) | \ BIT_ULL 1926 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1) | \ BIT_ULL 1927 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4) | \ BIT_ULL 1928 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_40GBASE_SR4) | \ BIT_ULL 1929 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_40GBASE_LR4) | \ BIT_ULL 1930 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_1000BASE_SX) | \ BIT_ULL 1931 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_1000BASE_LX) | \ BIT_ULL 1932 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_1000BASE_T_OPTICAL) | \ BIT_ULL 1933 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_20GBASE_KR2) | \ BIT_ULL 1934 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_25GBASE_KR) | \ BIT_ULL 1935 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_25GBASE_CR) | \ BIT_ULL 1936 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_25GBASE_SR) | \ BIT_ULL 1937 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_25GBASE_LR) | \ BIT_ULL 1938 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC) | \ BIT_ULL 1939 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC) | \ BIT_ULL 1940 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T) | \ BIT_ULL 1941 drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h BIT_ULL(I40E_PHY_TYPE_5GBASE_T)) BIT_ULL 3421 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); BIT_ULL 3427 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); BIT_ULL 3430 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); BIT_ULL 3436 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | BIT_ULL 3437 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); BIT_ULL 3439 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); BIT_ULL 3445 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | BIT_ULL 3446 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); BIT_ULL 3448 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); BIT_ULL 3457 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); BIT_ULL 3466 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); BIT_ULL 3469 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | BIT_ULL 3470 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); BIT_ULL 3473 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | BIT_ULL 3474 drivers/net/ethernet/intel/i40e/i40e_ethtool.c BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); BIT_ULL 3490 drivers/net/ethernet/intel/i40e/i40e_ethtool.c hena |= BIT_ULL(flow_pctype); BIT_ULL 108 drivers/net/ethernet/intel/i40e/i40e_hmc.h val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ BIT_ULL 127 drivers/net/ethernet/intel/i40e/i40e_hmc.h val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ BIT_ULL 110 drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c obj->size = BIT_ULL(size_exp); BIT_ULL 133 drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c obj->size = BIT_ULL(size_exp); BIT_ULL 156 drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c obj->size = BIT_ULL(size_exp); BIT_ULL 179 drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c obj->size = BIT_ULL(size_exp); BIT_ULL 886 drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c mask = BIT_ULL(ce_info->width) - 1; BIT_ULL 579 drivers/net/ethernet/intel/i40e/i40e_main.c *stat = (new_data + BIT_ULL(48)) - *offset; BIT_ULL 602 drivers/net/ethernet/intel/i40e/i40e_main.c *stat = (u32)((new_data + BIT_ULL(32)) - *offset); BIT_ULL 1835 drivers/net/ethernet/intel/i40e/i40e_main.c while (num_qps && (BIT_ULL(pow) < qcount)) { BIT_ULL 3294 drivers/net/ethernet/intel/i40e/i40e_main.c BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT)); BIT_ULL 3441 drivers/net/ethernet/intel/i40e/i40e_main.c if (!(vsi->tc_config.enabled_tc & BIT_ULL(n))) BIT_ULL 8425 drivers/net/ethernet/intel/i40e/i40e_main.c if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) { BIT_ULL 8440 drivers/net/ethernet/intel/i40e/i40e_main.c } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) { BIT_ULL 8470 drivers/net/ethernet/intel/i40e/i40e_main.c } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) { BIT_ULL 8484 drivers/net/ethernet/intel/i40e/i40e_main.c } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) { BIT_ULL 10372 drivers/net/ethernet/intel/i40e/i40e_main.c pf->pending_udp_bitmap |= BIT_ULL(i); BIT_ULL 10396 drivers/net/ethernet/intel/i40e/i40e_main.c if (pf->pending_udp_bitmap & BIT_ULL(i)) { BIT_ULL 10401 drivers/net/ethernet/intel/i40e/i40e_main.c pf->pending_udp_bitmap &= ~BIT_ULL(i); BIT_ULL 10437 drivers/net/ethernet/intel/i40e/i40e_main.c pf->pending_udp_bitmap &= ~BIT_ULL(i); BIT_ULL 12147 drivers/net/ethernet/intel/i40e/i40e_main.c if (!port && (pf->pending_udp_bitmap & BIT_ULL(i))) BIT_ULL 12204 drivers/net/ethernet/intel/i40e/i40e_main.c pf->pending_udp_bitmap |= BIT_ULL(next_idx); BIT_ULL 12250 drivers/net/ethernet/intel/i40e/i40e_main.c pf->pending_udp_bitmap ^= BIT_ULL(idx); BIT_ULL 80 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \ BIT_ULL 81 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ BIT_ULL 82 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \ BIT_ULL 83 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ BIT_ULL 84 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \ BIT_ULL 85 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \ BIT_ULL 86 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \ BIT_ULL 87 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ BIT_ULL 88 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ BIT_ULL 89 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \ BIT_ULL 90 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD)) BIT_ULL 93 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \ BIT_ULL 94 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \ BIT_ULL 95 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \ BIT_ULL 96 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \ BIT_ULL 97 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \ BIT_ULL 98 drivers/net/ethernet/intel/i40e/i40e_txrx.h BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP)) BIT_ULL 207 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_SGMII BIT_ULL(I40E_PHY_TYPE_SGMII) BIT_ULL 208 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_1000BASE_KX BIT_ULL(I40E_PHY_TYPE_1000BASE_KX) BIT_ULL 209 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_KX4 BIT_ULL(I40E_PHY_TYPE_10GBASE_KX4) BIT_ULL 210 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_KR BIT_ULL(I40E_PHY_TYPE_10GBASE_KR) BIT_ULL 211 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_40GBASE_KR4 BIT_ULL(I40E_PHY_TYPE_40GBASE_KR4) BIT_ULL 212 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_XAUI BIT_ULL(I40E_PHY_TYPE_XAUI) BIT_ULL 213 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_XFI BIT_ULL(I40E_PHY_TYPE_XFI) BIT_ULL 214 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_SFI BIT_ULL(I40E_PHY_TYPE_SFI) BIT_ULL 215 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_XLAUI BIT_ULL(I40E_PHY_TYPE_XLAUI) BIT_ULL 216 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_XLPPI BIT_ULL(I40E_PHY_TYPE_XLPPI) BIT_ULL 217 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_40GBASE_CR4_CU BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4_CU) BIT_ULL 218 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_CR1_CU BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1_CU) BIT_ULL 219 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_AOC BIT_ULL(I40E_PHY_TYPE_10GBASE_AOC) BIT_ULL 220 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_40GBASE_AOC BIT_ULL(I40E_PHY_TYPE_40GBASE_AOC) BIT_ULL 221 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_100BASE_TX BIT_ULL(I40E_PHY_TYPE_100BASE_TX) BIT_ULL 222 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_1000BASE_T BIT_ULL(I40E_PHY_TYPE_1000BASE_T) BIT_ULL 223 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_T BIT_ULL(I40E_PHY_TYPE_10GBASE_T) BIT_ULL 224 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_SR BIT_ULL(I40E_PHY_TYPE_10GBASE_SR) BIT_ULL 225 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_LR BIT_ULL(I40E_PHY_TYPE_10GBASE_LR) BIT_ULL 226 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU BIT_ULL(I40E_PHY_TYPE_10GBASE_SFPP_CU) BIT_ULL 227 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_10GBASE_CR1 BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1) BIT_ULL 228 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_40GBASE_CR4 BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4) BIT_ULL 229 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_40GBASE_SR4 BIT_ULL(I40E_PHY_TYPE_40GBASE_SR4) BIT_ULL 230 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_40GBASE_LR4 BIT_ULL(I40E_PHY_TYPE_40GBASE_LR4) BIT_ULL 231 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_1000BASE_SX BIT_ULL(I40E_PHY_TYPE_1000BASE_SX) BIT_ULL 232 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_1000BASE_LX BIT_ULL(I40E_PHY_TYPE_1000BASE_LX) BIT_ULL 234 drivers/net/ethernet/intel/i40e/i40e_type.h BIT_ULL(I40E_PHY_TYPE_1000BASE_T_OPTICAL) BIT_ULL 235 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_20GBASE_KR2 BIT_ULL(I40E_PHY_TYPE_20GBASE_KR2) BIT_ULL 243 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_25GBASE_KR BIT_ULL(I40E_PHY_TYPE_25GBASE_KR + \ BIT_ULL 245 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_25GBASE_CR BIT_ULL(I40E_PHY_TYPE_25GBASE_CR + \ BIT_ULL 247 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_25GBASE_SR BIT_ULL(I40E_PHY_TYPE_25GBASE_SR + \ BIT_ULL 249 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_25GBASE_LR BIT_ULL(I40E_PHY_TYPE_25GBASE_LR + \ BIT_ULL 251 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_25GBASE_AOC BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC + \ BIT_ULL 253 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \ BIT_ULL 257 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T + \ BIT_ULL 259 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T + \ BIT_ULL 621 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE BIT_ULL(0) BIT_ULL 622 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_802_1AD_CAPABLE BIT_ULL(1) BIT_ULL 623 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE BIT_ULL(2) BIT_ULL 624 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK BIT_ULL(3) BIT_ULL 625 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_FW_LLDP_STOPPABLE BIT_ULL(4) BIT_ULL 626 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_FW_LLDP_PERSISTENT BIT_ULL(5) BIT_ULL 627 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_HW_FLAG_DROP_MODE BIT_ULL(7) BIT_ULL 765 drivers/net/ethernet/intel/i40e/i40e_type.h BIT_ULL(I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT) BIT_ULL 899 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_RXD_QW1_LENGTH_SPH_MASK BIT_ULL(I40E_RXD_QW1_LENGTH_SPH_SHIFT) BIT_ULL 1075 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_TXD_CTX_UDP_TUNNELING BIT_ULL(I40E_TXD_CTX_QW0_NATT_SHIFT) BIT_ULL 1080 drivers/net/ethernet/intel/i40e/i40e_type.h BIT_ULL(I40E_TXD_CTX_QW0_EIP_NOINC_SHIFT) BIT_ULL 1093 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_TXD_CTX_QW0_L4T_CS_MASK BIT_ULL(I40E_TXD_CTX_QW0_L4T_CS_SHIFT) BIT_ULL 1175 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_TXD_FLTR_QW1_CNT_ENA_MASK BIT_ULL(I40E_TXD_FLTR_QW1_CNT_ENA_SHIFT) BIT_ULL 1184 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_TXD_FLTR_QW1_ATR_MASK BIT_ULL(I40E_TXD_FLTR_QW1_ATR_SHIFT) BIT_ULL 1188 drivers/net/ethernet/intel/i40e/i40e_type.h #define I40E_TXD_FLTR_QW1_ATR_MASK BIT_ULL(I40E_TXD_FLTR_QW1_ATR_SHIFT) BIT_ULL 64 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_UDP) | \ BIT_ULL 65 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP) | \ BIT_ULL 66 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_TCP) | \ BIT_ULL 67 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER) | \ BIT_ULL 68 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_FRAG_IPV4) | \ BIT_ULL 69 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_UDP) | \ BIT_ULL 70 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_TCP) | \ BIT_ULL 71 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP) | \ BIT_ULL 72 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER) | \ BIT_ULL 73 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_FRAG_IPV6) | \ BIT_ULL 74 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_L2_PAYLOAD)) BIT_ULL 77 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \ BIT_ULL 78 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \ BIT_ULL 79 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \ BIT_ULL 80 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \ BIT_ULL 81 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \ BIT_ULL 82 drivers/net/ethernet/intel/iavf/iavf_txrx.h BIT_ULL(IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP)) BIT_ULL 314 drivers/net/ethernet/intel/iavf/iavf_type.h BIT_ULL(IAVF_RXD_QW1_STATUS_TSYNVALID_SHIFT) BIT_ULL 448 drivers/net/ethernet/intel/iavf/iavf_type.h #define IAVF_RXD_QW1_LENGTH_SPH_MASK BIT_ULL(IAVF_RXD_QW1_LENGTH_SPH_SHIFT) BIT_ULL 653 drivers/net/ethernet/intel/iavf/iavf_type.h #define IAVF_TXD_CTX_UDP_TUNNELING BIT_ULL(IAVF_TXD_CTX_QW0_NATT_SHIFT) BIT_ULL 658 drivers/net/ethernet/intel/iavf/iavf_type.h BIT_ULL(IAVF_TXD_CTX_QW0_EIP_NOINC_SHIFT) BIT_ULL 671 drivers/net/ethernet/intel/iavf/iavf_type.h #define IAVF_TXD_CTX_QW0_L4T_CS_MASK BIT_ULL(IAVF_TXD_CTX_QW0_L4T_CS_SHIFT) BIT_ULL 283 drivers/net/ethernet/intel/iavf/iavf_virtchnl.c BIT_ULL(IAVF_RXQ_CTX_DBUFF_SHIFT)); BIT_ULL 850 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100BASE_TX BIT_ULL(0) BIT_ULL 851 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100M_SGMII BIT_ULL(1) BIT_ULL 852 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_1000BASE_T BIT_ULL(2) BIT_ULL 853 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_1000BASE_SX BIT_ULL(3) BIT_ULL 854 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_1000BASE_LX BIT_ULL(4) BIT_ULL 855 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_1000BASE_KX BIT_ULL(5) BIT_ULL 856 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_1G_SGMII BIT_ULL(6) BIT_ULL 857 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_2500BASE_T BIT_ULL(7) BIT_ULL 858 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_2500BASE_X BIT_ULL(8) BIT_ULL 859 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_2500BASE_KX BIT_ULL(9) BIT_ULL 860 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_5GBASE_T BIT_ULL(10) BIT_ULL 861 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_5GBASE_KR BIT_ULL(11) BIT_ULL 862 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10GBASE_T BIT_ULL(12) BIT_ULL 863 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10G_SFI_DA BIT_ULL(13) BIT_ULL 864 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10GBASE_SR BIT_ULL(14) BIT_ULL 865 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10GBASE_LR BIT_ULL(15) BIT_ULL 866 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10GBASE_KR_CR1 BIT_ULL(16) BIT_ULL 867 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC BIT_ULL(17) BIT_ULL 868 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_10G_SFI_C2C BIT_ULL(18) BIT_ULL 869 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_T BIT_ULL(19) BIT_ULL 870 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_CR BIT_ULL(20) BIT_ULL 871 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_CR_S BIT_ULL(21) BIT_ULL 872 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_CR1 BIT_ULL(22) BIT_ULL 873 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_SR BIT_ULL(23) BIT_ULL 874 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_LR BIT_ULL(24) BIT_ULL 875 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_KR BIT_ULL(25) BIT_ULL 876 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_KR_S BIT_ULL(26) BIT_ULL 877 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25GBASE_KR1 BIT_ULL(27) BIT_ULL 878 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC BIT_ULL(28) BIT_ULL 879 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_25G_AUI_C2C BIT_ULL(29) BIT_ULL 880 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_40GBASE_CR4 BIT_ULL(30) BIT_ULL 881 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_40GBASE_SR4 BIT_ULL(31) BIT_ULL 882 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_40GBASE_LR4 BIT_ULL(32) BIT_ULL 883 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_40GBASE_KR4 BIT_ULL(33) BIT_ULL 884 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC BIT_ULL(34) BIT_ULL 885 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_40G_XLAUI BIT_ULL(35) BIT_ULL 886 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_CR2 BIT_ULL(36) BIT_ULL 887 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_SR2 BIT_ULL(37) BIT_ULL 888 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_LR2 BIT_ULL(38) BIT_ULL 889 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_KR2 BIT_ULL(39) BIT_ULL 890 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC BIT_ULL(40) BIT_ULL 891 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50G_LAUI2 BIT_ULL(41) BIT_ULL 892 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC BIT_ULL(42) BIT_ULL 893 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50G_AUI2 BIT_ULL(43) BIT_ULL 894 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_CP BIT_ULL(44) BIT_ULL 895 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_SR BIT_ULL(45) BIT_ULL 896 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_FR BIT_ULL(46) BIT_ULL 897 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_LR BIT_ULL(47) BIT_ULL 898 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4 BIT_ULL(48) BIT_ULL 899 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC BIT_ULL(49) BIT_ULL 900 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_50G_AUI1 BIT_ULL(50) BIT_ULL 901 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_CR4 BIT_ULL(51) BIT_ULL 902 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_SR4 BIT_ULL(52) BIT_ULL 903 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_LR4 BIT_ULL(53) BIT_ULL 904 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_KR4 BIT_ULL(54) BIT_ULL 905 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC BIT_ULL(55) BIT_ULL 906 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100G_CAUI4 BIT_ULL(56) BIT_ULL 907 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC BIT_ULL(57) BIT_ULL 908 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100G_AUI4 BIT_ULL(58) BIT_ULL 909 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4 BIT_ULL(59) BIT_ULL 910 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4 BIT_ULL(60) BIT_ULL 911 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_CP2 BIT_ULL(61) BIT_ULL 912 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_SR2 BIT_ULL(62) BIT_ULL 913 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_LOW_100GBASE_DR BIT_ULL(63) BIT_ULL 916 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4 BIT_ULL(0) BIT_ULL 917 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC BIT_ULL(1) BIT_ULL 918 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_HIGH_100G_CAUI2 BIT_ULL(2) BIT_ULL 919 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC BIT_ULL(3) BIT_ULL 920 drivers/net/ethernet/intel/ice/ice_adminq_cmd.h #define ICE_PHY_TYPE_HIGH_100G_AUI2 BIT_ULL(4) BIT_ULL 2156 drivers/net/ethernet/intel/ice/ice_common.c pt_low = BIT_ULL(index); BIT_ULL 2160 drivers/net/ethernet/intel/ice/ice_common.c *phy_type_low |= BIT_ULL(index); BIT_ULL 2165 drivers/net/ethernet/intel/ice/ice_common.c pt_high = BIT_ULL(index); BIT_ULL 2169 drivers/net/ethernet/intel/ice/ice_common.c *phy_type_high |= BIT_ULL(index); BIT_ULL 3088 drivers/net/ethernet/intel/ice/ice_common.c mask = BIT_ULL(ce_info->width) - 1; BIT_ULL 3471 drivers/net/ethernet/intel/ice/ice_common.c u64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1); BIT_ULL 3490 drivers/net/ethernet/intel/ice/ice_common.c *cur_stat += (new_data + BIT_ULL(40)) - *prev_stat; BIT_ULL 3529 drivers/net/ethernet/intel/ice/ice_common.c *cur_stat += (new_data + BIT_ULL(32)) - *prev_stat; BIT_ULL 26 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_INIT BIT_ULL(1) BIT_ULL 27 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_FW_LOG BIT_ULL(3) BIT_ULL 28 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_LINK BIT_ULL(4) BIT_ULL 29 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_PHY BIT_ULL(5) BIT_ULL 30 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_QCTX BIT_ULL(6) BIT_ULL 31 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_NVM BIT_ULL(7) BIT_ULL 32 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_LAN BIT_ULL(8) BIT_ULL 33 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_SW BIT_ULL(13) BIT_ULL 34 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_SCHED BIT_ULL(14) BIT_ULL 35 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_PKG BIT_ULL(16) BIT_ULL 36 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_RES BIT_ULL(17) BIT_ULL 37 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_AQ_MSG BIT_ULL(24) BIT_ULL 38 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_AQ_CMD BIT_ULL(27) BIT_ULL 39 drivers/net/ethernet/intel/ice/ice_type.h #define ICE_DBG_USER BIT_ULL(31) BIT_ULL 3212 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c BIT_ULL(q_vector->v_idx)); BIT_ULL 7348 drivers/net/ethernet/intel/ixgbe/ixgbe_main.c eics |= BIT_ULL(i); BIT_ULL 721 drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c u64 eics = BIT_ULL(ring->q_vector->v_idx); BIT_ULL 30 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CMR_EN BIT_ULL(55) BIT_ULL 31 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define DATA_PKT_TX_EN BIT_ULL(53) BIT_ULL 32 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define DATA_PKT_RX_EN BIT_ULL(54) BIT_ULL 36 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define FW_CGX_INT BIT_ULL(1) BIT_ULL 42 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGX_DMAC_CTL0_CAM_ENABLE BIT_ULL(3) BIT_ULL 43 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGX_DMAC_CAM_ACCEPT BIT_ULL(3) BIT_ULL 44 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGX_DMAC_MCAST_MODE BIT_ULL(1) BIT_ULL 45 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGX_DMAC_BCAST_MODE BIT_ULL(0) BIT_ULL 47 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGX_DMAC_CAM_ADDR_ENABLE BIT_ULL(48) BIT_ULL 55 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGXX_SPUX_CONTROL1_LBK BIT_ULL(14) BIT_ULL 57 drivers/net/ethernet/marvell/octeontx2/af/cgx.h #define CGXX_GMP_PCS_MRX_CTL_LBK BIT_ULL(14) BIT_ULL 119 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define EVTREG_ACK BIT_ULL(0) BIT_ULL 120 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define EVTREG_EVT_TYPE BIT_ULL(1) BIT_ULL 121 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define EVTREG_STAT BIT_ULL(2) BIT_ULL 179 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define CMDREG_OWN BIT_ULL(0) BIT_ULL 186 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define CMDREG_ENABLE BIT_ULL(8) BIT_ULL 192 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define CMDLINKCHANGE_LINKUP BIT_ULL(8) BIT_ULL 193 drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h #define CMDLINKCHANGE_FULLDPLX BIT_ULL(9) BIT_ULL 37 drivers/net/ethernet/marvell/octeontx2/af/mbox.h #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull)) BIT_ULL 519 drivers/net/ethernet/marvell/octeontx2/af/mbox.h #define TXSCHQ_FREE_ALL BIT_ULL(0) BIT_ULL 531 drivers/net/ethernet/marvell/octeontx2/af/mbox.h #define TXSCHQ_IDX_MASK (BIT_ULL(10) - 1) BIT_ULL 263 drivers/net/ethernet/marvell/octeontx2/af/npc.h #define VTAG0_VALID_BIT BIT_ULL(15) BIT_ULL 398 drivers/net/ethernet/marvell/octeontx2/af/rvu.c if (cfg & BIT_ULL(11)) BIT_ULL 410 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvu_write64(rvu, block->addr, block->lfreset_reg, lf | BIT_ULL(12)); BIT_ULL 411 drivers/net/ethernet/marvell/octeontx2/af/rvu.c err = rvu_poll_reg(rvu, block->addr, block->lfreset_reg, BIT_ULL(12), BIT_ULL 423 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0)); BIT_ULL 424 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true); BIT_ULL 450 drivers/net/ethernet/marvell/octeontx2/af/rvu.c if (!(cfg & BIT_ULL(63))) BIT_ULL 1694 drivers/net/ethernet/marvell/octeontx2/af/rvu.c if (!(intr & BIT_ULL(i - first))) BIT_ULL 1817 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); BIT_ULL 1818 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); BIT_ULL 1845 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, BIT_ULL(pf)); BIT_ULL 1848 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, BIT_ULL(pf)); BIT_ULL 1864 drivers/net/ethernet/marvell/octeontx2/af/rvu.c if (!(intr & BIT_ULL(vf))) BIT_ULL 1869 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INTX(reg), BIT_ULL(vf)); BIT_ULL 1870 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf)); BIT_ULL 1890 drivers/net/ethernet/marvell/octeontx2/af/rvu.c BIT_ULL(pf)); BIT_ULL 1893 drivers/net/ethernet/marvell/octeontx2/af/rvu.c BIT_ULL(pf)); BIT_ULL 1915 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFTRPENDX(idx), BIT_ULL(vf)); BIT_ULL 1917 drivers/net/ethernet/marvell/octeontx2/af/rvu.c rvupf_write64(rvu, RVU_PF_VFME_INTX(idx), BIT_ULL(vf)); BIT_ULL 1956 drivers/net/ethernet/marvell/octeontx2/af/rvu.c BIT_ULL(pf)); BIT_ULL 1959 drivers/net/ethernet/marvell/octeontx2/af/rvu.c BIT_ULL(pf)); BIT_ULL 2200 drivers/net/ethernet/marvell/octeontx2/af/rvu.c cfg | BIT_ULL(22)); BIT_ULL 159 drivers/net/ethernet/marvell/octeontx2/af/rvu.h #define NIX_TXSCHQ_TL1_CFG_DONE BIT_ULL(0) BIT_ULL 126 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0)); BIT_ULL 127 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c err = rvu_poll_reg(rvu, blkaddr, NIX_AF_RX_SW_SYNC, BIT_ULL(0), true); BIT_ULL 323 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, NIX_AF_LSO_CFG, cfg | BIT_ULL(63)); BIT_ULL 404 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c BIT_ULL(36) | BIT_ULL(4) | BIT_ULL 501 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c if (!(cfg & BIT_ULL(4)) || !pfvf->rss_ctx || BIT_ULL 813 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg = BIT_ULL(36) | (req->rq_cnt - 1); BIT_ULL 828 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg = BIT_ULL(36) | (req->sq_cnt - 1); BIT_ULL 843 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg = BIT_ULL(36) | (req->cq_cnt - 1); BIT_ULL 863 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_CFG(nixlf), BIT_ULL(36)); BIT_ULL 875 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_CFG(nixlf), BIT_ULL(36)); BIT_ULL 885 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG2(nixlf), BIT_ULL(0)); BIT_ULL 1037 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, cir_reg, cfg & ~BIT_ULL(0)); BIT_ULL 1042 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, pir_reg, cfg & ~BIT_ULL(0)); BIT_ULL 1280 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg |= BIT_ULL(50) | BIT_ULL(49); BIT_ULL 1285 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c NIX_AF_SMQX_CFG(schq), BIT_ULL(49), true); BIT_ULL 1311 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_write64(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12) | nixlf); BIT_ULL 1312 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c err = rvu_poll_reg(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12), true); BIT_ULL 1365 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg |= BIT_ULL(50) | BIT_ULL(49); BIT_ULL 1370 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c NIX_AF_SMQX_CFG(schq), BIT_ULL(49), true); BIT_ULL 1566 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c (regval & BIT_ULL(49))) { BIT_ULL 1568 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c reg, BIT_ULL(49), true); BIT_ULL 1585 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c regval |= BIT_ULL(5); BIT_ULL 1587 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c regval |= BIT_ULL(4); BIT_ULL 1825 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c BIT_ULL(36) | (hw->max_vfs_per_pf << 4) | MC_TBL_SIZE); BIT_ULL 1841 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c BIT_ULL(63) | (mcast->replay_pkind << 24) | BIT_ULL 1842 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c BIT_ULL(20) | MC_BUF_CNT); BIT_ULL 2539 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg |= BIT_ULL(41); BIT_ULL 2541 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg &= ~BIT_ULL(41); BIT_ULL 2544 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg |= BIT_ULL(40); BIT_ULL 2546 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg &= ~BIT_ULL(40); BIT_ULL 2549 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg |= BIT_ULL(37); BIT_ULL 2551 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg &= ~BIT_ULL(37); BIT_ULL 2588 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c tx_credits = (tx_credits << 12) | (0x1FF << 2) | BIT_ULL(1); BIT_ULL 2605 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c tx_credits = (tx_credits << 12) | (0x1FF << 2) | BIT_ULL(1); BIT_ULL 2620 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_read64(rvu, blkaddr, NIX_AF_CFG) | BIT_ULL(9)); BIT_ULL 2623 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c NIX_AF_STATUS, BIT_ULL(10), false); BIT_ULL 2634 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c (status & (BIT_ULL(16 + idx)))) BIT_ULL 2642 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c if (!(status & BIT_ULL(19))) { BIT_ULL 2650 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c rvu_read64(rvu, blkaddr, NIX_AF_CFG) & ~BIT_ULL(9)); BIT_ULL 2667 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg |= BIT_ULL(8); BIT_ULL 2670 drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c cfg &= ~BIT_ULL(8); BIT_ULL 346 drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c cfg &= ~(BIT_ULL(34) - 1); BIT_ULL 348 drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c cfg |= (req->aura_sz << 16) | BIT_ULL(34); BIT_ULL 356 drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_CFG(npalf), BIT_ULL(36)); BIT_ULL 415 drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c cfg |= BIT_ULL(1); BIT_ULL 418 drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c cfg &= ~BIT_ULL(1); BIT_ULL 128 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c #define CAM_MASK(n) (BIT_ULL(n) - 1) BIT_ULL 338 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c entry.kw_mask[kwi] = BIT_ULL(48) - 1; BIT_ULL 392 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c entry.kw[kwi] = BIT_ULL(40); /* LSB bit of 1st byte in DMAC */ BIT_ULL 393 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c entry.kw_mask[kwi] = BIT_ULL(40); BIT_ULL 491 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c entry.kw[0] = BIT_ULL(13) | chan; BIT_ULL 492 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c entry.kw_mask[0] = BIT_ULL(13) | 0xFFFULL; BIT_ULL 907 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c return (((count) < 64) ? ~(BIT_ULL(count) - 1) : (0x00ULL)); BIT_ULL 1004 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c mcam->total_entries = (mcam->banks / BIT_ULL(cfg)) * mcam->banksize; BIT_ULL 1156 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c BIT_ULL(32) | BIT_ULL(24) | BIT_ULL(6) | BIT_ULL 1157 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c BIT_ULL(2) | BIT_ULL(1)); BIT_ULL 1245 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c BIT_ULL(9) | cntr); BIT_ULL 2067 drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c rsp->stat &= BIT_ULL(48) - 1; BIT_ULL 36 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c #define NSP_STATUS_BUSY BIT_ULL(0) BIT_ULL 41 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c #define NSP_COMMAND_DMA_BUF BIT_ULL(1) BIT_ULL 42 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c #define NSP_COMMAND_START BIT_ULL(0) BIT_ULL 512 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c chunk_size = BIT_ULL(chunk_order); BIT_ULL 513 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c dma_size = BIT_ULL(dma_order); BIT_ULL 639 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c sg_ok = reg & BIT_ULL(arg->arg.code - 1); BIT_ULL 28 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_PORT_FEC_SUPP_BASER BIT_ULL(60) BIT_ULL 29 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_PORT_FEC_SUPP_RS BIT_ULL(61) BIT_ULL 33 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_STATE_CONFIGURED BIT_ULL(0) BIT_ULL 34 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_STATE_ENABLED BIT_ULL(1) BIT_ULL 35 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_STATE_TX_ENABLED BIT_ULL(2) BIT_ULL 36 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_STATE_RX_ENABLED BIT_ULL(3) BIT_ULL 40 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_STATE_OVRD_CHNG BIT_ULL(22) BIT_ULL 44 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_CONFIGURED BIT_ULL(0) BIT_ULL 45 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_ENABLED BIT_ULL(1) BIT_ULL 46 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_TX_ENABLED BIT_ULL(2) BIT_ULL 47 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_RX_ENABLED BIT_ULL(3) BIT_ULL 48 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_SET_RATE BIT_ULL(4) BIT_ULL 49 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_SET_LANES BIT_ULL(5) BIT_ULL 50 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_SET_ANEG BIT_ULL(6) BIT_ULL 51 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c #define NSP_ETH_CTRL_SET_FEC BIT_ULL(7) BIT_ULL 375 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c if (addr & BIT_ULL(idx_lsb)) BIT_ULL 398 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c if (addr & BIT_ULL(idx_lsb)) BIT_ULL 420 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c if (addr & BIT_ULL(idx_lsb)) BIT_ULL 513 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c *addr &= ~BIT_ULL(idx_lsb); BIT_ULL 519 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c *addr |= BIT_ULL(idx_lsb); BIT_ULL 605 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c *addr &= ~BIT_ULL(idx_lsb); BIT_ULL 610 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c *addr |= BIT_ULL(idx_lsb); BIT_ULL 549 drivers/net/ethernet/pensando/ionic/ionic_if.h #define IONIC_ADDR_MASK (BIT_ULL(IONIC_ADDR_LEN) - 1) BIT_ULL 678 drivers/net/ethernet/pensando/ionic/ionic_if.h #define IONIC_TXQ_DESC_ADDR_MASK (BIT_ULL(IONIC_ADDR_LEN) - 1) BIT_ULL 409 drivers/net/thunderbolt.c route &= ~BIT_ULL(63); BIT_ULL 8167 drivers/net/wireless/ath/ath10k/mac.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_DURATION); BIT_ULL 8180 drivers/net/wireless/ath/ath10k/mac.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 1814 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BYTES64); BIT_ULL 1816 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_PACKETS); BIT_ULL 1821 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES64); BIT_ULL 1823 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_PACKETS); BIT_ULL 1827 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 1860 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 1865 drivers/net/wireless/ath/ath6kl/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BSS_PARAM); BIT_ULL 486 drivers/net/wireless/ath/wil6210/cfg80211.c sinfo->filled = BIT_ULL(NL80211_STA_INFO_RX_BYTES) | BIT_ULL 487 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_BYTES) | BIT_ULL 488 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_RX_PACKETS) | BIT_ULL 489 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_PACKETS) | BIT_ULL 490 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_RX_BITRATE) | BIT_ULL 491 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_BITRATE) | BIT_ULL 492 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_RX_DROP_MISC) | BIT_ULL 493 drivers/net/wireless/ath/wil6210/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 513 drivers/net/wireless/ath/wil6210/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 2500 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c si->filled |= BIT_ULL(NL80211_STA_INFO_STA_FLAGS); BIT_ULL 2537 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c si->filled |= BIT_ULL(NL80211_STA_INFO_BSS_PARAM); BIT_ULL 2569 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 2580 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 2589 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_PACKETS) | BIT_ULL 2590 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c BIT_ULL(NL80211_STA_INFO_RX_DROP_MISC) | BIT_ULL 2591 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_PACKETS) | BIT_ULL 2592 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 2641 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled = BIT_ULL(NL80211_STA_INFO_INACTIVE_TIME); BIT_ULL 2651 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_CONNECTED_TIME); BIT_ULL 2656 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 2658 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_PACKETS); BIT_ULL 2661 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_PACKETS); BIT_ULL 2665 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 2670 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BITRATE); BIT_ULL 2675 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES); BIT_ULL 2677 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BYTES); BIT_ULL 2693 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL); BIT_ULL 2696 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 2710 drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 4754 drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL_AVG); BIT_ULL 4774 drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BEACON_RX); BIT_ULL 4778 drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BEACON_SIGNAL_AVG); BIT_ULL 1566 drivers/net/wireless/marvell/libertas/cfg.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES) | BIT_ULL 1567 drivers/net/wireless/marvell/libertas/cfg.c BIT_ULL(NL80211_STA_INFO_TX_PACKETS) | BIT_ULL 1568 drivers/net/wireless/marvell/libertas/cfg.c BIT_ULL(NL80211_STA_INFO_RX_BYTES) | BIT_ULL 1569 drivers/net/wireless/marvell/libertas/cfg.c BIT_ULL(NL80211_STA_INFO_RX_PACKETS); BIT_ULL 1579 drivers/net/wireless/marvell/libertas/cfg.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 1586 drivers/net/wireless/marvell/libertas/cfg.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 1387 drivers/net/wireless/marvell/mwifiex/cfg80211.c sinfo->filled = BIT_ULL(NL80211_STA_INFO_RX_BYTES) | BIT_ULL(NL80211_STA_INFO_TX_BYTES) | BIT_ULL 1388 drivers/net/wireless/marvell/mwifiex/cfg80211.c BIT_ULL(NL80211_STA_INFO_RX_PACKETS) | BIT_ULL(NL80211_STA_INFO_TX_PACKETS) | BIT_ULL 1389 drivers/net/wireless/marvell/mwifiex/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_BITRATE) | BIT_ULL 1390 drivers/net/wireless/marvell/mwifiex/cfg80211.c BIT_ULL(NL80211_STA_INFO_SIGNAL) | BIT_ULL(NL80211_STA_INFO_SIGNAL_AVG); BIT_ULL 1396 drivers/net/wireless/marvell/mwifiex/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_INACTIVE_TIME) | BIT_ULL 1397 drivers/net/wireless/marvell/mwifiex/cfg80211.c BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 1453 drivers/net/wireless/marvell/mwifiex/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BSS_PARAM); BIT_ULL 961 drivers/net/wireless/marvell/mwifiex/main.c mac_addr |= BIT_ULL(MWIFIEX_MAC_LOCAL_ADMIN_BIT); BIT_ULL 965 drivers/net/wireless/marvell/mwifiex/main.c mac_addr ^= BIT_ULL(priv->bss_type + 8); BIT_ULL 594 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_INACTIVE_TIME); BIT_ULL 600 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_CONNECTED_TIME); BIT_ULL 605 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 610 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL_AVG); BIT_ULL 615 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BITRATE); BIT_ULL 620 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 625 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_STA_FLAGS); BIT_ULL 630 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BYTES); BIT_ULL 635 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES); BIT_ULL 640 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BYTES64); BIT_ULL 645 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES64); BIT_ULL 650 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_PACKETS); BIT_ULL 655 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_PACKETS); BIT_ULL 660 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BEACON_RX); BIT_ULL 665 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_DROP_MISC); BIT_ULL 670 drivers/net/wireless/quantenna/qtnfmac/commands.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 87 drivers/net/wireless/realtek/rtlwifi/debug.h #define COMP_TX_REPORT BIT_ULL(32) BIT_ULL 2469 drivers/net/wireless/rndis_wlan.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 2477 drivers/net/wireless/rndis_wlan.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 5817 drivers/net/wireless/ti/wlcore/main.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 304 drivers/net/wireless/virt_wifi.c sinfo->filled = BIT_ULL(NL80211_STA_INFO_TX_PACKETS) | BIT_ULL 305 drivers/net/wireless/virt_wifi.c BIT_ULL(NL80211_STA_INFO_TX_FAILED) | BIT_ULL 306 drivers/net/wireless/virt_wifi.c BIT_ULL(NL80211_STA_INFO_SIGNAL) | BIT_ULL 307 drivers/net/wireless/virt_wifi.c BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 938 drivers/ntb/hw/amd/ntb_hw_amd.c ndev->db_valid_mask = BIT_ULL(ndev->db_count) - 1; BIT_ULL 979 drivers/ntb/hw/amd/ntb_hw_amd.c ndev->db_valid_mask = BIT_ULL(ndev->db_count) - 1; BIT_ULL 271 drivers/ntb/hw/intel/ntb_hw_gen1.c mask = BIT_ULL(shift) - 1; BIT_ULL 1121 drivers/ntb/hw/intel/ntb_hw_gen1.c db_bits = BIT_ULL(db_bit); BIT_ULL 1631 drivers/ntb/hw/intel/ntb_hw_gen1.c ndev->db_valid_mask = BIT_ULL(ndev->db_count) - 1; BIT_ULL 121 drivers/ntb/hw/intel/ntb_hw_gen1.h #define XEON_DB_LINK_BIT BIT_ULL(XEON_DB_LINK) BIT_ULL 139 drivers/ntb/hw/intel/ntb_hw_gen1.h #define NTB_HWERR_SDOORBELL_LOCKUP BIT_ULL(0) BIT_ULL 140 drivers/ntb/hw/intel/ntb_hw_gen1.h #define NTB_HWERR_SB01BASE_LOCKUP BIT_ULL(1) BIT_ULL 141 drivers/ntb/hw/intel/ntb_hw_gen1.h #define NTB_HWERR_B2BDOORBELL_BIT14 BIT_ULL(2) BIT_ULL 142 drivers/ntb/hw/intel/ntb_hw_gen1.h #define NTB_HWERR_MSIX_VECTOR32_BAD BIT_ULL(3) BIT_ULL 185 drivers/ntb/hw/intel/ntb_hw_gen3.c ndev->db_link_mask |= BIT_ULL(31); BIT_ULL 217 drivers/ntb/hw/intel/ntb_hw_gen3.c ndev->db_valid_mask = BIT_ULL(ndev->db_count) - 1; BIT_ULL 545 drivers/ntb/hw/intel/ntb_hw_gen3.c if (unlikely(BIT_ULL(db_bit) & ~ntb_ndev(ntb)->db_valid_mask)) BIT_ULL 88 drivers/ntb/hw/intel/ntb_hw_gen3.h #define GEN3_DB_LINK_BIT BIT_ULL(GEN3_DB_LINK) BIT_ULL 94 drivers/ntb/hw/intel/ntb_hw_intel.h #define NTB_UNSAFE_DB BIT_ULL(0) BIT_ULL 95 drivers/ntb/hw/intel/ntb_hw_intel.h #define NTB_UNSAFE_SPAD BIT_ULL(1) BIT_ULL 291 drivers/ntb/hw/mscc/ntb_hw_switchtec.c if (!IS_ALIGNED(addr, BIT_ULL(xlate_pos))) { BIT_ULL 707 drivers/ntb/hw/mscc/ntb_hw_switchtec.c *db_data = BIT_ULL(db_bit) << sndev->db_peer_shift; BIT_ULL 980 drivers/ntb/ntb_transport.c if (qp_bitmap_alloc & BIT_ULL(i)) { BIT_ULL 1345 drivers/ntb/ntb_transport.c qp_bitmap &= BIT_ULL(qp_count) - 1; BIT_ULL 1419 drivers/ntb/ntb_transport.c if (qp_bitmap_alloc & BIT_ULL(i)) BIT_ULL 1712 drivers/ntb/ntb_transport.c } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) { BIT_ULL 1714 drivers/ntb/ntb_transport.c ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num)); BIT_ULL 1766 drivers/ntb/ntb_transport.c ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num)); BIT_ULL 2005 drivers/ntb/ntb_transport.c qp_bit = BIT_ULL(qp->qp_num); BIT_ULL 2156 drivers/ntb/ntb_transport.c qp_bit = BIT_ULL(qp->qp_num); BIT_ULL 2449 drivers/ntb/ntb_transport.c db_bits &= ~BIT_ULL(qp_num); BIT_ULL 220 drivers/ntb/test/ntb_perf.c (BIT_ULL(_gidx)) BIT_ULL 708 drivers/ntb/test/ntb_perf.c incmd_bit = BIT_ULL(__ffs64(inbits)); BIT_ULL 126 drivers/ntb/test/ntb_pingpong.c out_db = BIT_ULL(pidx + 1); BIT_ULL 129 drivers/ntb/test/ntb_pingpong.c out_db = BIT_ULL(pidx); BIT_ULL 306 drivers/ntb/test/ntb_pingpong.c pp->in_db = BIT_ULL(pidx); BIT_ULL 23 drivers/perf/hisilicon/hisi_uncore_pmu.c #define HISI_MAX_PERIOD(nr) (BIT_ULL(nr) - 1) BIT_ULL 216 drivers/perf/hisilicon/hisi_uncore_pmu.c u64 val = BIT_ULL(hisi_pmu->counter_bits - 1); BIT_ULL 66 drivers/perf/qcom_l2_pmu.c #define L2PMRESR_EN BIT_ULL(63) BIT_ULL 79 drivers/perf/qcom_l2_pmu.c #define L2_COUNTER_RELOAD BIT_ULL(31) BIT_ULL 80 drivers/perf/qcom_l2_pmu.c #define L2_CYCLE_COUNTER_RELOAD BIT_ULL(63) BIT_ULL 143 drivers/perf/qcom_l3_pmu.c return !!(event->attr.config & BIT_ULL(L3_EVENT_LC_BIT)); BIT_ULL 202 drivers/platform/mellanox/mlxbf-tmfifo.c (BIT_ULL(VIRTIO_NET_F_MTU) | BIT_ULL(VIRTIO_NET_F_STATUS) | \ BIT_ULL 203 drivers/platform/mellanox/mlxbf-tmfifo.c BIT_ULL(VIRTIO_NET_F_MAC)) BIT_ULL 45 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c if (data & BIT_ULL(MSR_OS_MAILBOX_BUSY_BIT)) { BIT_ULL 60 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c data = BIT_ULL(MSR_OS_MAILBOX_BUSY_BIT) | BIT_ULL 70 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c if (data & BIT_ULL(MSR_OS_MAILBOX_BUSY_BIT)) { BIT_ULL 50 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_pci.c if (data & BIT_ULL(PUNIT_MAILBOX_BUSY_BIT)) { BIT_ULL 68 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_pci.c data = BIT_ULL(PUNIT_MAILBOX_BUSY_BIT) | BIT_ULL 85 drivers/platform/x86/intel_speed_select_if/isst_if_mbox_pci.c if (data & BIT_ULL(PUNIT_MAILBOX_BUSY_BIT)) { BIT_ULL 43 drivers/platform/x86/intel_turbo_max_3.c value |= BIT_ULL(MSR_OC_MAILBOX_BUSY_BIT); BIT_ULL 57 drivers/platform/x86/intel_turbo_max_3.c if (value & BIT_ULL(MSR_OC_MAILBOX_BUSY_BIT)) { BIT_ULL 40 drivers/powercap/intel_rapl_common.c #define POWER_LIMIT2_ENABLE BIT_ULL(47) BIT_ULL 41 drivers/powercap/intel_rapl_common.c #define POWER_LIMIT2_CLAMP BIT_ULL(48) BIT_ULL 42 drivers/powercap/intel_rapl_common.c #define POWER_HIGH_LOCK BIT_ULL(63) BIT_ULL 142 drivers/ptp/ptp_dte.c ns += (s64)(BIT_ULL(DTE_WRAP_AROUND_NSEC_SHIFT) * ptp_dte->ts_wrap_cnt); BIT_ULL 241 drivers/staging/kpc2000/kpc2000/cell_probe.c u64 irq_check_mask = BIT_ULL(irq_num); BIT_ULL 261 drivers/staging/kpc2000/kpc2000/cell_probe.c writeq(BIT_ULL(kudev->cte.irq_base_num), BIT_ULL 278 drivers/staging/kpc2000/kpc2000/cell_probe.c mask &= ~(BIT_ULL(kudev->cte.irq_base_num)); BIT_ULL 280 drivers/staging/kpc2000/kpc2000/cell_probe.c mask |= BIT_ULL(kudev->cte.irq_base_num); BIT_ULL 1267 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 1270 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 1273 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_PACKETS); BIT_ULL 1276 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_PACKETS); BIT_ULL 1278 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 2973 drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c sinfo->filled = BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 23 drivers/staging/vc04_services/bcm2835-camera/mmal-common.h #define MMAL_TIME_UNKNOWN BIT_ULL(63) BIT_ULL 719 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_INACTIVE_TIME); BIT_ULL 728 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL) | BIT_ULL 729 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c BIT_ULL(NL80211_STA_INFO_RX_PACKETS) | BIT_ULL 730 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c BIT_ULL(NL80211_STA_INFO_TX_PACKETS) | BIT_ULL 731 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c BIT_ULL(NL80211_STA_INFO_TX_FAILED) | BIT_ULL 732 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 1377 drivers/staging/wilc1000/wilc_wfi_cfgoperations.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 264 drivers/staging/wlan-ng/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 266 drivers/staging/wlan-ng/cfg80211.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 730 drivers/thunderbolt/ctl.c u64 route = tb_cfg_get_route(pkg->buffer) & ~BIT_ULL(63); BIT_ULL 68 drivers/thunderbolt/dma_port.c u64 route = tb_cfg_get_route(pkg->buffer) & ~BIT_ULL(63); BIT_ULL 516 drivers/thunderbolt/xdomain.c route = ((u64)xhdr->route_hi << 32 | xhdr->route_lo) & ~BIT_ULL(63); BIT_ULL 1829 drivers/usb/host/xhci.h #define XHCI_LINK_TRB_QUIRK BIT_ULL(0) BIT_ULL 1830 drivers/usb/host/xhci.h #define XHCI_RESET_EP_QUIRK BIT_ULL(1) BIT_ULL 1831 drivers/usb/host/xhci.h #define XHCI_NEC_HOST BIT_ULL(2) BIT_ULL 1832 drivers/usb/host/xhci.h #define XHCI_AMD_PLL_FIX BIT_ULL(3) BIT_ULL 1833 drivers/usb/host/xhci.h #define XHCI_SPURIOUS_SUCCESS BIT_ULL(4) BIT_ULL 1843 drivers/usb/host/xhci.h #define XHCI_EP_LIMIT_QUIRK BIT_ULL(5) BIT_ULL 1844 drivers/usb/host/xhci.h #define XHCI_BROKEN_MSI BIT_ULL(6) BIT_ULL 1845 drivers/usb/host/xhci.h #define XHCI_RESET_ON_RESUME BIT_ULL(7) BIT_ULL 1846 drivers/usb/host/xhci.h #define XHCI_SW_BW_CHECKING BIT_ULL(8) BIT_ULL 1847 drivers/usb/host/xhci.h #define XHCI_AMD_0x96_HOST BIT_ULL(9) BIT_ULL 1848 drivers/usb/host/xhci.h #define XHCI_TRUST_TX_LENGTH BIT_ULL(10) BIT_ULL 1849 drivers/usb/host/xhci.h #define XHCI_LPM_SUPPORT BIT_ULL(11) BIT_ULL 1850 drivers/usb/host/xhci.h #define XHCI_INTEL_HOST BIT_ULL(12) BIT_ULL 1851 drivers/usb/host/xhci.h #define XHCI_SPURIOUS_REBOOT BIT_ULL(13) BIT_ULL 1852 drivers/usb/host/xhci.h #define XHCI_COMP_MODE_QUIRK BIT_ULL(14) BIT_ULL 1853 drivers/usb/host/xhci.h #define XHCI_AVOID_BEI BIT_ULL(15) BIT_ULL 1854 drivers/usb/host/xhci.h #define XHCI_PLAT BIT_ULL(16) BIT_ULL 1855 drivers/usb/host/xhci.h #define XHCI_SLOW_SUSPEND BIT_ULL(17) BIT_ULL 1856 drivers/usb/host/xhci.h #define XHCI_SPURIOUS_WAKEUP BIT_ULL(18) BIT_ULL 1858 drivers/usb/host/xhci.h #define XHCI_BROKEN_STREAMS BIT_ULL(19) BIT_ULL 1859 drivers/usb/host/xhci.h #define XHCI_PME_STUCK_QUIRK BIT_ULL(20) BIT_ULL 1860 drivers/usb/host/xhci.h #define XHCI_MTK_HOST BIT_ULL(21) BIT_ULL 1861 drivers/usb/host/xhci.h #define XHCI_SSIC_PORT_UNUSED BIT_ULL(22) BIT_ULL 1862 drivers/usb/host/xhci.h #define XHCI_NO_64BIT_SUPPORT BIT_ULL(23) BIT_ULL 1863 drivers/usb/host/xhci.h #define XHCI_MISSING_CAS BIT_ULL(24) BIT_ULL 1865 drivers/usb/host/xhci.h #define XHCI_BROKEN_PORT_PED BIT_ULL(25) BIT_ULL 1866 drivers/usb/host/xhci.h #define XHCI_LIMIT_ENDPOINT_INTERVAL_7 BIT_ULL(26) BIT_ULL 1867 drivers/usb/host/xhci.h #define XHCI_U2_DISABLE_WAKE BIT_ULL(27) BIT_ULL 1868 drivers/usb/host/xhci.h #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28) BIT_ULL 1869 drivers/usb/host/xhci.h #define XHCI_HW_LPM_DISABLE BIT_ULL(29) BIT_ULL 1870 drivers/usb/host/xhci.h #define XHCI_SUSPEND_DELAY BIT_ULL(30) BIT_ULL 1871 drivers/usb/host/xhci.h #define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31) BIT_ULL 1872 drivers/usb/host/xhci.h #define XHCI_ZERO_64B_REGS BIT_ULL(32) BIT_ULL 1873 drivers/usb/host/xhci.h #define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33) BIT_ULL 1874 drivers/usb/host/xhci.h #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) BIT_ULL 1875 drivers/usb/host/xhci.h #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) BIT_ULL 158 drivers/virtio/virtio_pci_modern.c if ((features & BIT_ULL(VIRTIO_F_SR_IOV)) && BIT_ULL 1262 fs/proc/task_mmu.c #define PM_SOFT_DIRTY BIT_ULL(55) BIT_ULL 1263 fs/proc/task_mmu.c #define PM_MMAP_EXCLUSIVE BIT_ULL(56) BIT_ULL 1264 fs/proc/task_mmu.c #define PM_FILE BIT_ULL(61) BIT_ULL 1265 fs/proc/task_mmu.c #define PM_SWAP BIT_ULL(62) BIT_ULL 1266 fs/proc/task_mmu.c #define PM_PRESENT BIT_ULL(63) BIT_ULL 26 include/linux/dim.h #define BIT_GAP(bits, end, start) ((((end) - (start)) + BIT_ULL(bits)) \ BIT_ULL 27 include/linux/dim.h & (BIT_ULL(bits) - 1)) BIT_ULL 80 include/linux/i3c/device.h #define I3C_PID_RND_LOWER_32BITS(pid) (!!((pid) & BIT_ULL(32))) BIT_ULL 45 include/linux/intel-iommu.h #define CONTEXT_PASIDE BIT_ULL(3) BIT_ULL 216 include/linux/irqchip/arm-gic-v3.h #define GICR_PENDBASER_PTZ BIT_ULL(62) BIT_ULL 68 include/linux/kvm_host.h #define KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS BIT_ULL(63) BIT_ULL 828 include/linux/ntb.h if (!(ntb_link_is_up(ntb, NULL, NULL) & BIT_ULL(pidx))) BIT_ULL 569 include/linux/platform_data/cros_ec_commands.h #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) BIT_ULL 252 include/linux/switchtec.h #define NTB_DBMSG_IMSG_STATUS BIT_ULL(32) BIT_ULL 253 include/linux/switchtec.h #define NTB_DBMSG_IMSG_MASK BIT_ULL(40) BIT_ULL 113 include/linux/virtio_config.h return vdev->features & BIT_ULL(fbit); BIT_ULL 130 include/linux/virtio_config.h vdev->features |= BIT_ULL(fbit); BIT_ULL 147 include/linux/virtio_config.h vdev->features &= ~BIT_ULL(fbit); BIT_ULL 15 include/media/rc-map.h #define RC_PROTO_BIT_UNKNOWN BIT_ULL(RC_PROTO_UNKNOWN) BIT_ULL 16 include/media/rc-map.h #define RC_PROTO_BIT_OTHER BIT_ULL(RC_PROTO_OTHER) BIT_ULL 17 include/media/rc-map.h #define RC_PROTO_BIT_RC5 BIT_ULL(RC_PROTO_RC5) BIT_ULL 18 include/media/rc-map.h #define RC_PROTO_BIT_RC5X_20 BIT_ULL(RC_PROTO_RC5X_20) BIT_ULL 19 include/media/rc-map.h #define RC_PROTO_BIT_RC5_SZ BIT_ULL(RC_PROTO_RC5_SZ) BIT_ULL 20 include/media/rc-map.h #define RC_PROTO_BIT_JVC BIT_ULL(RC_PROTO_JVC) BIT_ULL 21 include/media/rc-map.h #define RC_PROTO_BIT_SONY12 BIT_ULL(RC_PROTO_SONY12) BIT_ULL 22 include/media/rc-map.h #define RC_PROTO_BIT_SONY15 BIT_ULL(RC_PROTO_SONY15) BIT_ULL 23 include/media/rc-map.h #define RC_PROTO_BIT_SONY20 BIT_ULL(RC_PROTO_SONY20) BIT_ULL 24 include/media/rc-map.h #define RC_PROTO_BIT_NEC BIT_ULL(RC_PROTO_NEC) BIT_ULL 25 include/media/rc-map.h #define RC_PROTO_BIT_NECX BIT_ULL(RC_PROTO_NECX) BIT_ULL 26 include/media/rc-map.h #define RC_PROTO_BIT_NEC32 BIT_ULL(RC_PROTO_NEC32) BIT_ULL 27 include/media/rc-map.h #define RC_PROTO_BIT_SANYO BIT_ULL(RC_PROTO_SANYO) BIT_ULL 28 include/media/rc-map.h #define RC_PROTO_BIT_MCIR2_KBD BIT_ULL(RC_PROTO_MCIR2_KBD) BIT_ULL 29 include/media/rc-map.h #define RC_PROTO_BIT_MCIR2_MSE BIT_ULL(RC_PROTO_MCIR2_MSE) BIT_ULL 30 include/media/rc-map.h #define RC_PROTO_BIT_RC6_0 BIT_ULL(RC_PROTO_RC6_0) BIT_ULL 31 include/media/rc-map.h #define RC_PROTO_BIT_RC6_6A_20 BIT_ULL(RC_PROTO_RC6_6A_20) BIT_ULL 32 include/media/rc-map.h #define RC_PROTO_BIT_RC6_6A_24 BIT_ULL(RC_PROTO_RC6_6A_24) BIT_ULL 33 include/media/rc-map.h #define RC_PROTO_BIT_RC6_6A_32 BIT_ULL(RC_PROTO_RC6_6A_32) BIT_ULL 34 include/media/rc-map.h #define RC_PROTO_BIT_RC6_MCE BIT_ULL(RC_PROTO_RC6_MCE) BIT_ULL 35 include/media/rc-map.h #define RC_PROTO_BIT_SHARP BIT_ULL(RC_PROTO_SHARP) BIT_ULL 36 include/media/rc-map.h #define RC_PROTO_BIT_XMP BIT_ULL(RC_PROTO_XMP) BIT_ULL 37 include/media/rc-map.h #define RC_PROTO_BIT_CEC BIT_ULL(RC_PROTO_CEC) BIT_ULL 38 include/media/rc-map.h #define RC_PROTO_BIT_IMON BIT_ULL(RC_PROTO_IMON) BIT_ULL 39 include/media/rc-map.h #define RC_PROTO_BIT_RCMM12 BIT_ULL(RC_PROTO_RCMM12) BIT_ULL 40 include/media/rc-map.h #define RC_PROTO_BIT_RCMM24 BIT_ULL(RC_PROTO_RCMM24) BIT_ULL 41 include/media/rc-map.h #define RC_PROTO_BIT_RCMM32 BIT_ULL(RC_PROTO_RCMM32) BIT_ULL 42 include/media/rc-map.h #define RC_PROTO_BIT_XBOX_DVD BIT_ULL(RC_PROTO_XBOX_DVD) BIT_ULL 179 include/rdma/ib_verbs.h IB_SA_WELL_KNOWN_GUID = BIT_ULL(57) | 2, BIT_ULL 2757 include/rdma/ib_verbs.h return biter->__dma_addr & ~(BIT_ULL(biter->__pg_bit) - 1); BIT_ULL 118 net/mac80211/ethtool.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_TX_BITRATE)) BIT_ULL 122 net/mac80211/ethtool.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_RX_BITRATE)) BIT_ULL 127 net/mac80211/ethtool.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_SIGNAL_AVG)) BIT_ULL 1110 net/mac80211/rx.c if (tid_agg_rx->reorder_buf_filtered & BIT_ULL(index)) BIT_ULL 1151 net/mac80211/rx.c tid_agg_rx->reorder_buf_filtered &= ~BIT_ULL(index); BIT_ULL 3805 net/mac80211/rx.c tid_agg_rx->reorder_buf_filtered &= ~BIT_ULL(index); BIT_ULL 3806 net/mac80211/rx.c if (filtered & BIT_ULL(i)) BIT_ULL 3807 net/mac80211/rx.c tid_agg_rx->reorder_buf_filtered |= BIT_ULL(index); BIT_ULL 2200 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_INACTIVE_TIME) | BIT_ULL 2201 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_STA_FLAGS) | BIT_ULL 2202 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_BSS_PARAM) | BIT_ULL 2203 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_CONNECTED_TIME) | BIT_ULL 2204 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_ASSOC_AT_BOOTTIME) | BIT_ULL 2205 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_RX_DROP_MISC); BIT_ULL 2209 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BEACON_LOSS); BIT_ULL 2217 net/mac80211/sta_info.c if (!(sinfo->filled & (BIT_ULL(NL80211_STA_INFO_TX_BYTES64) | BIT_ULL 2218 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_TX_BYTES)))) { BIT_ULL 2222 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BYTES64); BIT_ULL 2225 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_TX_PACKETS))) { BIT_ULL 2229 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_PACKETS); BIT_ULL 2232 net/mac80211/sta_info.c if (!(sinfo->filled & (BIT_ULL(NL80211_STA_INFO_RX_BYTES64) | BIT_ULL 2233 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_RX_BYTES)))) { BIT_ULL 2245 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BYTES64); BIT_ULL 2248 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_RX_PACKETS))) { BIT_ULL 2258 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_PACKETS); BIT_ULL 2261 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_TX_RETRIES))) { BIT_ULL 2263 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_RETRIES); BIT_ULL 2266 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_TX_FAILED))) { BIT_ULL 2268 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED); BIT_ULL 2271 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_RX_DURATION))) { BIT_ULL 2274 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_DURATION); BIT_ULL 2277 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_TX_DURATION))) { BIT_ULL 2280 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_DURATION); BIT_ULL 2283 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_AIRTIME_WEIGHT))) { BIT_ULL 2285 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_AIRTIME_WEIGHT); BIT_ULL 2300 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_BEACON_RX) | BIT_ULL 2301 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_BEACON_SIGNAL_AVG); BIT_ULL 2307 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_SIGNAL))) { BIT_ULL 2309 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL); BIT_ULL 2313 net/mac80211/sta_info.c !(sinfo->filled & BIT_ULL(NL80211_STA_INFO_SIGNAL_AVG))) { BIT_ULL 2316 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_SIGNAL_AVG); BIT_ULL 2325 net/mac80211/sta_info.c !(sinfo->filled & (BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL) | BIT_ULL 2326 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL_AVG)))) { BIT_ULL 2327 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL); BIT_ULL 2329 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL_AVG); BIT_ULL 2341 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_TX_BITRATE))) { BIT_ULL 2344 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE); BIT_ULL 2347 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_RX_BITRATE))) { BIT_ULL 2349 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BITRATE); BIT_ULL 2359 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_LLID) | BIT_ULL 2360 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_PLID) | BIT_ULL 2361 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_PLINK_STATE) | BIT_ULL 2362 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_LOCAL_PM) | BIT_ULL 2363 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_PEER_PM) | BIT_ULL 2364 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_NONPEER_PM) | BIT_ULL 2365 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_CONNECTED_TO_GATE); BIT_ULL 2371 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_T_OFFSET); BIT_ULL 2417 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_EXPECTED_THROUGHPUT); BIT_ULL 2421 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL)) && BIT_ULL 2424 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL); BIT_ULL 2427 net/mac80211/sta_info.c if (!(sinfo->filled & BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL_AVG)) && BIT_ULL 2433 net/mac80211/sta_info.c BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL_AVG); BIT_ULL 2437 net/mac80211/sta_info.c sinfo->filled |= BIT_ULL(NL80211_STA_INFO_AIRTIME_LINK_METRIC); BIT_ULL 5089 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_ ## attr) && \ BIT_ULL 5095 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_ ## attr) && \ BIT_ULL 5105 net/wireless/nl80211.c if (sinfo->filled & (BIT_ULL(NL80211_STA_INFO_RX_BYTES) | BIT_ULL 5106 net/wireless/nl80211.c BIT_ULL(NL80211_STA_INFO_RX_BYTES64)) && BIT_ULL 5111 net/wireless/nl80211.c if (sinfo->filled & (BIT_ULL(NL80211_STA_INFO_TX_BYTES) | BIT_ULL 5112 net/wireless/nl80211.c BIT_ULL(NL80211_STA_INFO_TX_BYTES64)) && BIT_ULL 5137 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL)) { BIT_ULL 5143 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL_AVG)) { BIT_ULL 5149 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_TX_BITRATE)) { BIT_ULL 5154 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_RX_BITRATE)) { BIT_ULL 5172 net/wireless/nl80211.c if (sinfo->filled & BIT_ULL(NL80211_STA_INFO_BSS_PARAM)) { BIT_ULL 5192 net/wireless/nl80211.c if ((sinfo->filled & BIT_ULL(NL80211_STA_INFO_STA_FLAGS)) && BIT_ULL 10842 net/wireless/nl80211.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_BEACON_SIGNAL_AVG)) BIT_ULL 1615 net/wireless/scan.c if (seen_indices & BIT_ULL(mbssid_index_ie[2])) BIT_ULL 1620 net/wireless/scan.c seen_indices |= BIT_ULL(mbssid_index_ie[2]); BIT_ULL 1279 net/wireless/wext-compat.c if (!(sinfo.filled & BIT_ULL(NL80211_STA_INFO_TX_BITRATE))) { BIT_ULL 1325 net/wireless/wext-compat.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_SIGNAL)) { BIT_ULL 1340 net/wireless/wext-compat.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_SIGNAL)) { BIT_ULL 1354 net/wireless/wext-compat.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_RX_DROP_MISC)) BIT_ULL 1356 net/wireless/wext-compat.c if (sinfo.filled & BIT_ULL(NL80211_STA_INFO_TX_FAILED)) BIT_ULL 88 sound/soc/sof/intel/shim.h #define SHIM_BYT_IPCX_DONE BIT_ULL(62) BIT_ULL 89 sound/soc/sof/intel/shim.h #define SHIM_BYT_IPCX_BUSY BIT_ULL(63) BIT_ULL 94 sound/soc/sof/intel/shim.h #define SHIM_BYT_IPCD_DONE BIT_ULL(62) BIT_ULL 95 sound/soc/sof/intel/shim.h #define SHIM_BYT_IPCD_BUSY BIT_ULL(63) BIT_ULL 199 sound/xen/xen_snd_front_alsa.c mask |= BIT_ULL(ALSA_SNDIF_FORMATS[i].sndif); BIT_ULL 211 sound/xen/xen_snd_front_alsa.c if (BIT_ULL(ALSA_SNDIF_FORMATS[i].sndif) & sndif_formats) BIT_ULL 380 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_PLATFORM_INFO_CPUID_FAULT BIT_ULL(MSR_PLATFORM_INFO_CPUID_FAULT_BIT) BIT_ULL 416 tools/testing/selftests/kvm/include/x86_64/processor.h #define LBR_INFO_MISPRED BIT_ULL(63) BIT_ULL 417 tools/testing/selftests/kvm/include/x86_64/processor.h #define LBR_INFO_IN_TX BIT_ULL(62) BIT_ULL 418 tools/testing/selftests/kvm/include/x86_64/processor.h #define LBR_INFO_ABORT BIT_ULL(61) BIT_ULL 659 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) BIT_ULL 690 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_F10H_DECFG_LFENCE_SERIALIZE BIT_ULL(MSR_F10H_DECFG_LFENCE_SERIALIZE_BIT) BIT_ULL 697 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_K8_SYSCFG_MEM_ENCRYPT BIT_ULL(MSR_K8_SYSCFG_MEM_ENCRYPT_BIT) BIT_ULL 719 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_K7_HWCR_SMMLOCK BIT_ULL(MSR_K7_HWCR_SMMLOCK_BIT) BIT_ULL 940 tools/testing/selftests/kvm/include/x86_64/processor.h #define MSR_MISC_FEATURES_ENABLES_CPUID_FAULT BIT_ULL(MSR_MISC_FEATURES_ENABLES_CPUID_FAULT_BIT) BIT_ULL 815 virt/kvm/arm/vgic/vgic-its.c return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); BIT_ULL 909 virt/kvm/arm/vgic/vgic-its.c if (id >= BIT_ULL(VITS_TYPER_DEVBITS)) BIT_ULL 914 virt/kvm/arm/vgic/vgic-its.c if (id >= BIT_ULL(16)) BIT_ULL 950 virt/kvm/arm/vgic/vgic-its.c if (!(indirect_ptr & BIT_ULL(63))) BIT_ULL 1056 virt/kvm/arm/vgic/vgic-its.c if (event_id >= BIT_ULL(device->num_eventid_bits)) BIT_ULL 2163 virt/kvm/arm/vgic/vgic-its.c if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) BIT_ULL 2240 virt/kvm/arm/vgic/vgic-its.c size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; BIT_ULL 348 virt/kvm/arm/vgic/vgic-mmio-v3.c (BIT_ULL(63) | GENMASK_ULL(61, 59) | GENMASK_ULL(55, 52) | \ BIT_ULL 898 virt/kvm/arm/vgic/vgic-mmio-v3.c broadcast = reg & BIT_ULL(ICC_SGI1R_IRQ_ROUTING_MODE_BIT); BIT_ULL 70 virt/kvm/arm/vgic/vgic.h #define KVM_ITS_CTE_VALID_MASK BIT_ULL(63) BIT_ULL 78 virt/kvm/arm/vgic/vgic.h #define KVM_ITS_DTE_VALID_MASK BIT_ULL(63) BIT_ULL 84 virt/kvm/arm/vgic/vgic.h #define KVM_ITS_L1E_VALID_MASK BIT_ULL(63)