UASM_i_MTC0 173 arch/mips/kvm/entry.c UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); UASM_i_MTC0 177 arch/mips/kvm/entry.c UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); UASM_i_MTC0 194 arch/mips/kvm/entry.c UASM_i_MTC0(p, reg, C0_EBASE); UASM_i_MTC0 240 arch/mips/kvm/entry.c UASM_i_MTC0(&p, A1, scratch_vcpu[0], scratch_vcpu[1]); UASM_i_MTC0 306 arch/mips/kvm/entry.c UASM_i_MTC0(&p, T0, C0_EPC); UASM_i_MTC0 328 arch/mips/kvm/entry.c UASM_i_MTC0(&p, A0, C0_PWBASE); UASM_i_MTC0 479 arch/mips/kvm/entry.c UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); UASM_i_MTC0 554 arch/mips/kvm/entry.c UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); UASM_i_MTC0 715 arch/mips/kvm/entry.c UASM_i_MTC0(&p, K0, C0_ENTRYHI); UASM_i_MTC0 730 arch/mips/kvm/entry.c UASM_i_MTC0(&p, A0, C0_PWBASE); UASM_i_MTC0 873 arch/mips/kvm/entry.c UASM_i_MTC0(&p, S1, scratch_vcpu[0], scratch_vcpu[1]); UASM_i_MTC0 361 arch/mips/mm/tlbex.c UASM_i_MTC0(p, 1, c0_kscratch(), scratch_reg); UASM_i_MTC0 752 arch/mips/mm/tlbex.c UASM_i_MTC0(p, pte, C0_ENTRYLO0); /* load it */ UASM_i_MTC0 759 arch/mips/mm/tlbex.c UASM_i_MTC0(p, pte, C0_ENTRYLO1); /* load it */ UASM_i_MTC0 780 arch/mips/mm/tlbex.c UASM_i_MTC0(p, ptr, C0_ENTRYHI); UASM_i_MTC0 784 arch/mips/mm/tlbex.c UASM_i_MTC0(p, ptr, C0_ENTRYHI); UASM_i_MTC0 1062 arch/mips/mm/tlbex.c UASM_i_MTC0(p, tmp, C0_ENTRYLO0); UASM_i_MTC0 1072 arch/mips/mm/tlbex.c UASM_i_MTC0(p, tmp, C0_ENTRYLO1); UASM_i_MTC0 1088 arch/mips/mm/tlbex.c UASM_i_MTC0(p, 0, C0_ENTRYLO0); UASM_i_MTC0 1089 arch/mips/mm/tlbex.c UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */ UASM_i_MTC0 1094 arch/mips/mm/tlbex.c UASM_i_MTC0(p, 0, C0_ENTRYLO1); UASM_i_MTC0 1095 arch/mips/mm/tlbex.c UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */ UASM_i_MTC0 1128 arch/mips/mm/tlbex.c UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg); UASM_i_MTC0 1150 arch/mips/mm/tlbex.c UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg); UASM_i_MTC0 1261 arch/mips/mm/tlbex.c UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */ UASM_i_MTC0 1265 arch/mips/mm/tlbex.c UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */ UASM_i_MTC0 1268 arch/mips/mm/tlbex.c UASM_i_MTC0(p, odd, C0_ENTRYLO1); /* load it */ UASM_i_MTC0 1620 arch/mips/mm/tlbex.c UASM_i_MTC0(&p, a0, C0_CONTEXT); UASM_i_MTC0 1626 arch/mips/mm/tlbex.c UASM_i_MTC0(&p, a0, C0_PWBASE); UASM_i_MTC0 1628 arch/mips/mm/tlbex.c UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg); UASM_i_MTC0 1647 arch/mips/mm/tlbex.c UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg);