UART_RSA_BASE 355 drivers/tty/serial/8250/8250_core.c unsigned long start = UART_RSA_BASE << up->port.regshift; UART_RSA_BASE 376 drivers/tty/serial/8250/8250_core.c unsigned long offset = UART_RSA_BASE << up->port.regshift; UART_RSA_BASE 291 include/uapi/linux/serial_reg.h #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */ UART_RSA_BASE 298 include/uapi/linux/serial_reg.h #define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */ UART_RSA_BASE 306 include/uapi/linux/serial_reg.h #define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */ UART_RSA_BASE 317 include/uapi/linux/serial_reg.h #define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */ UART_RSA_BASE 319 include/uapi/linux/serial_reg.h #define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */ UART_RSA_BASE 321 include/uapi/linux/serial_reg.h #define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */