TYPE0              30 arch/alpha/include/asm/pal.h #define __CALL_PAL_W1(NAME, TYPE0)				\
TYPE0              31 arch/alpha/include/asm/pal.h extern inline void NAME(TYPE0 arg0)				\
TYPE0              33 arch/alpha/include/asm/pal.h 	register TYPE0 __r16 __asm__("$16") = arg0;		\
TYPE0              41 arch/alpha/include/asm/pal.h #define __CALL_PAL_W2(NAME, TYPE0, TYPE1)			\
TYPE0              42 arch/alpha/include/asm/pal.h extern inline void NAME(TYPE0 arg0, TYPE1 arg1)			\
TYPE0              44 arch/alpha/include/asm/pal.h 	register TYPE0 __r16 __asm__("$16") = arg0;		\
TYPE0              53 arch/alpha/include/asm/pal.h #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0)			\
TYPE0              54 arch/alpha/include/asm/pal.h extern inline RTYPE NAME(TYPE0 arg0)				\
TYPE0              57 arch/alpha/include/asm/pal.h 	register TYPE0 __r16 __asm__("$16") = arg0;		\
TYPE0              66 arch/alpha/include/asm/pal.h #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1)		\
TYPE0              67 arch/alpha/include/asm/pal.h extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1)		\
TYPE0              70 arch/alpha/include/asm/pal.h 	register TYPE0 __r16 __asm__("$16") = arg0;		\
TYPE0             250 drivers/pci/controller/pcie-rcar.c 		rcar_pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE0, PCIECCTLR);