TXX9_CE 37 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000) TXX9_CE 38 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) TXX9_CE 39 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) TXX9_CE 40 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000) TXX9_CE 41 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000) TXX9_CE 42 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f002) TXX9_CE 43 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f006) TXX9_CE 44 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_BRAMRTC_BASE (IO_BASE + TXX9_CE(2) + 0x00010000) TXX9_CE 45 arch/mips/include/asm/txx9/rbtx4927.h #define RBTX4927_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000) TXX9_CE 19 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_FPGA_REG_ADDR (IO_BASE + TXX9_CE(2) + 0x00000000) TXX9_CE 20 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_FPGA_REV_ADDR (IO_BASE + TXX9_CE(2) + 0x00000002) TXX9_CE 21 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_CONFIG1_ADDR (IO_BASE + TXX9_CE(2) + 0x00000004) TXX9_CE 22 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_CONFIG2_ADDR (IO_BASE + TXX9_CE(2) + 0x00000006) TXX9_CE 23 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_CONFIG3_ADDR (IO_BASE + TXX9_CE(2) + 0x00000008) TXX9_CE 24 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000) TXX9_CE 25 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_DIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001002) TXX9_CE 26 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_BDIPSW_ADDR (IO_BASE + TXX9_CE(2) + 0x00001004) TXX9_CE 27 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) TXX9_CE 28 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_IMASK2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002002) TXX9_CE 29 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_INTPOL_ADDR (IO_BASE + TXX9_CE(2) + 0x00002004) TXX9_CE 30 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_ISTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) TXX9_CE 31 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_ISTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x00002008) TXX9_CE 32 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200a) TXX9_CE 33 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_IMSTAT2_ADDR (IO_BASE + TXX9_CE(2) + 0x0000200c) TXX9_CE 34 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000) TXX9_CE 35 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_PIOSEL_ADDR (IO_BASE + TXX9_CE(2) + 0x00005000) TXX9_CE 36 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_SPICS_ADDR (IO_BASE + TXX9_CE(2) + 0x00005002) TXX9_CE 37 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_SFPWR_ADDR (IO_BASE + TXX9_CE(2) + 0x00005008) TXX9_CE 38 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_SFVOL_ADDR (IO_BASE + TXX9_CE(2) + 0x0000500a) TXX9_CE 39 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007000) TXX9_CE 40 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x00007002) TXX9_CE 41 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x00007004) TXX9_CE 42 arch/mips/include/asm/txx9/rbtx4938.h #define RBTX4938_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000) TXX9_CE 19 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) TXX9_CE 20 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) TXX9_CE 21 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002) TXX9_CE 22 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004) TXX9_CE 23 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006) TXX9_CE 24 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_CONFIG3_ADDR (IO_BASE + TXX9_CE(1) + 0x00000008) TXX9_CE 25 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_CONFIG4_ADDR (IO_BASE + TXX9_CE(1) + 0x0000000a) TXX9_CE 26 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_USTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00001000) TXX9_CE 27 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_UDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001002) TXX9_CE 28 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_BDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001004) TXX9_CE 29 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_IEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00002000) TXX9_CE 30 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_IPOL_ADDR (IO_BASE + TXX9_CE(1) + 0x00002002) TXX9_CE 31 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_IFAC1_ADDR (IO_BASE + TXX9_CE(1) + 0x00002004) TXX9_CE 32 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_IFAC2_ADDR (IO_BASE + TXX9_CE(1) + 0x00002006) TXX9_CE 33 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_SOFTINT_ADDR (IO_BASE + TXX9_CE(1) + 0x00003000) TXX9_CE 34 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_ISASTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004000) TXX9_CE 35 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_PCISTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004002) TXX9_CE 36 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_ROME_ADDR (IO_BASE + TXX9_CE(1) + 0x00004004) TXX9_CE 37 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_SPICS_ADDR (IO_BASE + TXX9_CE(1) + 0x00004006) TXX9_CE 38 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_AUDI_ADDR (IO_BASE + TXX9_CE(1) + 0x00004008) TXX9_CE 39 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_ISAGPIO_ADDR (IO_BASE + TXX9_CE(1) + 0x0000400a) TXX9_CE 40 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_PE1_ADDR (IO_BASE + TXX9_CE(1) + 0x00005000) TXX9_CE 41 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_PE2_ADDR (IO_BASE + TXX9_CE(1) + 0x00005002) TXX9_CE 42 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_PE3_ADDR (IO_BASE + TXX9_CE(1) + 0x00005004) TXX9_CE 43 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_VP_ADDR (IO_BASE + TXX9_CE(1) + 0x00005006) TXX9_CE 44 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_VPRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00005008) TXX9_CE 45 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_VPSOUT_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500a) TXX9_CE 46 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c) TXX9_CE 48 arch/mips/include/asm/txx9/rbtx4939.h (IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2) TXX9_CE 49 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000) TXX9_CE 50 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002) TXX9_CE 51 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004) TXX9_CE 52 arch/mips/include/asm/txx9/rbtx4939.h #define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000) TXX9_CE 46 arch/mips/txx9/rbtx4939/setup.c ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))