BIT_8 917 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_FW_CAPABILITY_BDG BIT_8 BIT_8 62 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c #define QLC_83XX_10_CAPABLE BIT_8 BIT_8 1701 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c cmd.req.arg[1] = (enable ? 1 : 0) | BIT_8 | temp; BIT_8 827 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c cmd.req.arg[1] = function | BIT_8; BIT_8 648 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c if (*val & BIT_8) BIT_8 395 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c if (status & BIT_8) BIT_8 702 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c cmd.req.arg[2] |= BIT_1 | BIT_3 | BIT_8; BIT_8 1260 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c if (!(cmd->req.arg[1] & BIT_8)) BIT_8 137 drivers/scsi/qla1280.h #define ISP_FLASH_ENABLE BIT_8 /* Flash BIOS Read/Write enable */ BIT_8 311 drivers/scsi/qla1280.h #define TP_RENEGOTIATE BIT_8 /* Renegotiate on error. */ BIT_8 579 drivers/scsi/qla1280.h #define SF_GOT_BUS BIT_8 /* */ BIT_8 717 drivers/scsi/qla2xxx/qla_def.h #define HSR_RISC_PAUSED BIT_8 /* RISC Paused */ BIT_8 1085 drivers/scsi/qla2xxx/qla_def.h #define FO1_SET_EMPHASIS_SWING BIT_8 BIT_8 1253 drivers/scsi/qla2xxx/qla_def.h #define MBX_8 BIT_8 BIT_8 1900 drivers/scsi/qla2xxx/qla_def.h #define PO_ENABLE_DIF_BUNDLING BIT_8 BIT_8 2007 drivers/scsi/qla2xxx/qla_def.h #define SS_RESPONSE_INFO_LEN_VALID BIT_8 BIT_8 3227 drivers/scsi/qla2xxx/qla_def.h #define QLA_MSIX_FW_MODE(m) (((m) & (BIT_7|BIT_8|BIT_9)) >> 7) BIT_8 3721 drivers/scsi/qla2xxx/qla_def.h #define FLOGI_SEQ_DEL BIT_8 BIT_8 3789 drivers/scsi/qla2xxx/qla_def.h #define DT_ISP2432 BIT_8 BIT_8 840 drivers/scsi/qla2xxx/qla_fw.h #define LCF_CLASS_2 BIT_8 /* Enable class 2 during PLOGI. */ BIT_8 1008 drivers/scsi/qla2xxx/qla_fw.h #define CSRX_PCIX_BUS_MODE_MASK (BIT_11|BIT_10|BIT_9|BIT_8) BIT_8 1054 drivers/scsi/qla2xxx/qla_fw.h #define HSRX_RISC_PAUSED BIT_8 /* RISC Paused. */ BIT_8 2774 drivers/scsi/qla2xxx/qla_gs.c case BIT_8: BIT_8 3901 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[2] |= BIT_8; BIT_8 3903 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[2] &= ~BIT_8; BIT_8 7306 drivers/scsi/qla2xxx/qla_init.c icb->firmware_options_3 |= BIT_8; BIT_8 8545 drivers/scsi/qla2xxx/qla_init.c icb->firmware_options_3 |= BIT_8; BIT_8 8681 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[1] |= BIT_8; BIT_8 8687 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[1] &= ~BIT_8; BIT_8 199 drivers/scsi/qla2xxx/qla_isr.c if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) BIT_8 727 drivers/scsi/qla2xxx/qla_isr.c RD_REG_WORD(®24->mailbox7) & BIT_8; BIT_8 1739 drivers/scsi/qla2xxx/qla_isr.c if (iop[0] & BIT_8) BIT_8 2451 drivers/scsi/qla2xxx/qla_mbx.c if (iop[0] & BIT_8) BIT_8 846 drivers/scsi/qla2xxx/qla_nx.h #define HSRX_RISC_PAUSED BIT_8 /* RISC Paused. */ BIT_8 552 drivers/scsi/qla2xxx/qla_os.c pci_bus = (ha->pci_attr & BIT_8) >> 8; BIT_8 6922 drivers/scsi/qla2xxx/qla_target.c nv->firmware_options_2 |= cpu_to_le32(BIT_8); BIT_8 6927 drivers/scsi/qla2xxx/qla_target.c nv->firmware_options_2 &= ~cpu_to_le32(BIT_8); BIT_8 7025 drivers/scsi/qla2xxx/qla_target.c nv->firmware_options_2 |= cpu_to_le32(BIT_8); BIT_8 7030 drivers/scsi/qla2xxx/qla_target.c nv->firmware_options_2 &= ~cpu_to_le32(BIT_8); BIT_8 91 drivers/scsi/qla2xxx/qla_target.h #define OF_INC_RC BIT_8 /* Increment command resource count */ BIT_8 463 drivers/scsi/qla2xxx/qla_target.h #define CTIO7_FLAGS_DONT_RET_CTIO BIT_8 BIT_8 733 drivers/scsi/qla2xxx/qla_target.h #define NOTIFY_ACK_RES_COUNT BIT_8 BIT_8 836 drivers/scsi/qla2xxx/qla_target.h TRC_SRR_TERM = BIT_8, BIT_8 3621 drivers/scsi/qla4xxx/ql4_os.c options |= BIT_8; BIT_8 3623 drivers/scsi/qla4xxx/ql4_os.c options &= ~BIT_8; BIT_8 3636 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(sess->pdu_inorder_en, options, BIT_8);