BIT_3 925 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_FW_CAP2_HW_LRO_IPV6 BIT_3 BIT_3 1323 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_SWITCH_PROMISC_MODE BIT_3 BIT_3 2019 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0); BIT_3 1025 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c #define QLC_83XX_SET_VXLAN_UDP_DPORT BIT_3 BIT_3 1343 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg1 &= ~(BIT_2 | BIT_3); BIT_3 1349 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 |= (BIT_2 | BIT_3); BIT_3 1359 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 &= ~(BIT_1 | BIT_2 | BIT_3); BIT_3 1363 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 &= ~BIT_3; BIT_3 1371 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg1 |= (BIT_3 | BIT_5); BIT_3 554 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c if (mbx_out & BIT_3) BIT_3 496 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define TA_CTL_BUSY BIT_3 BIT_3 366 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c #define QLCNIC_ENCAP_INNER_L4_UDP BIT_3 BIT_3 27 drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c #define QLCNIC_DUMP_ORCRB BIT_3 BIT_3 385 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c if (status & BIT_3) BIT_3 702 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c cmd.req.arg[2] |= BIT_1 | BIT_3 | BIT_8; BIT_3 1124 drivers/scsi/qla1280.c mr = BIT_3 | BIT_2 | BIT_1 | BIT_0; BIT_3 1762 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | BIT_3 1779 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | BIT_3 1902 drivers/scsi/qla1280.c BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_3 1916 drivers/scsi/qla1280.c BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_3 2210 drivers/scsi/qla1280.c BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 2834 drivers/scsi/qla1280.c pkt->control_flags |= cpu_to_le16(BIT_3); BIT_3 3089 drivers/scsi/qla1280.c pkt->control_flags |= cpu_to_le16(BIT_3); BIT_3 3702 drivers/scsi/qla1280.c if (pkt->entry_status & BIT_3) BIT_3 3722 drivers/scsi/qla1280.c if (pkt->entry_status & (BIT_3 + BIT_2)) { BIT_3 3903 drivers/scsi/qla1280.c qla1280_mailbox_command(ha, BIT_6 | BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_3 123 drivers/scsi/qla1280.h #define ISP_CFG0_1040A BIT_3 /* ISP1040A */ BIT_3 149 drivers/scsi/qla1280.h #define NV_DATA_IN BIT_3 BIT_3 157 drivers/scsi/qla1280.h #define CDMA_CONF_SENAB BIT_3 /* SXP to DMA Data enable */ BIT_3 174 drivers/scsi/qla1280.h #define DDMA_CONF_SENAB BIT_3 /* SXP to DMA Data enable */ BIT_3 568 drivers/scsi/qla1280.h #define RF_BAD_PAYLOAD BIT_3 /* Bad payload. */ BIT_3 167 drivers/scsi/qla2xxx/qla_def.h #define IDC_HEARTBEAT_FAILURE BIT_3 BIT_3 444 drivers/scsi/qla2xxx/qla_def.h #define SRB_LOGIN_NVME_PRLI BIT_3 BIT_3 489 drivers/scsi/qla2xxx/qla_def.h #define SRB_FXDISC_RSP_DWRD_VALID BIT_3 BIT_3 670 drivers/scsi/qla2xxx/qla_def.h #define CSR_FLASH_64K_BANK BIT_3 /* Flash upper 64K bank select */ BIT_3 676 drivers/scsi/qla2xxx/qla_def.h #define ICR_EN_RISC BIT_3 /* ISP enable RISC interrupts. */ BIT_3 679 drivers/scsi/qla2xxx/qla_def.h #define ISR_RISC_INT BIT_3 /* RISC interrupt */ BIT_3 687 drivers/scsi/qla2xxx/qla_def.h #define NVR_DATA_IN BIT_3 BIT_3 1080 drivers/scsi/qla2xxx/qla_def.h #define FO1_CTIO_RETRY BIT_3 BIT_3 1258 drivers/scsi/qla2xxx/qla_def.h #define MBX_3 BIT_3 BIT_3 1474 drivers/scsi/qla2xxx/qla_def.h #define GLSO_USE_DID BIT_3 BIT_3 1831 drivers/scsi/qla2xxx/qla_def.h #define CF_SIMPLE_TAG BIT_3 BIT_3 1896 drivers/scsi/qla2xxx/qla_def.h #define PO_ENABLE_INCR_GUARD_SEED BIT_3 BIT_3 1992 drivers/scsi/qla2xxx/qla_def.h #define RF_INV_E_PARAM BIT_3 /* Invalid entry parameter. */ BIT_3 2010 drivers/scsi/qla2xxx/qla_def.h #define SS_RESERVE_CONFLICT (BIT_4 | BIT_3) BIT_3 2011 drivers/scsi/qla2xxx/qla_def.h #define SS_BUSY_CONDITION BIT_3 BIT_3 2412 drivers/scsi/qla2xxx/qla_def.h #define NVME_PRLI_SP_DISCOVERY BIT_3 BIT_3 2516 drivers/scsi/qla2xxx/qla_def.h #define FCF_ASYNC_SENT BIT_3 BIT_3 3784 drivers/scsi/qla2xxx/qla_def.h #define DT_ISP2312 BIT_3 BIT_3 4544 drivers/scsi/qla2xxx/qla_def.h #define QLA28XX_AUX_IMG_NPIV_CONFIG_2_3 BIT_3 BIT_3 4742 drivers/scsi/qla2xxx/qla_def.h #define FC_LL_M BIT_3 /* Medium */ BIT_3 4752 drivers/scsi/qla2xxx/qla_def.h #define FC_TEC_ACT BIT_3 /* Active cable */ BIT_3 4760 drivers/scsi/qla2xxx/qla_def.h #define FC_MED_M6 BIT_3 /* Multimode, 62.5um */ BIT_3 4769 drivers/scsi/qla2xxx/qla_def.h #define FC_SP_32 BIT_3 BIT_3 453 drivers/scsi/qla2xxx/qla_fw.h #define BD_WRAP_BACK BIT_3 BIT_3 490 drivers/scsi/qla2xxx/qla_fw.h #define CF_DIF_SEG_DESCR_ENABLE BIT_3 BIT_3 906 drivers/scsi/qla2xxx/qla_fw.h #define TCF_ABORT_TASK_SET BIT_3 BIT_3 1029 drivers/scsi/qla2xxx/qla_fw.h #define ICRX_EN_RISC_INT BIT_3 /* Enable RISC interrupts on PCI. */ BIT_3 1032 drivers/scsi/qla2xxx/qla_fw.h #define ISRX_RISC_INT BIT_3 /* RISC interrupt. */ BIT_3 1087 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2) BIT_3 1092 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_LED_GREEN_ON BIT_3 BIT_3 1225 drivers/scsi/qla2xxx/qla_fw.h #define MDBS_NON_PARTIC BIT_3 BIT_3 1577 drivers/scsi/qla2xxx/qla_fw.h #define FSTATE_LOGGED_IN BIT_3 BIT_3 1593 drivers/scsi/qla2xxx/qla_fw.h #define VCO_DIAG_FW BIT_3 BIT_3 1112 drivers/scsi/qla2xxx/qla_init.c mb[1] = BIT_2 | BIT_3; BIT_3 3798 drivers/scsi/qla2xxx/qla_init.c (BIT_4 | BIT_3)) >> 3; BIT_3 3800 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 3818 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 3846 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[2] |= BIT_3; BIT_3 3871 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[2] |= BIT_3; BIT_3 4547 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[0] = BIT_3 | BIT_1; BIT_3 4590 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[0] &= ~BIT_3; BIT_3 4668 drivers/scsi/qla2xxx/qla_init.c ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); BIT_3 4743 drivers/scsi/qla2xxx/qla_init.c icb->firmware_options[0] &= ~BIT_3; BIT_3 4745 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 4755 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 4760 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 7311 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 7316 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); BIT_3 8520 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_3 8525 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); BIT_3 8663 drivers/scsi/qla2xxx/qla_init.c ha->fw_options[2] |= BIT_3; BIT_3 3152 drivers/scsi/qla2xxx/qla_isr.c if (RD_REG_DWORD(®->iobase_c8) & BIT_3) BIT_3 647 drivers/scsi/qla2xxx/qla_mbx.c #define NVME_ENABLE_FLAG BIT_3 BIT_3 4099 drivers/scsi/qla2xxx/qla_mbx.c vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; BIT_3 6120 drivers/scsi/qla2xxx/qla_mbx.c } else if (subcode & (BIT_3 | BIT_4)) { BIT_3 6402 drivers/scsi/qla2xxx/qla_mbx.c if ((pd->prli_svc_param_word_3[0] & BIT_3) == 0) BIT_3 61 drivers/scsi/qla2xxx/qla_nvme.h #define CF_DIF_SEG_DESCR_ENABLE BIT_3 BIT_3 180 drivers/scsi/qla2xxx/qla_target.h #define NOTIFY_ACK_FLAGS_TERMINATE BIT_3 BIT_3 499 drivers/scsi/qla2xxx/qla_target.h #define CTIO_CRC2_AF_DIF_DSD_ENA BIT_3 BIT_3 831 drivers/scsi/qla2xxx/qla_target.h TRC_XFR_RDY = BIT_3, BIT_3 232 drivers/scsi/qla4xxx/ql4_def.h #define SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */ BIT_3 3520 drivers/scsi/qla4xxx/ql4_os.c conn->tcp_timer_scale |= BIT_3; BIT_3 3627 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(sess->entry_state, options, BIT_3); BIT_3 3641 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(sess->discovery_auth_optional, options, BIT_3); BIT_3 3650 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(conn->tcp_timer_scale & BIT_2, options, BIT_3); BIT_3 3757 drivers/scsi/qla4xxx/ql4_os.c conn->tcp_timer_scale |= BIT_3;