BIT_2 924 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2 BIT_2 1322 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2 BIT_2 751 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c val = BIT_2 | ((adapter->ahw->num_msix - 1) << 8); BIT_2 753 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c val = BIT_2; BIT_2 2019 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0); BIT_2 3542 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c cmd.req.arg[1] = BIT_2 | (adapter->portnum << 16); BIT_2 1024 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c #define QLC_83XX_MATCH_ENCAP_ID BIT_2 BIT_2 1343 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg1 &= ~(BIT_2 | BIT_3); BIT_2 1349 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 |= (BIT_2 | BIT_3); BIT_2 1359 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 &= ~(BIT_1 | BIT_2 | BIT_3); BIT_2 1361 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 &= ~BIT_2; BIT_2 1362 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c if (!(esw_cfg->offload_flags & BIT_2)) BIT_2 1367 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg1 |= (BIT_2 | BIT_5); BIT_2 552 drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c if (mbx_out & BIT_2) BIT_2 495 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define TA_CTL_WRITE BIT_2 BIT_2 1043 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c if (!(offload_flags & BIT_2)) BIT_2 365 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c #define QLCNIC_ENCAP_INNER_L3_IP6 BIT_2 BIT_2 1525 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c esw_cfg.offload_flags |= (BIT_1 | BIT_2); BIT_2 26 drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c #define QLCNIC_DUMP_ANDCRB BIT_2 BIT_2 383 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c if (status & BIT_2) BIT_2 1124 drivers/scsi/qla1280.c mr = BIT_3 | BIT_2 | BIT_1 | BIT_0; BIT_2 1691 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_0 | BIT_1 | BIT_2, mb); BIT_2 1762 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | BIT_2 1779 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | BIT_2 1902 drivers/scsi/qla1280.c BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_2 1916 drivers/scsi/qla1280.c BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_2 2210 drivers/scsi/qla1280.c BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 2244 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_2 | BIT_2 2251 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); BIT_2 2265 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); BIT_2 2275 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); BIT_2 2285 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); BIT_2 2558 drivers/scsi/qla1280.c status = qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); BIT_2 2612 drivers/scsi/qla1280.c status = qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); BIT_2 3704 drivers/scsi/qla1280.c else if (pkt->entry_status & BIT_2) BIT_2 3722 drivers/scsi/qla1280.c if (pkt->entry_status & (BIT_3 + BIT_2)) { BIT_2 3903 drivers/scsi/qla1280.c qla1280_mailbox_command(ha, BIT_6 | BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_2 122 drivers/scsi/qla1280.h #define ISP_CFG0_1040 BIT_2 /* ISP1040 */ BIT_2 131 drivers/scsi/qla1280.h #define ISP_CFG1_BENAB BIT_2 /* Global Bus burst enable */ BIT_2 136 drivers/scsi/qla1280.h #define ISP_EN_RISC BIT_2 /* ISP enable RISC interrupts. */ BIT_2 141 drivers/scsi/qla1280.h #define RISC_INT BIT_2 /* RISC interrupt */ BIT_2 148 drivers/scsi/qla1280.h #define NV_DATA_OUT BIT_2 BIT_2 158 drivers/scsi/qla1280.h #define CDMA_CONF_RIRQ BIT_2 /* RISC interrupt enable */ BIT_2 175 drivers/scsi/qla1280.h #define DDMA_CONF_RIRQ BIT_2 /* RISC interrupt enable */ BIT_2 323 drivers/scsi/qla1280.h #define NV_START_BIT BIT_2 BIT_2 567 drivers/scsi/qla1280.h #define RF_BAD_HEADER BIT_2 /* Bad header. */ BIT_2 166 drivers/scsi/qla2xxx/qla_def.h #define IDC_NIC_FW_REPORTED_FAILURE BIT_2 BIT_2 329 drivers/scsi/qla2xxx/qla_def.h #define SRB_CRC_CTX_DMA_VALID BIT_2 /* DIF: context DMA valid */ BIT_2 443 drivers/scsi/qla2xxx/qla_def.h #define SRB_LOGIN_SKIP_PRLI BIT_2 BIT_2 488 drivers/scsi/qla2xxx/qla_def.h #define SRB_FXDISC_REQ_DWRD_VALID BIT_2 BIT_2 688 drivers/scsi/qla2xxx/qla_def.h #define NVR_DATA_OUT BIT_2 BIT_2 947 drivers/scsi/qla2xxx/qla_def.h #define IOCTL_CMD BIT_2 BIT_2 960 drivers/scsi/qla2xxx/qla_def.h #define IOCTL_CMD BIT_2 BIT_2 1259 drivers/scsi/qla2xxx/qla_def.h #define MBX_2 BIT_2 BIT_2 1364 drivers/scsi/qla2xxx/qla_def.h #define QLA_ZIO_MODE_6 (BIT_2 | BIT_1) BIT_2 1524 drivers/scsi/qla2xxx/qla_def.h #define NV_START_BIT BIT_2 BIT_2 1832 drivers/scsi/qla2xxx/qla_def.h #define CF_ORDERED_TAG BIT_2 BIT_2 1993 drivers/scsi/qla2xxx/qla_def.h #define RF_INV_E_TYPE BIT_2 /* Invalid entry type. */ BIT_2 2012 drivers/scsi/qla2xxx/qla_def.h #define SS_CONDITION_MET BIT_2 BIT_2 2515 drivers/scsi/qla2xxx/qla_def.h #define FCF_FCP2_DEVICE BIT_2 BIT_2 3783 drivers/scsi/qla2xxx/qla_def.h #define DT_ISP2300 BIT_2 BIT_2 3991 drivers/scsi/qla2xxx/qla_def.h #define ENABLE_EXCHANGE_OFFLD BIT_2 BIT_2 4543 drivers/scsi/qla2xxx/qla_def.h #define QLA28XX_AUX_IMG_NPIV_CONFIG_0_1 BIT_2 BIT_2 4743 drivers/scsi/qla2xxx/qla_def.h #define FC_LL_SA BIT_2 /* ShortWave laser */ BIT_2 4753 drivers/scsi/qla2xxx/qla_def.h #define FC_TEC_PAS BIT_2 /* Passive cable */ BIT_2 4761 drivers/scsi/qla2xxx/qla_def.h #define FC_MED_M5 BIT_2 /* Multimode, 50um */ BIT_2 4770 drivers/scsi/qla2xxx/qla_def.h #define FC_SP_2 BIT_2 BIT_2 491 drivers/scsi/qla2xxx/qla_fw.h #define CF_DATA_SEG_DESCR_ENABLE BIT_2 BIT_2 533 drivers/scsi/qla2xxx/qla_fw.h #define TMF_DSD_LIST_ENABLE BIT_2 BIT_2 907 drivers/scsi/qla2xxx/qla_fw.h #define TCF_CLEAR_TASK_SET BIT_2 BIT_2 1024 drivers/scsi/qla2xxx/qla_fw.h #define CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */ BIT_2 1087 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2) BIT_2 1091 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_LED_YELLOW_ON BIT_2 BIT_2 1290 drivers/scsi/qla2xxx/qla_fw.h #define CS_VF_SET_HOPS_OF_VPORTS BIT_2 BIT_2 1576 drivers/scsi/qla2xxx/qla_fw.h #define FSTATE_IS_DIAG_FW BIT_2 BIT_2 1592 drivers/scsi/qla2xxx/qla_fw.h #define VCO_DONT_RESET_UPDATE BIT_2 BIT_2 1112 drivers/scsi/qla2xxx/qla_init.c mb[1] = BIT_2 | BIT_3; BIT_2 3662 drivers/scsi/qla2xxx/qla_init.c (ha->fw_attributes & BIT_2)) { BIT_2 3792 drivers/scsi/qla2xxx/qla_init.c if (ha->fw_seriallink_options[3] & BIT_2) { BIT_2 3796 drivers/scsi/qla2xxx/qla_init.c swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); BIT_2 3800 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 3818 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 4534 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[0] = BIT_2 | BIT_1; BIT_2 4541 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[0] = BIT_2 | BIT_1; BIT_2 4568 drivers/scsi/qla2xxx/qla_init.c nv->host_p[1] = BIT_2; BIT_2 4589 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[0] |= BIT_2; BIT_2 4605 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[0] |= BIT_2; BIT_2 4667 drivers/scsi/qla2xxx/qla_init.c ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); BIT_2 4745 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 4746 drivers/scsi/qla2xxx/qla_init.c icb->add_firmware_options[0] |= BIT_2; BIT_2 4755 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 4760 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 7163 drivers/scsi/qla2xxx/qla_init.c cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); BIT_2 7311 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 7316 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); BIT_2 8358 drivers/scsi/qla2xxx/qla_init.c cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); BIT_2 8520 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_2 8525 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); BIT_2 786 drivers/scsi/qla2xxx/qla_mbx.c (BIT_0 | BIT_1 | BIT_2); BIT_2 5503 drivers/scsi/qla2xxx/qla_mbx.c mcp->mb[2] = BIT_2; BIT_2 6094 drivers/scsi/qla2xxx/qla_mbx.c if (subcode & BIT_2) { BIT_2 6102 drivers/scsi/qla2xxx/qla_mbx.c if (!(subcode & (BIT_2 | BIT_5))) BIT_2 62 drivers/scsi/qla2xxx/qla_nvme.h #define CF_DATA_SEG_DESCR_ENABLE BIT_2 BIT_2 469 drivers/scsi/qla2xxx/qla_target.h #define CTIO7_FLAGS_DSD_PTR BIT_2 BIT_2 830 drivers/scsi/qla2xxx/qla_target.h TRC_DO_WORK_ERR = BIT_2, BIT_2 3522 drivers/scsi/qla4xxx/ql4_os.c conn->tcp_timer_scale |= BIT_2; BIT_2 3650 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(conn->tcp_timer_scale & BIT_2, options, BIT_3); BIT_2 3651 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(conn->tcp_timer_scale & BIT_1, options, BIT_2); BIT_2 3759 drivers/scsi/qla4xxx/ql4_os.c conn->tcp_timer_scale |= BIT_2;