BIT_16           2564 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c 		cmd.req.arg[1] |= (adapter->ahw->pci_func << 8) | BIT_16;
BIT_16             17 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c #define QLC_VF_FLOOD_BIT	BIT_16
BIT_16            343 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c 		cmd.req.arg[1] |= BIT_16;
BIT_16           1084 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c 	if (!(cmd->req.arg[1] & BIT_16))
BIT_16           1245 drivers/scsi/qla2xxx/qla_def.h #define	MBX_16		BIT_16
BIT_16           3797 drivers/scsi/qla2xxx/qla_def.h #define DT_ISP8031			BIT_16
BIT_16           1005 drivers/scsi/qla2xxx/qla_fw.h #define CSRX_DMA_SHUTDOWN	BIT_16	/* DMA Shutdown control status. */
BIT_16           1083 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_DATA_UPDATE_MASK	(BIT_17|BIT_16)
BIT_16           1085 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_DATA_UPDATE_2_MASK	(BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)
BIT_16           1099 drivers/scsi/qla2xxx/qla_fw.h #define GPEX_ENABLE_UPDATE_MASK	(BIT_17|BIT_16)
BIT_16           1101 drivers/scsi/qla2xxx/qla_fw.h #define GPEX_ENABLE_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)
BIT_16           2029 drivers/scsi/qla2xxx/qla_sup.c 	if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
BIT_16           2033 drivers/scsi/qla2xxx/qla_sup.c 	} else if (((addr & BIT_16) == 0) &&
BIT_16           2090 drivers/scsi/qla2xxx/qla_sup.c 	if ((addr & BIT_16) && ((bank_select & CSR_FLASH_64K_BANK) == 0)) {
BIT_16           2094 drivers/scsi/qla2xxx/qla_sup.c 	} else if (((addr & BIT_16) == 0) &&
BIT_16            282 drivers/scsi/qla2xxx/qla_target.h #define F_CTL_SEQ_INITIATIVE	BIT_16
BIT_16            844 drivers/scsi/qla2xxx/qla_target.h 	TRC_CMD_CHK_STOP = BIT_16,