BIT_0 931 drivers/net/ethernet/qlogic/qlcnic/qlcnic.h #define QLCNIC_83XX_FW_CAPAB_ENCAP_RX_OFFLOAD BIT_0 BIT_0 2019 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c lro_bit_mask = (mode ? (BIT_0 | BIT_1 | BIT_2 | BIT_3) : 0); BIT_0 3563 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c #define QLCNIC_83XX_ADD_PORT0 BIT_0 BIT_0 3663 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c cmd.req.arg[3] = BIT_0; BIT_0 365 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h #define QLC_83XX_LINK_STATS(data) ((data) & BIT_0) BIT_0 531 drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h #define QLC_REGISTER_LB_IDC BIT_0 BIT_0 1336 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg1 = (adapter->npars[index].phy_port & BIT_0); BIT_0 1347 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 |= (BIT_0 | BIT_1); BIT_0 1357 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c arg2 &= ~BIT_0; BIT_0 1358 drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c if (!(esw_cfg->offload_flags & BIT_0)) BIT_0 493 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h #define TA_CTL_START BIT_0 BIT_0 819 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c #define QLCNIC_ENABLE_IPV4_LRO BIT_0 BIT_0 1033 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c if (offload_flags & BIT_0) { BIT_0 141 drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h #define QLCNIC_GET_OWNER(val) ((val) & (BIT_0 | BIT_1)) BIT_0 363 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c #define QLCNIC_ENCAP_VXLAN_PKT BIT_0 BIT_0 494 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c if (*(skb->data) & BIT_0) { BIT_0 495 drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c flags |= BIT_0; BIT_0 1520 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c esw_cfg.mac_override = BIT_0; BIT_0 1521 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c esw_cfg.promisc_mode = BIT_0; BIT_0 1523 drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c esw_cfg.offload_flags = BIT_0; BIT_0 24 drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c #define QLCNIC_DUMP_WCRB BIT_0 BIT_0 299 drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c fw_dump->use_pex_dma = (hdr->capabilities & BIT_0) ? true : false; BIT_0 379 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c if (status & BIT_0) BIT_0 393 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c cmd.req.arg[1] |= BIT_0; BIT_0 1896 drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c nic_info.bit_offsets = BIT_0; BIT_0 1124 drivers/scsi/qla1280.c mr = BIT_3 | BIT_2 | BIT_1 | BIT_0; BIT_0 1198 drivers/scsi/qla1280.c (ha->bus_settings[bus].qtag_enables & (BIT_0 << target))) { BIT_0 1691 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_0 | BIT_1 | BIT_2, mb); BIT_0 1763 drivers/scsi/qla1280.c BIT_1 | BIT_0, mb); BIT_0 1780 drivers/scsi/qla1280.c BIT_1 | BIT_0, mb); BIT_0 1825 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); BIT_0 1835 drivers/scsi/qla1280.c err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); BIT_0 1902 drivers/scsi/qla1280.c BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_0 1916 drivers/scsi/qla1280.c BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_0 2090 drivers/scsi/qla1280.c flag = (BIT_0 << target); BIT_0 2136 drivers/scsi/qla1280.c status = qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); BIT_0 2210 drivers/scsi/qla1280.c BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 2222 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); BIT_0 2228 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); BIT_0 2236 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); BIT_0 2245 drivers/scsi/qla1280.c BIT_1 | BIT_0, &mb[0]); BIT_0 2251 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); BIT_0 2265 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); BIT_0 2269 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); BIT_0 2275 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); BIT_0 2279 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); BIT_0 2285 drivers/scsi/qla1280.c status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); BIT_0 2368 drivers/scsi/qla1280.c data |= BIT_0; BIT_0 2440 drivers/scsi/qla1280.c if (mr & BIT_0) { BIT_0 2558 drivers/scsi/qla1280.c status = qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); BIT_0 2612 drivers/scsi/qla1280.c status = qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); BIT_0 3362 drivers/scsi/qla1280.c if (mailbox[0] & BIT_0) { BIT_0 3425 drivers/scsi/qla1280.c index = mailbox[6] & BIT_0; BIT_0 3463 drivers/scsi/qla1280.c index = mailbox[6] & BIT_0; BIT_0 3903 drivers/scsi/qla1280.c qla1280_mailbox_command(ha, BIT_6 | BIT_3 | BIT_2 | BIT_1 | BIT_0, BIT_0 120 drivers/scsi/qla1280.h #define ISP_CFG0_1020 BIT_0 /* ISP1020 */ BIT_0 132 drivers/scsi/qla1280.h #define ISP_CFG1_SXP BIT_0 /* SXP register select */ BIT_0 134 drivers/scsi/qla1280.h #define ISP_RESET BIT_0 /* ISP soft reset */ BIT_0 146 drivers/scsi/qla1280.h #define NV_CLOCK BIT_0 BIT_0 160 drivers/scsi/qla1280.h #define CDMA_CONF_DIR BIT_0 /* DMA direction (0=fifo->host 1=host->fifo) */ BIT_0 177 drivers/scsi/qla1280.h #define DDMA_CONF_DIR BIT_0 /* DMA direction (0=fifo->host 1=host->fifo) */ BIT_0 203 drivers/scsi/qla1280.h #define BIOS_ENABLE BIT_0 BIT_0 565 drivers/scsi/qla1280.h #define RF_CONT BIT_0 /* Continuation. */ BIT_0 2703 drivers/scsi/qla2xxx/qla_attr.c qla24xx_get_isp_stats(base_vha, stats, stats_dma, BIT_0); BIT_0 1012 drivers/scsi/qla2xxx/qla_dbg.c (RD_REG_WORD(®->mctr) & (BIT_1 | BIT_0)) != 0))) { BIT_0 1050 drivers/scsi/qla2xxx/qla_dbg.c if (RD_REG_WORD(®->semaphore) & BIT_0) { BIT_0 164 drivers/scsi/qla2xxx/qla_def.h #define IDC_DEVICE_STATE_CHANGE BIT_0 BIT_0 184 drivers/scsi/qla2xxx/qla_def.h #define QLA83XX_IDC_RESET_DISABLED BIT_0 BIT_0 327 drivers/scsi/qla2xxx/qla_def.h #define SRB_DMA_VALID BIT_0 /* Command sent to ISP */ BIT_0 441 drivers/scsi/qla2xxx/qla_def.h #define SRB_LOGIN_RETRIED BIT_0 BIT_0 486 drivers/scsi/qla2xxx/qla_def.h #define SRB_FXDISC_REQ_DMA_VALID BIT_0 BIT_0 672 drivers/scsi/qla2xxx/qla_def.h #define CSR_ISP_SOFT_RESET BIT_0 /* ISP soft reset */ BIT_0 690 drivers/scsi/qla2xxx/qla_def.h #define NVR_CLOCK BIT_0 BIT_0 945 drivers/scsi/qla2xxx/qla_def.h #define MBX_DMA_IN BIT_0 BIT_0 958 drivers/scsi/qla2xxx/qla_def.h #define MBX_DMA_IN BIT_0 BIT_0 1078 drivers/scsi/qla2xxx/qla_def.h #define FO1_AE_ON_LIPF8 BIT_0 BIT_0 1092 drivers/scsi/qla2xxx/qla_def.h #define FO2_ENABLE_ATIO_TYPE_3 BIT_0 BIT_0 1095 drivers/scsi/qla2xxx/qla_def.h #define FO3_ENABLE_EMERG_IOCB BIT_0 BIT_0 1261 drivers/scsi/qla2xxx/qla_def.h #define MBX_0 BIT_0 BIT_0 1473 drivers/scsi/qla2xxx/qla_def.h #define GLSO_SEND_RPS BIT_0 BIT_0 2228 drivers/scsi/qla2xxx/qla_def.h #define NOTIFY24XX_FLAGS_PUREX_IOCB BIT_0 BIT_0 2413 drivers/scsi/qla2xxx/qla_def.h #define NVME_PRLI_SP_FIRST_BURST BIT_0 BIT_0 2513 drivers/scsi/qla2xxx/qla_def.h #define FCF_FABRIC_DEVICE BIT_0 BIT_0 3039 drivers/scsi/qla2xxx/qla_def.h SF_SCANNING = BIT_0, BIT_0 3044 drivers/scsi/qla2xxx/qla_def.h FS_FC4TYPE_FCP = BIT_0, BIT_0 3150 drivers/scsi/qla2xxx/qla_def.h #define VP_OPTS_RETRY_ENABLE BIT_0 BIT_0 3306 drivers/scsi/qla2xxx/qla_def.h #define QLA_LOGIO_LOGIN_RETRIED BIT_0 BIT_0 3781 drivers/scsi/qla2xxx/qla_def.h #define DT_ISP2100 BIT_0 BIT_0 3887 drivers/scsi/qla2xxx/qla_def.h ((ha)->fw_attributes_ext[0] & BIT_0)) BIT_0 4413 drivers/scsi/qla2xxx/qla_def.h #define SWITCH_FOUND BIT_0 BIT_0 4541 drivers/scsi/qla2xxx/qla_def.h #define QLA28XX_AUX_IMG_BOARD_CONFIG BIT_0 BIT_0 4745 drivers/scsi/qla2xxx/qla_def.h #define FC_LL_EL BIT_0 /* Electrical inter enclosure */ BIT_0 4762 drivers/scsi/qla2xxx/qla_def.h #define FC_MED_SM BIT_0 /* Single Mode */ BIT_0 4771 drivers/scsi/qla2xxx/qla_def.h #define FC_SP_1 BIT_0 BIT_0 23 drivers/scsi/qla2xxx/qla_fw.h #define FO1_ENABLE_8016 BIT_0 BIT_0 32 drivers/scsi/qla2xxx/qla_fw.h #define PDO_FORCE_PLOGI BIT_0 BIT_0 455 drivers/scsi/qla2xxx/qla_fw.h #define BD_WRITE_DATA BIT_0 BIT_0 493 drivers/scsi/qla2xxx/qla_fw.h #define CF_WRITE_DATA BIT_0 BIT_0 535 drivers/scsi/qla2xxx/qla_fw.h #define TMF_WRITE_DATA BIT_0 BIT_0 617 drivers/scsi/qla2xxx/qla_fw.h #define SF_FCP_RSP_DMA BIT_0 BIT_0 909 drivers/scsi/qla2xxx/qla_fw.h #define TCF_CLEAR_ACA BIT_0 BIT_0 932 drivers/scsi/qla2xxx/qla_fw.h #define AOF_NO_ABTS BIT_0 /* Do not send any ABTS. */ BIT_0 1026 drivers/scsi/qla2xxx/qla_fw.h #define CSRX_ISP_SOFT_RESET BIT_0 /* ISP soft reset. */ BIT_0 1095 drivers/scsi/qla2xxx/qla_fw.h #define GPDX_DATA_INOUT (BIT_1|BIT_0) BIT_0 1103 drivers/scsi/qla2xxx/qla_fw.h #define GPEX_ENABLE (BIT_1|BIT_0) BIT_0 1186 drivers/scsi/qla2xxx/qla_fw.h #define TC_FCE_DISABLE_TRACE BIT_0 BIT_0 1227 drivers/scsi/qla2xxx/qla_fw.h #define MDBS_ENABLED BIT_0 BIT_0 1288 drivers/scsi/qla2xxx/qla_fw.h #define CS_VF_BIND_VPORTS_TO_VF BIT_0 BIT_0 1574 drivers/scsi/qla2xxx/qla_fw.h #define FSTATE_REMOTE_FC_DOWN BIT_0 BIT_0 1590 drivers/scsi/qla2xxx/qla_fw.h #define VCO_DONT_UPDATE_FW BIT_0 BIT_0 1723 drivers/scsi/qla2xxx/qla_fw.h #define NEF_LR_DIST_ENABLE BIT_0 BIT_0 250 drivers/scsi/qla2xxx/qla_gs.c fcport->fc4_type = (ct_rsp->rsp.ga_nxt.fc4_types[2] & BIT_0) ? BIT_0 2216 drivers/scsi/qla2xxx/qla_init.c if (RD_REG_DWORD(®->mailbox12) & BIT_0) { BIT_0 3796 drivers/scsi/qla2xxx/qla_init.c swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); BIT_0 3800 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 3810 drivers/scsi/qla2xxx/qla_init.c ((rx_sens & (BIT_1 | BIT_0)) << 2) | BIT_0 3811 drivers/scsi/qla2xxx/qla_init.c (tx_sens & (BIT_1 | BIT_0)); BIT_0 3816 drivers/scsi/qla2xxx/qla_init.c emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); BIT_0 3818 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 3828 drivers/scsi/qla2xxx/qla_init.c ((rx_sens & (BIT_1 | BIT_0)) << 2) | BIT_0 3829 drivers/scsi/qla2xxx/qla_init.c (tx_sens & (BIT_1 | BIT_0)); BIT_0 3915 drivers/scsi/qla2xxx/qla_init.c if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) BIT_0 4585 drivers/scsi/qla2xxx/qla_init.c nv->firmware_options[1] |= (BIT_5 | BIT_0); BIT_0 4745 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 4755 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 4760 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 5551 drivers/scsi/qla2xxx/qla_init.c 0xfc, mb, BIT_1|BIT_0); BIT_0 6007 drivers/scsi/qla2xxx/qla_init.c fcport->d_id.b.al_pa, mb, BIT_0); BIT_0 6044 drivers/scsi/qla2xxx/qla_init.c if (mb[1] & BIT_0) { BIT_0 6053 drivers/scsi/qla2xxx/qla_init.c if (mb[10] & BIT_0) BIT_0 6135 drivers/scsi/qla2xxx/qla_init.c rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); BIT_0 6968 drivers/scsi/qla2xxx/qla_init.c rsp->options &= ~BIT_0; BIT_0 6984 drivers/scsi/qla2xxx/qla_init.c req->options &= ~BIT_0; BIT_0 7311 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 7316 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); BIT_0 8520 drivers/scsi/qla2xxx/qla_init.c (BIT_3 | BIT_2 | BIT_1 | BIT_0); BIT_0 8525 drivers/scsi/qla2xxx/qla_init.c ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); BIT_0 8542 drivers/scsi/qla2xxx/qla_init.c icb->firmware_options_3 |= BIT_0; BIT_0 1741 drivers/scsi/qla2xxx/qla_iocb.c #define QDSS_GOT_Q_SPACE BIT_0 BIT_0 2063 drivers/scsi/qla2xxx/qla_iocb.c #define QDSS_GOT_Q_SPACE BIT_0 BIT_0 2391 drivers/scsi/qla2xxx/qla_iocb.c opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0; BIT_0 2465 drivers/scsi/qla2xxx/qla_iocb.c mbx->mb10 = cpu_to_le16(BIT_0); BIT_0 2467 drivers/scsi/qla2xxx/qla_iocb.c mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0); BIT_0 91 drivers/scsi/qla2xxx/qla_isr.c if (RD_REG_WORD(®->semaphore) & BIT_0) { BIT_0 299 drivers/scsi/qla2xxx/qla_isr.c if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) BIT_0 301 drivers/scsi/qla2xxx/qla_isr.c else if (mboxes & BIT_0) BIT_0 1400 drivers/scsi/qla2xxx/qla_isr.c if (le16_to_cpu(mbx->mb1) & BIT_0) BIT_0 2945 drivers/scsi/qla2xxx/qla_isr.c if (mboxes & BIT_0) BIT_0 3127 drivers/scsi/qla2xxx/qla_isr.c for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && BIT_0 3140 drivers/scsi/qla2xxx/qla_isr.c for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && BIT_0 228 drivers/scsi/qla2xxx/qla_mbx.c if (mboxes & BIT_0) { BIT_0 400 drivers/scsi/qla2xxx/qla_mbx.c if (mboxes & BIT_0) { BIT_0 568 drivers/scsi/qla2xxx/qla_mbx.c if (mboxes & BIT_0) { BIT_0 646 drivers/scsi/qla2xxx/qla_mbx.c #define EXTENDED_BB_CREDITS BIT_0 BIT_0 650 drivers/scsi/qla2xxx/qla_mbx.c uint16_t mb4 = BIT_0; BIT_0 660 drivers/scsi/qla2xxx/qla_mbx.c uint16_t mb4 = BIT_0; BIT_0 779 drivers/scsi/qla2xxx/qla_mbx.c ha->max_supported_speed = mcp->mb[2] & (BIT_0|BIT_1); BIT_0 786 drivers/scsi/qla2xxx/qla_mbx.c (BIT_0 | BIT_1 | BIT_2); BIT_0 1811 drivers/scsi/qla2xxx/qla_mbx.c mcp->mb[1] = BIT_0; BIT_0 2390 drivers/scsi/qla2xxx/qla_mbx.c if (opt & BIT_0) BIT_0 2454 drivers/scsi/qla2xxx/qla_mbx.c mb[1] = BIT_0; BIT_0 2459 drivers/scsi/qla2xxx/qla_mbx.c mb[10] |= BIT_0; /* Class 2. */ BIT_0 3511 drivers/scsi/qla2xxx/qla_mbx.c mcp->mb[1] = BIT_0; BIT_0 3804 drivers/scsi/qla2xxx/qla_mbx.c mcp->mb[2] = BIT_0; BIT_0 4388 drivers/scsi/qla2xxx/qla_mbx.c if (!(req->options & BIT_0)) { BIT_0 4459 drivers/scsi/qla2xxx/qla_mbx.c if (!(rsp->options & BIT_0)) { BIT_0 4878 drivers/scsi/qla2xxx/qla_mbx.c opt |= BIT_0; BIT_0 4895 drivers/scsi/qla2xxx/qla_mbx.c if (opt & BIT_0) BIT_0 4929 drivers/scsi/qla2xxx/qla_mbx.c opt |= BIT_0; BIT_0 4931 drivers/scsi/qla2xxx/qla_mbx.c if (opt & BIT_0) BIT_0 5545 drivers/scsi/qla2xxx/qla_mbx.c 0x98, 0x1, 1, BIT_13|BIT_0); BIT_0 5552 drivers/scsi/qla2xxx/qla_mbx.c 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0); BIT_0 607 drivers/scsi/qla2xxx/qla_mid.c req->options |= BIT_0; BIT_0 624 drivers/scsi/qla2xxx/qla_mid.c rsp->options |= BIT_0; BIT_0 120 drivers/scsi/qla2xxx/qla_mr.c if (mboxes & BIT_0) BIT_0 197 drivers/scsi/qla2xxx/qla_mr.c if (mboxes & BIT_0) BIT_0 64 drivers/scsi/qla2xxx/qla_nvme.h #define CF_WRITE_DATA BIT_0 BIT_0 839 drivers/scsi/qla2xxx/qla_nx.h #define HINT_MBX_INT_PENDING BIT_0 BIT_0 848 drivers/scsi/qla2xxx/qla_nx.h #define ISRX_NX_RISC_INT BIT_0 /* RISC interrupt. */ BIT_0 40 drivers/scsi/qla2xxx/qla_sup.c while ((data & BIT_0) == 0) { BIT_0 129 drivers/scsi/qla2xxx/qla_sup.c data |= BIT_0; BIT_0 1162 drivers/scsi/qla2xxx/qla_sup.c if ((flags & BIT_0) == 0) BIT_0 1235 drivers/scsi/qla2xxx/qla_sup.c if (!(dword & BIT_0)) BIT_0 6709 drivers/scsi/qla2xxx/qla_target.c fc4_feature = BIT_0; BIT_0 6713 drivers/scsi/qla2xxx/qla_target.c fc4_feature = BIT_0 | BIT_1; BIT_0 226 drivers/scsi/qla2xxx/qla_target.h #define ATIO_EXEC_WRITE BIT_0 BIT_0 471 drivers/scsi/qla2xxx/qla_target.h #define CTIO7_FLAGS_DATA_OUT BIT_0 /* data from initiator */ BIT_0 573 drivers/scsi/qla2xxx/qla_target.h #define ABTS_PARAM_ABORT_SEQ BIT_0 BIT_0 611 drivers/scsi/qla2xxx/qla_target.h #define ABTS_CONTR_FLG_TERM_EXCHG BIT_0 BIT_0 828 drivers/scsi/qla2xxx/qla_target.h TRC_NEW_CMD = BIT_0, BIT_0 954 drivers/scsi/qla2xxx/qla_target.h #define QLA24XX_MGMT_SEND_NACK BIT_0 BIT_0 61 drivers/scsi/qla2xxx/qla_tmpl.h #define CAPTURE_FLAG_PHYS_ONLY BIT_0 BIT_0 55 drivers/scsi/qla4xxx/ql4_fw.h #define HINT_MBX_INT_PENDING BIT_0 BIT_0 61 drivers/scsi/qla4xxx/ql4_fw.h #define HSRX_RISC_MB_INT BIT_0 /* RISC to Host Mailbox interrupt */ BIT_0 65 drivers/scsi/qla4xxx/ql4_fw.h #define ISRX_82XX_RISC_INT BIT_0 /* RISC interrupt. */ BIT_0 294 drivers/scsi/qla4xxx/ql4_init.c if (!(le32_to_cpu(*cap_offset) & BIT_0)) { BIT_0 3513 drivers/scsi/qla4xxx/ql4_os.c sess->erl |= BIT_0; BIT_0 3643 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(sess->erl & BIT_0, options, BIT_0); BIT_0 3652 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(conn->tcp_timer_scale & BIT_0, options, BIT_1); BIT_0 3653 drivers/scsi/qla4xxx/ql4_os.c SET_BITVAL(conn->tcp_timestamp_en, options, BIT_0); BIT_0 3750 drivers/scsi/qla4xxx/ql4_os.c sess->erl |= BIT_0;