BIT24             847 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c 		u32tmp &= ~BIT24;
BIT24             899 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c 			u32tmp |= BIT24;
BIT24             964 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c 			u32tmp &= ~BIT24;
BIT24            1160 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c 			u32tmp |= BIT24;
BIT24            1188 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c 			u32tmp &= ~BIT24;
BIT24             930 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.c 		u4_tmp |= BIT24;
BIT24             959 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.c 		u4_tmp &= ~BIT24;
BIT24            1086 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a2ant.c 		u4tmp |= BIT24;
BIT24             733 drivers/scsi/lpfc/lpfc_hw4.h #define LPFC_SLI4_INTR24		BIT24
BIT24             262 drivers/staging/emxx_udc/emxx_udc.h #define EPN_MODE			(BIT25 + BIT24)
BIT24             264 drivers/staging/emxx_udc/emxx_udc.h #define EPN_INTERRUPT			BIT24
BIT24             293 drivers/staging/emxx_udc/emxx_udc.h #define EPN_ISO_CRC			BIT24		/* R */
BIT24             392 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define	IMR_TSF_BIT32_TOGGLE_8723B	BIT24	/*  TSF Timer BIT32 toggle indication interrupt */
BIT24             414 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define	IMR_BCNDMAINT4_8723B		BIT24	/*  Beacon DMA Interrupt 4 */
BIT24            1177 drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c 		u4Tmp &= ~BIT24;
BIT24            1215 drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c 			u4Tmp |= BIT24;
BIT24            1262 drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c 			u4Tmp &= ~BIT24;
BIT24            1270 drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c 			u4Tmp |= BIT24;
BIT24            1288 drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c 			u4Tmp &= ~BIT24;
BIT24              93 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32);
BIT24             115 drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c 			PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00);
BIT24             443 drivers/staging/rtl8723bs/hal/odm.h 	ODM_RF_TX_PWR_TRACK		= BIT24,
BIT24              81 drivers/staging/rtl8723bs/hal/odm_debug.h #define ODM_COMP_TX_PWR_TRACK		BIT24
BIT24             780 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDOK7				BIT24		/*  Beacon Queue DMA OK Interrup 7 */
BIT24             828 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_TSF_BIT32_TOGGLE	BIT24
BIT24             879 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_TSF_BIT32_TOGGLE	BIT24
BIT24             940 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_TSF_BIT32_TOGGLE_88E	BIT24		/*  TSF Timer BIT32 toggle indication interrupt */
BIT24             963 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDMAINT4_88E		BIT24		/*  Beacon DMA Interrupt 4 */
BIT24            1027 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RCR_ENMBID				BIT24	/*  Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. */
BIT24            1583 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HIMR_OCPINT_MSK			BIT24
BIT24            1609 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HISR_OCPINT				BIT24
BIT24             210 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define	IMR_TSF_BIT32_TOGGLE_8723B		BIT24		/*  TSF Timer BIT32 toggle indication interrupt */
BIT24             232 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define	IMR_BCNDMAINT4_8723B				BIT24		/*  Beacon DMA Interrupt 4 */
BIT24              65 drivers/staging/rtl8723bs/include/rtw_mlme_ext.h #define DYNAMIC_RF_TX_PWR_TRACK		BIT24/* ODM_RF_TX_PWR_TRACK */