BIT23 846 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c u32tmp &= ~BIT23; BIT23 898 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c u32tmp &= ~BIT23; BIT23 963 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c u32tmp |= BIT23; BIT23 1159 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c u32tmp &= ~BIT23; BIT23 1187 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c u32tmp |= BIT23; BIT23 929 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.c u4_tmp &= ~BIT23; BIT23 958 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.c u4_tmp &= ~BIT23; BIT23 1085 drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a2ant.c u4tmp &= ~BIT23; BIT23 378 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define BRSR_ACKSHORTPMB BIT23 BIT23 732 drivers/scsi/lpfc/lpfc_hw4.h #define LPFC_SLI4_INTR23 BIT23 BIT23 137 drivers/staging/emxx_udc/emxx_udc.h #define EP15_INT BIT23 BIT23 164 drivers/staging/emxx_udc/emxx_udc.h #define EP15_EN BIT23 BIT23 294 drivers/staging/emxx_udc/emxx_udc.h #define EPN_OUT_END_INT BIT23 /* RW */ BIT23 319 drivers/staging/emxx_udc/emxx_udc.h #define EPN_OUT_END_EN BIT23 /* RW */ BIT23 415 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define IMR_BCNDMAINT3_8723B BIT23 /* Beacon DMA Interrupt 3 */ BIT23 1176 drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c u4Tmp &= ~BIT23; BIT23 1214 drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c u4Tmp &= ~BIT23; BIT23 1261 drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c u4Tmp |= BIT23; BIT23 1269 drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c u4Tmp &= ~BIT23; BIT23 1287 drivers/staging/rtl8723bs/hal/HalBtc8723b2Ant.c u4Tmp |= BIT23; BIT23 781 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDOK6 BIT23 /* Beacon Queue DMA OK Interrup 6 */ BIT23 829 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT3 BIT23 BIT23 855 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT7 BIT23 BIT23 880 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT3 BIT23 BIT23 906 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT7 BIT23 BIT23 964 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDMAINT3_88E BIT23 /* Beacon DMA Interrupt 3 */ BIT23 1028 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RCR_LSIGEN BIT23 /* Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */ BIT23 1582 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HIMR_PSTIMEOUT_MSK BIT23 BIT23 1608 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HISR_PSTIMEOUT BIT23 BIT23 233 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define IMR_BCNDMAINT3_8723B BIT23 /* Beacon DMA Interrupt 3 */