BIT22             731 drivers/scsi/lpfc/lpfc_hw4.h #define LPFC_SLI4_INTR22		BIT22
BIT22             138 drivers/staging/emxx_udc/emxx_udc.h #define EP14_INT			BIT22
BIT22             165 drivers/staging/emxx_udc/emxx_udc.h #define EP14_EN				BIT22
BIT22             295 drivers/staging/emxx_udc/emxx_udc.h #define EPN_OUT_OR_INT			BIT22		/* RW */
BIT22             320 drivers/staging/emxx_udc/emxx_udc.h #define EPN_OUT_OR_EN			BIT22		/* RW */
BIT22             416 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define	IMR_BCNDMAINT2_8723B		BIT22	/*  Beacon DMA Interrupt 2 */
BIT22             782 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDOK5				BIT22		/*  Beacon Queue DMA OK Interrup 5 */
BIT22             830 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT2			BIT22
BIT22             856 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT6			BIT22
BIT22             881 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT2			BIT22
BIT22             907 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT6			BIT22
BIT22             965 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDMAINT2_88E		BIT22		/*  Beacon DMA Interrupt 2 */
BIT22            1029 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RCR_MFBEN				BIT22	/*  Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. */
BIT22            1581 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HIMR_GTINT4_IND_MSK		BIT22
BIT22            1607 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HISR_GTINT4_IND			BIT22
BIT22            1680 drivers/staging/rtl8723bs/include/hal_com_reg.h #define GPS_FUNC_EN			BIT22	/*  GPS function enable */
BIT22             234 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define	IMR_BCNDMAINT2_8723B				BIT22		/*  Beacon DMA Interrupt 2 */