BIT20 729 drivers/scsi/lpfc/lpfc_hw4.h #define LPFC_SLI4_INTR20 BIT20 BIT20 140 drivers/staging/emxx_udc/emxx_udc.h #define EP12_INT BIT20 BIT20 167 drivers/staging/emxx_udc/emxx_udc.h #define EP12_EN BIT20 BIT20 297 drivers/staging/emxx_udc/emxx_udc.h #define EPN_OUT_STALL_INT BIT20 /* RW */ BIT20 322 drivers/staging/emxx_udc/emxx_udc.h #define EPN_OUT_STALL_EN BIT20 /* RW */ BIT20 393 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define IMR_BCNDMAINT0_8723B BIT20 /* Beacon DMA Interrupt 0 */ BIT20 418 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrup 7 */ BIT20 784 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDOK3 BIT20 /* Beacon Queue DMA OK Interrup 3 */ BIT20 832 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT0 BIT20 BIT20 858 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT4 BIT20 BIT20 883 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT0 BIT20 BIT20 909 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT4 BIT20 BIT20 941 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDMAINT0_88E BIT20 /* Beacon DMA Interrupt 0 */ BIT20 967 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDOK7_88E BIT20 /* Beacon Queue DMA OK Interrup 7 */ BIT20 1031 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RCR_RSVD_BIT20 BIT20 /* Reserved */ BIT20 1579 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HIMR_HSISR_IND_MSK BIT20 BIT20 1605 drivers/staging/rtl8723bs/include/hal_com_reg.h #define SDIO_HISR_HSISR_IND BIT20 BIT20 1678 drivers/staging/rtl8723bs/include/hal_com_reg.h #define GPS_HWPDN_EN BIT20 /* Enable GPIO[10] as GPS HW PDn source */ BIT20 211 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define IMR_BCNDMAINT0_8723B BIT20 /* Beacon DMA Interrupt 0 */ BIT20 236 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrupt 7 */